| /Linux-v6.1/drivers/gpio/ |
| D | gpio-cs5535.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2009 Andres Salomon <dilinger@collabora.co.uk>
17 #define DRV_NAME "cs5535-gpio"
21 * 31-29,23 : reserved (always mask out)
24 * 22-16 : LPC
44 * design pattern, see Documentation/driver-api/driver-model/design-patterns.rst
51 spinlock_t lock; member
63 unsigned long addr = chip->base + 0x80 + reg; in errata_outl()
68 * non-selected bits; the recommended workaround is a in errata_outl()
69 * read-modify-write operation. in errata_outl()
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| D | gpio-ws16c48.c | 1 // SPDX-License-Identifier: GPL-2.0-only
35 * struct ws16c48_reg - device register structure
38 * @page_lock: Register page (Bits 7-6) and I/O port lock (Bits 5-0)
49 * struct ws16c48_gpio - GPIO device private data structure
53 * @lock: synchronization lock to prevent I/O race conditions
56 * @reg: I/O address offset for the device registers
62 raw_spinlock_t lock; member
68 static int ws16c48_gpio_get_direction(struct gpio_chip *chip, unsigned offset) in ws16c48_gpio_get_direction() argument
71 const unsigned port = offset / 8; in ws16c48_gpio_get_direction()
72 const unsigned mask = BIT(offset % 8); in ws16c48_gpio_get_direction()
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| D | gpio-max730x.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 * - DIN must be stable at the rising edge of clock.
12 * - when writing:
13 * - always clock in 16 clocks at once
14 * - at DIN: D15 first, D0 last
15 * - D0..D7 = databyte, D8..D14 = commandbyte
16 * - D15 = low -> write command
17 * - when reading
18 * - always clock in 16 clocks at once
19 * - at DIN: D15 first, D0 last
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| D | gpio-sim.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
45 struct mutex lock; member
51 unsigned int offset; member
61 unsigned int offset, int value) in gpio_sim_apply_pull() argument
67 gc = &chip->gc; in gpio_sim_apply_pull()
68 desc = &gc->gpiodev->descs[offset]; in gpio_sim_apply_pull()
70 mutex_lock(&chip->lock); in gpio_sim_apply_pull()
72 if (test_bit(FLAG_REQUESTED, &desc->flags) && in gpio_sim_apply_pull()
73 !test_bit(FLAG_IS_OUT, &desc->flags)) { in gpio_sim_apply_pull()
74 if (value == !!test_bit(offset, chip->value_map)) in gpio_sim_apply_pull()
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| D | gpio-pci-idio-16.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES PCI-IDIO-16
20 * struct idio_16_gpio_reg - GPIO device registers structure
21 * @out0_7: Read: FET Drive Outputs 0-7
22 * Write: FET Drive Outputs 0-7
23 * @in0_7: Read: Isolated Inputs 0-7
27 * @filter_ctl: Read: Activate Input Filters 0-15
28 * Write: Deactivate Input Filters 0-15
29 * @out8_15: Read: FET Drive Outputs 8-15
30 * Write: FET Drive Outputs 8-15
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| D | gpio-viperboard.c | 1 // SPDX-License-Identifier: GPL-2.0+
45 u8 offset; member
77 …"gpio-a sampling freq in Hz (default is 1000Hz) valid values: 10, 100, 1000, 10000, 100000, 100000…
79 /* ----- begin of gipo a chip -------------------------------------------- */
82 unsigned int offset) in vprbrd_gpioa_get() argument
86 struct vprbrd *vb = gpio->vb; in vprbrd_gpioa_get()
87 struct vprbrd_gpioa_msg *gamsg = (struct vprbrd_gpioa_msg *)vb->buf; in vprbrd_gpioa_get()
90 if (gpio->gpioa_out & (1 << offset)) in vprbrd_gpioa_get()
91 return !!(gpio->gpioa_val & (1 << offset)); in vprbrd_gpioa_get()
93 mutex_lock(&vb->lock); in vprbrd_gpioa_get()
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| D | gpio-aspeed.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
43 * @offset_timer: Maps an offset to an @timer_users index, or zero if disabled
56 raw_spinlock_t lock; member
214 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
216 return gpio->base + bank->rdata_reg; in bank_reg()
218 return gpio->base + bank->val_regs + GPIO_VAL_DIR; in bank_reg()
220 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
222 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
224 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
226 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
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| D | gpio-sch311x.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * GPIO driver for the SMSC SCH311x Super-I/O chips
20 #define DRV_NAME "gpio-sch311x"
44 spinlock_t lock; /* lock for this GPIO block */ member
93 * Super-IO functions
102 return -EBUSY; in sch311x_sio_enter()
132 static int sch311x_gpio_request(struct gpio_chip *chip, unsigned offset) in sch311x_gpio_request() argument
136 if (block->config_regs[offset] == 0) /* GPIO is not available */ in sch311x_gpio_request()
137 return -ENODEV; in sch311x_gpio_request()
139 if (!request_region(block->runtime_reg + block->config_regs[offset], in sch311x_gpio_request()
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| D | gpio-pl061.c | 1 // SPDX-License-Identifier: GPL-2.0-only
51 raw_spinlock_t lock; member
62 static int pl061_get_direction(struct gpio_chip *gc, unsigned offset) in pl061_get_direction() argument
66 if (readb(pl061->base + GPIODIR) & BIT(offset)) in pl061_get_direction()
72 static int pl061_direction_input(struct gpio_chip *gc, unsigned offset) in pl061_direction_input() argument
78 raw_spin_lock_irqsave(&pl061->lock, flags); in pl061_direction_input()
79 gpiodir = readb(pl061->base + GPIODIR); in pl061_direction_input()
80 gpiodir &= ~(BIT(offset)); in pl061_direction_input()
81 writeb(gpiodir, pl061->base + GPIODIR); in pl061_direction_input()
82 raw_spin_unlock_irqrestore(&pl061->lock, flags); in pl061_direction_input()
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| D | gpio-siox.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2018 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
14 struct mutex lock; member
30 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_set_data()
32 mutex_lock(&ddata->lock); in gpio_siox_set_data()
33 buf[0] = ddata->setdata[0]; in gpio_siox_set_data()
34 mutex_unlock(&ddata->lock); in gpio_siox_set_data()
41 struct gpio_siox_ddata *ddata = dev_get_drvdata(&sdevice->dev); in gpio_siox_get_data()
42 size_t offset; in gpio_siox_get_data() local
45 mutex_lock(&ddata->lock); in gpio_siox_get_data()
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| D | gpio-104-idio-16.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES 104-IDIO-16 family
6 * This driver supports the following ACCES devices: 104-IDIO-16,
7 * 104-IDIO-16E, 104-IDO-16, 104-IDIO-8, 104-IDIO-8E, and 104-IDO-8.
30 MODULE_PARM_DESC(base, "ACCES 104-IDIO-16 base addresses");
35 MODULE_PARM_DESC(irq, "ACCES 104-IDIO-16 interrupt line numbers");
38 * struct idio_16_reg - device registers structure
40 * Write: FET Drive Outputs 0-7
41 * @in0_7: Read: Isolated Inputs 0-7
47 * Write: FET Drive Outputs 8-15
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| D | gpio-timberdale.c | 1 // SPDX-License-Identifier: GPL-2.0-only
21 #define DRIVER_NAME "timb-gpio"
36 spinlock_t lock; /* mutual exclusion */ member
43 unsigned offset, bool enabled) in timbgpio_update_bit() argument
48 spin_lock(&tgpio->lock); in timbgpio_update_bit()
49 reg = ioread32(tgpio->membase + offset); in timbgpio_update_bit()
56 iowrite32(reg, tgpio->membase + offset); in timbgpio_update_bit()
57 spin_unlock(&tgpio->lock); in timbgpio_update_bit()
72 value = ioread32(tgpio->membase + TGPIOVAL); in timbgpio_gpio_get()
88 static int timbgpio_to_irq(struct gpio_chip *gpio, unsigned offset) in timbgpio_to_irq() argument
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| D | gpio-mockup.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (C) 2015-2016 Bamvor Jian Zhang <bamv2005@gmail.com>
38 * struct gpio_pin_status - structure describing a GPIO status
53 struct mutex lock; member
59 unsigned int offset; member
83 unsigned int offset) in __gpio_mockup_get() argument
85 return chip->lines[offset].value; in __gpio_mockup_get()
88 static int gpio_mockup_get(struct gpio_chip *gc, unsigned int offset) in gpio_mockup_get() argument
93 mutex_lock(&chip->lock); in gpio_mockup_get()
94 val = __gpio_mockup_get(chip, offset); in gpio_mockup_get()
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| D | gpio-omap.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2003-2005 Nokia Corporation
9 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
27 #include <linux/platform_data/gpio-omap.h>
58 raw_spinlock_t lock; member
83 #define BANK_USED(bank) (bank->mod_usage || bank->irq_usage)
84 #define LINE_USED(line, offset) (line & (BIT(offset))) argument
111 bank->context.oe = omap_gpio_rmw(bank->base + bank->regs->direction, in omap_set_gpio_direction()
117 static void omap_set_gpio_dataout_reg(struct gpio_bank *bank, unsigned offset, in omap_set_gpio_dataout_reg() argument
120 void __iomem *reg = bank->base; in omap_set_gpio_dataout_reg()
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| D | gpio-pcie-idio-24.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * GPIO driver for the ACCES PCIe-IDIO-24 family
15 * This driver supports the following ACCES devices: PCIe-IDIO-24,
16 * PCIe-IDI-24, PCIe-IDO-24, and PCIe-IDIO-12.
58 * 23: Built-In Self-Test (BIST) Interrupt Active
73 * struct idio_24_gpio_reg - GPIO device registers structure
74 * @out0_7: Read: FET Outputs 0-7
75 * Write: FET Outputs 0-7
76 * @out8_15: Read: FET Outputs 8-15
77 * Write: FET Outputs 8-15
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| D | gpio-xgene.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * AppliedMicro X-Gene SoC GPIO Driver
33 spinlock_t lock; member
37 static int xgene_gpio_get(struct gpio_chip *gc, unsigned int offset) in xgene_gpio_get() argument
43 bank_offset = GPIO_DATA_OFFSET + GPIO_BANK_OFFSET(offset); in xgene_gpio_get()
44 bit_offset = GPIO_BIT_OFFSET(offset); in xgene_gpio_get()
45 return !!(ioread32(chip->base + bank_offset) & BIT(bit_offset)); in xgene_gpio_get()
48 static void __xgene_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) in __xgene_gpio_set() argument
54 bank_offset = GPIO_SET_DR_OFFSET + GPIO_BANK_OFFSET(offset); in __xgene_gpio_set()
55 bit_offset = GPIO_BIT_OFFSET(offset) + XGENE_GPIOS_PER_BANK; in __xgene_gpio_set()
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| D | gpio-74x164.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
22 struct mutex lock; member
37 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer, in __gen_74x164_write_config()
38 chip->registers); in __gen_74x164_write_config()
41 static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset) in gen_74x164_get_value() argument
44 u8 bank = chip->registers - 1 - offset / 8; in gen_74x164_get_value()
45 u8 pin = offset % 8; in gen_74x164_get_value()
48 mutex_lock(&chip->lock); in gen_74x164_get_value()
49 ret = (chip->buffer[bank] >> pin) & 0x1; in gen_74x164_get_value()
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| D | gpio-aspeed-sgpio.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
34 raw_spinlock_t lock; member
109 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
111 return gpio->base + bank->rdata_reg; in bank_reg()
113 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
115 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
117 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
119 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
121 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS; in bank_reg()
123 return gpio->base + bank->tolerance_regs; in bank_reg()
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| D | gpio-mb86s7x.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/gpio/gpio-mb86s7x.c
24 #include "gpiolib-acpi.h"
34 #define OFFSET(x) BIT((x) % 8) macro
40 spinlock_t lock; member
49 spin_lock_irqsave(&gchip->lock, flags); in mb86s70_gpio_request()
51 val = readl(gchip->base + PFR(gpio)); in mb86s70_gpio_request()
52 val &= ~OFFSET(gpio); in mb86s70_gpio_request()
53 writel(val, gchip->base + PFR(gpio)); in mb86s70_gpio_request()
55 spin_unlock_irqrestore(&gchip->lock, flags); in mb86s70_gpio_request()
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| D | gpio-merrifield.c | 1 // SPDX-License-Identifier: GPL-2.0
47 .npins = (gend) - (gstart) + 1, \
53 raw_spinlock_t lock; member
86 static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned int offset, in gpio_reg() argument
90 u8 reg = offset / 32; in gpio_reg()
92 return priv->reg_base + reg_type_offset + reg * 4; in gpio_reg()
95 static int mrfld_gpio_get(struct gpio_chip *chip, unsigned int offset) in mrfld_gpio_get() argument
97 void __iomem *gplr = gpio_reg(chip, offset, GPLR); in mrfld_gpio_get()
99 return !!(readl(gplr) & BIT(offset % 32)); in mrfld_gpio_get()
102 static void mrfld_gpio_set(struct gpio_chip *chip, unsigned int offset, in mrfld_gpio_set() argument
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| /Linux-v6.1/Documentation/locking/ |
| D | robust-futex-ABI.rst | 48 kernel, then it can actually have two such structures - one using 32 bit
56 pointer to a single linked list of 'lock entries', one per lock,
58 to itself, 'head'. The last 'lock entry' points back to the 'head'.
60 The second word, called 'offset', specifies the offset from the
61 address of the associated 'lock entry', plus or minus, of what will
62 be called the 'lock word', from that 'lock entry'. The 'lock word'
63 is always a 32 bit word, unlike the other words above. The 'lock
65 of the thread holding the lock in the bottom 30 bits. See further
69 the address of the 'lock entry', during list insertion and removal,
73 Each 'lock entry' on the single linked list starting at 'head' consists
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| /Linux-v6.1/drivers/pinctrl/actions/ |
| D | pinctrl-owl.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Author: David Liu <liuwei@actions-semi.com>
24 #include <linux/pinctrl/pinconf-generic.h>
29 #include "../pinctrl-utils.h"
30 #include "pinctrl-owl.h"
33 * struct owl_pinctrl - pinctrl state of the device
37 * @lock: spinlock to protect registers
49 raw_spinlock_t lock; member
74 tmp = readl_relaxed(pctrl->base + reg); in owl_read_field()
75 mask = (1 << width) - 1; in owl_read_field()
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| /Linux-v6.1/arch/sparc/lib/ |
| D | bitext.c | 1 // SPDX-License-Identifier: GPL-2.0
19 * bit_map_string_get - find and set a bit string in bit map.
24 * Returns offset in the map or -1 if out of space.
30 int offset, count; /* siamese twins */ in bit_map_string_get() local
35 if (t->num_colors) { in bit_map_string_get()
38 align = t->num_colors; in bit_map_string_get()
44 align1 = align - 1; in bit_map_string_get()
47 if (align < 0 || align >= t->size) in bit_map_string_get()
49 if (len <= 0 || len > t->size) in bit_map_string_get()
53 spin_lock(&t->lock); in bit_map_string_get()
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| /Linux-v6.1/drivers/gpu/drm/lima/ |
| D | lima_vm.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */
5 #include <linux/dma-mapping.h>
26 #define LIMA_VM_PT_MASK ((1 << LIMA_VM_PD_SHIFT) - 1)
27 #define LIMA_VM_BT_MASK ((1 << LIMA_VM_PB_SHIFT) - 1)
43 vm->bts[pbe].cpu[bte] = 0; in lima_vm_unmap_range()
52 if (!vm->bts[pbe].cpu) { in lima_vm_map_page()
57 vm->bts[pbe].cpu = dma_alloc_wc( in lima_vm_map_page()
58 vm->dev->dev, LIMA_PAGE_SIZE << LIMA_VM_NUM_PT_PER_BT_SHIFT, in lima_vm_map_page()
59 &vm->bts[pbe].dma, GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO); in lima_vm_map_page()
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| /Linux-v6.1/drivers/clk/hisilicon/ |
| D | reset.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2015-2016 HiSilicon Technologies Co., Ltd.
11 #include <linux/reset-controller.h>
21 spinlock_t lock; member
33 u32 offset; in hisi_reset_of_xlate() local
36 offset = (reset_spec->args[0] << HISI_RESET_OFFSET_SHIFT) in hisi_reset_of_xlate()
38 bit = reset_spec->args[1] & HISI_RESET_BIT_MASK; in hisi_reset_of_xlate()
40 return (offset | bit); in hisi_reset_of_xlate()
48 u32 offset, reg; in hisi_reset_assert() local
51 offset = (id & HISI_RESET_OFFSET_MASK) >> HISI_RESET_OFFSET_SHIFT; in hisi_reset_assert()
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