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/Linux-v5.4/kernel/irq/
Dcpuhotplug.c1 // SPDX-License-Identifier: GPL-2.0
3 * Generic cpu hotunplug interrupt migration code copied from the
12 #include <linux/interrupt.h>
18 /* For !GENERIC_IRQ_EFFECTIVE_AFF_MASK this looks at general affinity mask */
26 * The cpumask_empty() check is a workaround for interrupt chips, in irq_needs_fixup()
27 * which do not implement effective affinity, but the architecture has in irq_needs_fixup()
28 * enabled the config switch. Use the general affinity mask instead. in irq_needs_fixup()
44 pr_warn("Eff. affinity %*pbl of IRQ %u contains only offline CPUs after offlining CPU %u\n", in irq_needs_fixup()
45 cpumask_pr_args(m), d->irq, cpu); in irq_needs_fixup()
57 const struct cpumask *affinity; in migrate_one_irq() local
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Dirqdesc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 * This file contains the interrupt descriptor management code. Detailed
7 * information is available in Documentation/core-api/genericirq.rst
13 #include <linux/interrupt.h>
15 #include <linux/radix-tree.h>
23 * lockdep: we want to handle all irq_desc locks as a single lock-class:
57 if (!zalloc_cpumask_var_node(&desc->irq_common_data.affinity, in alloc_masks()
59 return -ENOMEM; in alloc_masks()
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Dmsi.c1 // SPDX-License-Identifier: GPL-2.0
8 * This file contains common code to support Message Signalled Interrupt for
21 * alloc_msi_entry - Allocate an initialize msi_entry
24 * @affinity: Optional pointer to an affinity mask array size of @nvec
26 * If @affinity is not NULL then an affinity array[@nvec] is allocated
27 * and the affinity masks and flags from @affinity are copied.
30 const struct irq_affinity_desc *affinity) in alloc_msi_entry() argument
38 INIT_LIST_HEAD(&desc->list); in alloc_msi_entry()
39 desc->dev = dev; in alloc_msi_entry()
40 desc->nvec_used = nvec; in alloc_msi_entry()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
25 # Supports effective affinity mask
29 # Facility to allocate a hardware interrupt. This is legacy support
34 # Support for delayed migration from interrupt context
42 # Alpha specific irq affinity mechanism
58 # Generic configurable interrupt chip implementation
63 # Generic irq_domain hw <--> linux irq number translation
85 # Generic MSI interrupt support
89 # Generic MSI hierarchical interrupt domain support
116 ---help---
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Dmanage.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006 Thomas Gleixner
15 #include <linux/interrupt.h>
50 while (irqd_irq_inprogress(&desc->irq_data)) in __synchronize_hardirq()
53 /* Ok, that indicated we're done: double-check carefully. */ in __synchronize_hardirq()
54 raw_spin_lock_irqsave(&desc->lock, flags); in __synchronize_hardirq()
55 inprogress = irqd_irq_inprogress(&desc->irq_data); in __synchronize_hardirq()
70 raw_spin_unlock_irqrestore(&desc->lock, flags); in __synchronize_hardirq()
77 * synchronize_hardirq - wait for pending hard IRQ handlers (on other CPUs)
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Ddevres.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/interrupt.h>
22 free_irq(this->irq, this->dev_id); in devm_irq_release()
29 return this->irq == match->irq && this->dev_id == match->dev_id; in devm_irq_match()
33 * devm_request_threaded_irq - allocate an interrupt line for a managed device
34 * @dev: device to request interrupt for
35 * @irq: Interrupt line to allocate
37 * @thread_fn: function to be called in a threaded interrupt context. NULL
39 * @irqflags: Interrupt type flags
62 return -ENOMEM; in devm_request_threaded_irq()
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Daffinity.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2016-2017 Christoph Hellwig.
6 #include <linux/interrupt.h>
27 cpus_per_vec--; in irq_spread_init_one()
31 for (sibl = -1; cpus_per_vec > 0; ) { in irq_spread_init_one()
38 cpus_per_vec--; in irq_spread_init_one()
60 while (--node >= 0) in alloc_node_to_cpumask()
88 /* Calculate the number of nodes in the supplied affinity mask */ in get_nodes_in_cpumask()
112 return ln->ncpus - rn->ncpus; in ncpus_cmp_func()
161 * node's nr_cpus to remaining un-assigned ncpus. 'numvecs' is in alloc_nodes_vectors()
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/Linux-v5.4/arch/mips/loongson64/loongson-3/
Dirq.c1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/interrupt.h>
15 unsigned int irq_cpu[16] = {[0 ... 15] = -1};
19 int plat_set_irq_affinity(struct irq_data *d, const struct cpumask *affinity, in plat_set_irq_affinity() argument
25 /* I/O devices are connected on package-0 */ in plat_set_irq_affinity()
26 cpumask_copy(&new_affinity, affinity); in plat_set_irq_affinity()
27 for_each_cpu(cpu, affinity) in plat_set_irq_affinity()
32 return -EINVAL; in plat_set_irq_affinity()
34 cpumask_copy(d->common->affinity, &new_affinity); in plat_set_irq_affinity()
43 struct cpumask affinity; in ht_irqdispatch() local
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/Linux-v5.4/include/linux/
Dirq.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 * Thanks. --rmk
36 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
38 * IRQ_TYPE_NONE - default, unspecified type
39 * IRQ_TYPE_EDGE_RISING - rising edge triggered
40 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
41 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
42 * IRQ_TYPE_LEVEL_HIGH - high level triggered
43 * IRQ_TYPE_LEVEL_LOW - low level triggered
44 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
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Dinterrupt.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* interrupt.h */
24 * linux/ioport.h to select the interrupt line behaviour. When
25 * requesting an interrupt without specifying a IRQF_TRIGGER, the
42 * IRQF_SHARED - allow sharing the irq among several devices
43 * IRQF_PROBE_SHARED - set by callers when they expect sharing mismatches to occur
44 * IRQF_TIMER - Flag to mark this interrupt as timer interrupt
45 * IRQF_PERCPU - Interrupt is per cpu
46 * IRQF_NOBALANCING - Flag to exclude this interrupt from irq balancing
47 * IRQF_IRQPOLL - Interrupt is used for polling (only the interrupt that is
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Dmsi.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 * platform_msi_desc - Platform device specific msi descriptor data
43 * fsl_mc_msi_desc - FSL-MC device specific msi descriptor data
51 * ti_sci_inta_msi_desc - TISCI based INTA specific msi descriptor data
59 * struct msi_desc - Descriptor structure for MSI based interrupts
61 * @irq: The base interrupt number
65 * @affinity: Optional pointer to a cpu affinity mask for this descriptor
72 * @is_msix: [PCI MSI/X] True if MSI-X
75 * @maskbit: [PCI MSI/X] Mask-Pending bit supported?
78 * @default_irq:[PCI MSI/X] The default pre-assigned non-MSI irq
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/Linux-v5.4/drivers/infiniband/hw/hfi1/
Daffinity.c2 * Copyright(c) 2015 - 2018 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
50 #include <linux/interrupt.h>
54 #include "affinity.h"
76 cpumask_clear(&set->mask); in init_cpu_mask_set()
77 cpumask_clear(&set->used); in init_cpu_mask_set()
78 set->gen = 0; in init_cpu_mask_set()
84 if (cpumask_equal(&set->mask, &set->used)) { in _cpu_mask_set_gen_inc()
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/Linux-v5.4/drivers/iommu/
Dhyperv-iommu.c1 // SPDX-License-Identifier: GPL-2.0
4 * Hyper-V stub IOMMU driver.
12 #include <linux/interrupt.h>
29 * According 82093AA IO-APIC spec , IO APIC has a 24-entry Interrupt
30 * Redirection Table. Hyper-V exposes one single IO-APIC and so define
41 struct irq_data *parent = data->parent_data; in hyperv_ir_set_affinity()
46 /* Return error If new irq affinity is out of ioapic_max_cpumask. */ in hyperv_ir_set_affinity()
48 return -EINVAL; in hyperv_ir_set_affinity()
50 ret = parent->chip->irq_set_affinity(parent, mask, force); in hyperv_ir_set_affinity()
54 entry = data->chip_data; in hyperv_ir_set_affinity()
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/Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Generic Interrupt Controller, version 3
10 - Marc Zyngier <marc.zyngier@arm.com>
15 Software Generated Interrupts (SGI), and Locality-specific Peripheral
19 - $ref: /schemas/interrupt-controller.yaml#
24 - items:
25 - enum:
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/Linux-v5.4/drivers/perf/
Darm_pmu_platform.c1 // SPDX-License-Identifier: GPL-2.0
30 int ret = -ENODEV; in probe_current_pmu()
34 for (; info->init != NULL; info++) { in probe_current_pmu()
35 if ((cpuid & info->mask) != info->cpuid) in probe_current_pmu()
37 ret = info->init(pmu); in probe_current_pmu()
48 struct pmu_hw_events __percpu *hw_events = pmu->hw_events; in pmu_parse_percpu_irq()
50 ret = irq_get_percpu_devid_partition(irq, &pmu->supported_cpus); in pmu_parse_percpu_irq()
54 for_each_cpu(cpu, &pmu->supported_cpus) in pmu_parse_percpu_irq()
55 per_cpu(hw_events->irq, cpu) = irq; in pmu_parse_percpu_irq()
62 return !!of_find_property(node, "interrupt-affinity", NULL); in pmu_has_irq_affinity()
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/Linux-v5.4/Documentation/devicetree/bindings/arm/
Dpmu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Rutland <mark.rutland@arm.com>
11 - Will Deacon <will.deacon@arm.com>
16 representation in the device tree should be done as under:-
21 - enum:
22 - apm,potenza-pmu
23 - arm,armv8-pmuv3
24 - arm,cortex-a73-pmu
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/Linux-v5.4/Documentation/ia64/
Dirq-redir.rst2 IRQ affinity on IA64 platforms
8 By writing to /proc/irq/IRQ#/smp_affinity the interrupt routing can be
10 that described in Documentation/IRQ-affinity.txt for i386 systems.
14 CPUs. Only the first non-zero bit is taken into account.
21 first non-zero bit is the selected CPU. This format has been kept for
24 Set the delivery mode of interrupt 41 to fixed and route the
38 gives the target CPU mask for the specified interrupt vector. If the CPU
39 mask is preceded by the character "r", the interrupt is redirectable
49 IO-SAPIC interrupts are initialized with CPU#0 as their default target
55 - minimal for an idle task,
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/Linux-v5.4/block/
Dblk-mq-rdma.c1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/blk-mq.h>
6 #include <linux/blk-mq-rdma.h>
10 * blk_mq_rdma_map_queues - provide a default queue mapping for rdma device
13 * @first_vec: first interrupt vectors to use for queues (usually 0)
16 * interrupt vetors as @set has queues. It will then query it's affinity mask
17 * and built queue mapping that maps a queue to the CPUs that have irq affinity
21 * @set->nr_hw_queues, or @dev does not provide an affinity mask for a
30 for (queue = 0; queue < map->nr_queues; queue++) { in blk_mq_rdma_map_queues()
36 map->mq_map[cpu] = map->queue_offset + queue; in blk_mq_rdma_map_queues()
Dblk-mq-virtio.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/blk-mq.h>
7 #include <linux/blk-mq-virtio.h>
10 #include "blk-mq.h"
13 * blk_mq_virtio_map_queues - provide a default queue mapping for virtio device
16 * @first_vec: first interrupt vectors to use for queues (usually 0)
19 * interrupt vetors as @set has queues. It will then queuery the vector
20 * corresponding to each queue for it's affinity mask and built queue mapping
21 * that maps a queue to the CPUs that have irq affinity for the corresponding
30 if (!vdev->config->get_vq_affinity) in blk_mq_virtio_map_queues()
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Dblk-mq-pci.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/blk-mq.h>
8 #include <linux/blk-mq-pci.h>
12 #include "blk-mq.h"
15 * blk_mq_pci_map_queues - provide a default queue mapping for PCI device
21 * interrupt vectors as @set has queues. It will then query the vector
22 * corresponding to each queue for it's affinity mask and built queue mapping
23 * that maps a queue to the CPUs that have irq affinity for the corresponding
32 for (queue = 0; queue < qmap->nr_queues; queue++) { in blk_mq_pci_map_queues()
38 qmap->mq_map[cpu] = qmap->queue_offset + queue; in blk_mq_pci_map_queues()
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/Linux-v5.4/drivers/irqchip/
Dirq-bcm7038-l1.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Broadcom BCM7038 style Level 1 interrupt controller driver
14 #include <linux/interrupt.h>
42 u8 affinity[MAX_WORDS * IRQS_PER_WORD]; member
77 return (0 * intc->n_words + word) * sizeof(u32); in reg_status()
83 return (1 * intc->n_words + word) * sizeof(u32); in reg_mask_status()
89 return (2 * intc->n_words + word) * sizeof(u32); in reg_mask_set()
95 return (3 * intc->n_words + word) * sizeof(u32); in reg_mask_clr()
122 cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; in bcm7038_l1_irq_handle()
124 cpu = intc->cpus[0]; in bcm7038_l1_irq_handle()
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/Linux-v5.4/lib/
Dcpu_rmap.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cpu_rmap.c: CPU affinity reverse-map support
8 #include <linux/interrupt.h>
13 * objects with CPU affinities. This can be seen as a reverse-map of
14 * CPU affinity. However, we do not assume that the object affinities
21 * alloc_cpu_rmap - allocate CPU affinity reverse-map
39 rmap = kzalloc(obj_offset + size * sizeof(rmap->obj[0]), flags); in alloc_cpu_rmap()
43 kref_init(&rmap->refcount); in alloc_cpu_rmap()
44 rmap->obj = (void **)((char *)rmap + obj_offset); in alloc_cpu_rmap()
50 * any newly-hotplugged CPUs to have some object assigned. in alloc_cpu_rmap()
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/Linux-v5.4/arch/powerpc/sysdev/xics/
Dxics-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <linux/interrupt.h>
60 ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen); in xics_update_irq_servers()
68 /* Global interrupt distribution server is specified in the last in xics_update_irq_servers()
69 * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last in xics_update_irq_servers()
96 index = (1UL << xics_interrupt_server_size) - 1 - gserver; in xics_set_cpu_giq()
100 WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n", in xics_set_cpu_giq()
107 icp_ops->set_priority(LOWEST_PRIORITY); in xics_setup_cpu()
116 pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec); in xics_mask_unknown_vec()
119 ics->mask_unknown(ics, vec); in xics_mask_unknown_vec()
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/Linux-v5.4/arch/alpha/kernel/
Dsys_dp264.c1 // SPDX-License-Identifier: GPL-2.0
69 dim0 = &cchip->dim0.csr; in tsunami_update_irq_hw()
70 dim1 = &cchip->dim1.csr; in tsunami_update_irq_hw()
71 dim2 = &cchip->dim2.csr; in tsunami_update_irq_hw()
72 dim3 = &cchip->dim3.csr; in tsunami_update_irq_hw()
89 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()
90 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw()
91 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()
92 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw()
104 cached_irq_mask |= 1UL << d->irq; in dp264_enable_irq()
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/Linux-v5.4/drivers/virtio/
Dvirtio_pci_common.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Virtio PCI driver - APIs for common functionality for all device versions
23 #include <linux/interrupt.h>
38 /* MSI-X vector (or none) */
47 /* In legacy mode, these two point to within ->legacy. */
48 /* Where to read and clear interrupt */
52 /* The IO mapping for the PCI config space (non-legacy mode) */
54 /* Device-specific data (non-legacy mode) */
56 /* Base of vq notifications (non-legacy mode). */
59 /* So we can sanity-check accesses. */
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