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12

/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/power/imx8mp-power.h>
8 #include <dt-bindings/reset/imx8mp-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interconnect/fsl,imx8mp.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
15 #include "imx8mp-pinfunc.h"
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Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * DHCOM iMX8MP variant:
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
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Dimx8mp-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 #include <dt-bindings/net/ti-dp83867.h>
8 #include "imx8mp.dtsi"
11 model = "PHYTEC phyCORE-i.MX8MP";
12 compatible = "phytec,imx8mp-phycore-som", "fsl,imx8mp";
26 cpu-supply = <&buck2>;
30 cpu-supply = <&buck2>;
34 cpu-supply = <&buck2>;
38 cpu-supply = <&buck2>;
43 pinctrl-names = "default";
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Dimx8mp-tqma8mpql-mba8mpxl.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/net/ti-dp83867.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include "imx8mp-tqma8mpql.dtsi"
15 model = "TQ-Systems i.MX8MPlus TQMa8MPxL on MBa8MPxL";
16 compatible = "tq,imx8mp-tqma8mpql-mba8mpxl", "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
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Dimx8mp-tqma8mpql.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2021-2022 TQ-Systems GmbH
4 * Author: Alexander Stein <alexander.stein@tq-group.com>
7 #include "imx8mp.dtsi"
10 model = "TQ-Systems i.MX8MPlus TQMa8MPxL";
11 compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
19 reg_vcc3v3: regulator-vcc3v3 {
20 compatible = "regulator-fixed";
21 regulator-name = "VCC3V3";
22 regulator-min-microvolt = <3300000>;
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Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include "imx8mp.dtsi"
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 gpio-leds {
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_led>;
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Dimx8mp-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
6 #include "imx8mp.dtsi"
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 pinctrl-0 = <&pinctrl_enet_vio>;
30 pinctrl-names = "default";
31 regulator-always-on;
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Dimx8mp-venice-gw74xx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 #include "imx8mp.dtsi"
17 compatible = "gateworks,imx8mp-gw74xx", "fsl,imx8mp";
30 stdout-path = &uart2;
38 gpio-keys {
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Dimx8mp-msc-sm2s.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include "imx8mp.dtsi"
9 #include <dt-bindings/net/ti-dp83867.h>
18 stdout-path = &uart2;
21 reg_usb0_host_vbus: regulator-usb0-vbus {
22 compatible = "regulator-fixed";
23 regulator-name = "usb0_host_vbus";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_usb0_vbus>;
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/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dfsl,xcvr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viorel Suman <viorel.suman@nxp.com>
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
23 - fsl,imx8mp-xcvr
27 - description: 20K RAM for code and data
28 - description: registers space
29 - description: RX FIFO address
30 - description: TX FIFO address
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/Linux-v6.1/Documentation/devicetree/bindings/reset/
Dfsl,imx7-src.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX7 System Reset Controller
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
13 The system reset controller can be used to reset various set of
14 peripherals. Device nodes that need access to reset lines should
15 specify them as a reset phandle in their corresponding node as
16 specified in reset.txt.
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/Linux-v6.1/Documentation/devicetree/bindings/power/
Dfsl,imx-gpcv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/fsl,imx-gpcv2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrey Smirnov <andrew.smirnov@gmail.com>
18 Documentation/devicetree/bindings/power/power-domain.yaml, which are
21 IP cores belonging to a power domain should contain a 'power-domains'
27 - fsl,imx7d-gpc
28 - fsl,imx8mn-gpc
29 - fsl,imx8mq-gpc
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/Linux-v6.1/drivers/pci/controller/dwc/
Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
31 #include <linux/reset.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
54 IMX8MP, enumerator
104 /* PCIe Port Logic registers (memory-mapped) */
117 /* PHY registers (not memory-mapped) */
154 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
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/Linux-v6.1/Documentation/devicetree/bindings/watchdog/
Dfsl-imx-wdt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/watchdog/fsl-imx-wdt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Anson Huang <Anson.Huang@nxp.com>
13 - $ref: "watchdog.yaml#"
18 - const: fsl,imx21-wdt
19 - items:
20 - enum:
21 - fsl,imx25-wdt
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/Linux-v6.1/drivers/reset/
Dreset-imx7.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * i.MX7 System Reset Controller (SRC) driver
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/reset/imx7-reset.h>
17 #include <dt-bindings/reset/imx8mq-reset.h>
18 #include <dt-bindings/reset/imx8mp-reset.h>
51 const struct imx7_src_signal *signal = &imx7src->signals[id]; in imx7_reset_update()
53 return regmap_update_bits(imx7src->regmap, in imx7_reset_update()
54 signal->offset, signal->bit, value); in imx7_reset_update()
95 const unsigned int bit = imx7src->signals[id].bit; in imx7_reset_set()
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/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dfsl,imx-rproc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/remoteproc/fsl,imx-rproc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: NXP i.MX Co-Processor Bindings
10 This binding provides support for ARM Cortex M4 Co-processor found on some NXP iMX SoCs.
13 - Peng Fan <peng.fan@nxp.com>
18 - fsl,imx6sx-cm4
19 - fsl,imx7d-cm4
20 - fsl,imx7ulp-cm4
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/Linux-v6.1/drivers/soc/imx/
Dimx8mp-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include <dt-bindings/power/imx8mp-power.h>
79 switch (domain->id) { in imx8mp_hsio_blk_ctrl_power_on()
81 regmap_set_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
84 regmap_set_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_on()
87 regmap_set_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_on()
98 switch (domain->id) { in imx8mp_hsio_blk_ctrl_power_off()
100 regmap_clear_bits(bc->regmap, GPR_REG0, USB_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
103 regmap_clear_bits(bc->regmap, GPR_REG0, PCIE_CLOCK_MODULE_EN); in imx8mp_hsio_blk_ctrl_power_off()
106 regmap_clear_bits(bc->regmap, GPR_REG0, in imx8mp_hsio_blk_ctrl_power_off()
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Dimx8m-blk-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
17 #include <dt-bindings/power/imx8mm-power.h>
18 #include <dt-bindings/power/imx8mn-power.h>
19 #include <dt-bindings/power/imx8mp-power.h>
20 #include <dt-bindings/power/imx8mq-power.h>
49 * which is used to control the reset for the MIPI Phy.
51 * an if-statement should be used before setting and clearing this
86 const struct imx8m_blk_ctrl_domain_data *data = domain->data; in imx8m_blk_ctrl_power_on()
87 struct imx8m_blk_ctrl *bc = domain->bc; in imx8m_blk_ctrl_power_on()
91 ret = pm_runtime_get_sync(bc->bus_power_dev); in imx8m_blk_ctrl_power_on()
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Dgpcv2.c1 // SPDX-License-Identifier: GPL-2.0+
8 * Copyright 2015-2017 Pengutronix, Lucas Stach <kernel@pengutronix.de>
18 #include <linux/reset.h>
20 #include <dt-bindings/power/imx7-power.h>
21 #include <dt-bindings/power/imx8mq-power.h>
22 #include <dt-bindings/power/imx8mm-power.h>
23 #include <dt-bindings/power/imx8mn-power.h>
24 #include <dt-bindings/power/imx8mp-power.h>
282 struct reset_control *reset; member
322 ret = pm_runtime_get_sync(domain->dev); in imx_pgc_power_up()
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/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
15 and thus inherits all the common properties defined in snps,dw-pcie.yaml.
18 - $ref: /schemas/pci/snps,dw-pcie.yaml#
23 - fsl,imx6q-pcie
24 - fsl,imx6sx-pcie
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/Linux-v6.1/Documentation/devicetree/bindings/media/
Dnxp,imx-mipi-csi2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx-mipi-csi2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX7 and i.MX8 MIPI CSI-2 receiver
10 - Rui Miguel Silva <rmfrfs@gmail.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
13 description: |-
14 The NXP i.MX7 and i.MX8 families contain SoCs that include a MIPI CSI-2
19 While the CSI-2 receiver is separate from the MIPI D-PHY IP core, the PHY is
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/Linux-v6.1/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joakim Zhang <qiangqing.zhang@nxp.com>
13 - $ref: ethernet-controller.yaml#
18 - enum:
19 - fsl,imx25-fec
20 - fsl,imx27-fec
21 - fsl,imx28-fec
22 - fsl,imx6q-fec
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/Linux-v6.1/sound/soc/fsl/
Dfsl_xcvr.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/reset.h>
18 #include "imx-pcm.h"
34 struct reset_control *reset; member
59 * HDMI2.1 spec defines 6- and 12-channels layout for one bit audio
97 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in fsl_xcvr_arc_mode_put()
98 unsigned int *item = ucontrol->value.enumerated.item; in fsl_xcvr_arc_mode_put()
100 xcvr->arc_mode = snd_soc_enum_item_to_val(e, item[0]); in fsl_xcvr_arc_mode_put()
111 ucontrol->value.enumerated.item[0] = xcvr->arc_mode; in fsl_xcvr_arc_mode_get()
131 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES; in fsl_xcvr_type_capds_bytes_info()
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/Linux-v6.1/sound/soc/sof/imx/
Dimx8m.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
23 #include "../sof-of-dev.h"
24 #include "imx-common.h"
78 spin_lock_irqsave(&priv->sdev->ipc_lock, flags); in imx8m_dsp_handle_reply()
79 snd_sof_ipc_process_reply(priv->sdev, 0); in imx8m_dsp_handle_reply()
80 spin_unlock_irqrestore(&priv->sdev->ipc_lock, flags); in imx8m_dsp_handle_reply()
89 sof_mailbox_read(priv->sdev, priv->sdev->debug_box.offset + 4, &p, sizeof(p)); in imx8m_dsp_handle_request()
93 snd_sof_dsp_panic(priv->sdev, p, true); in imx8m_dsp_handle_request()
95 snd_sof_ipc_msgs_rx(priv->sdev); in imx8m_dsp_handle_request()
105 struct imx8m_priv *priv = sdev->pdata->hw_pdata; in imx8m_send_msg()
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/Linux-v6.1/drivers/remoteproc/
Dimx_dsp_rproc.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <dt-bindings/firmware/imx/rsrc.h>
5 #include <linux/arm-smccc.h>
69 * enum - Predefined Mailbox Messages
89 * struct imx_dsp_rproc - DSP remote processor state
127 * struct imx_dsp_rproc_dcfg - DSP remote processor configuration
129 * @reset: reset callback function
133 int (*reset)(struct imx_dsp_rproc *priv); member
175 /* Reset function for DSP on i.MX8MP */
181 /* Put DSP into reset and stall */ in imx8mp_dsp_reset()
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