Searched +full:imx8mm +full:- +full:ddrc (Results 1 – 7 of 7) sorted by relevance
/Linux-v5.10/Documentation/devicetree/bindings/interconnect/ |
D | fsl,imx8m-noc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Leonard Crestez <leonard.crestez@nxp.com> 18 for normal (non-secure) world. 20 The buses are based on externally licensed IPs such as ARM NIC-301 and 27 - items: 28 - enum: 29 - fsl,imx8mn-nic [all …]
|
/Linux-v5.10/Documentation/devicetree/bindings/memory-controllers/fsl/ |
D | imx8m-ddrc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Leonard Crestez <leonard.crestez@nxp.com> 13 The DDRC block is integrated in i.MX8M for interfacing with DDR based 18 switching is implemented by TF-A code which runs from a SRAM area. 20 The Linux driver for the DDRC doesn't even map registers (they're included 27 - enum: 28 - fsl,imx8mn-ddrc [all …]
|
/Linux-v5.10/arch/arm64/boot/dts/freescale/ |
D | imx8mm-evk.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2019-2020 NXP 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 9 #include "imx8mm-evk.dtsi" 13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm"; 20 &ddrc { 21 operating-points-v2 = <&ddrc_opp_table>; 23 ddrc_opp_table: opp-table { 24 compatible = "operating-points-v2"; [all …]
|
D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mm-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
|
D | imx8mn.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mn-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8mn-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
|
D | imx8mm-var-som.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "imx8mm.dtsi" 10 model = "Variscite VAR-SOM-MX8MM module"; 11 compatible = "variscite,var-som-mx8mm", "fsl,imx8mm"; 14 stdout-path = &uart4; 22 reg_eth_phy: regulator-eth-phy { 23 compatible = "regulator-fixed"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_reg_eth_phy>; 26 regulator-name = "eth_phy_pwr"; [all …]
|
/Linux-v5.10/drivers/interconnect/imx/ |
D | imx8mm.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Copyright (c) 2019-2020, NXP 13 #include <dt-bindings/interconnect/imx8mm.h> 20 .phandle_name = "fsl,ddrc", 98 .name = "imx8mm-interconnect", 105 MODULE_ALIAS("platform:imx8mm-interconnect");
|