| /Linux-v5.10/sound/soc/samsung/ |
| D | idma.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 // idma.c - I2S0 internal DMA driver
10 #include <linux/dma-mapping.h>
18 #include "idma.h"
19 #include "i2s-regs.h"
54 } idma; variable
60 *src = idma.lp_tx_addr + in idma_getpos()
61 (readl(idma.regs + I2STRNCNT) & 0xffffff) * 4; in idma_getpos()
66 struct snd_pcm_runtime *runtime = substream->runtime; in idma_enqueue()
67 struct idma_ctrl *prtd = substream->runtime->private_data; in idma_enqueue()
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| D | i2s.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // ALSA SoC Audio Layer - Samsung I2S Controller driver
8 #include <dt-bindings/sound/samsung-i2s.h>
12 #include <linux/clk-provider.h>
23 #include <linux/platform_data/asoc-s3c.h>
26 #include "idma.h"
28 #include "i2s-regs.h"
124 void __iomem *addr; member
133 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; in is_secondary()
144 active = readl(i2s->priv->addr + I2SCON); in tx_active()
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| /Linux-v5.10/arch/arm/mach-rpc/ |
| D | dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-rpc/dma.c
12 #include <linux/dma-mapping.h>
48 #define ENDA (IOMD_IO0ENDA - IOMD_IO0CURA)
49 #define CURB (IOMD_IO0CURB - IOMD_IO0CURA)
50 #define ENDB (IOMD_IO0ENDB - IOMD_IO0CURA)
51 #define CR (IOMD_IO0CR - IOMD_IO0CURA)
52 #define ST (IOMD_IO0ST - IOMD_IO0CURA)
54 static void iomd_get_next_sg(struct iomd_dma *idma) in iomd_get_next_sg() argument
58 if (idma->dma.sg) { in iomd_get_next_sg()
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| /Linux-v5.10/Documentation/devicetree/bindings/sound/ |
| D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
29 samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
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| /Linux-v5.10/drivers/net/ethernet/chelsio/cxgb4/ |
| D | t4_hw.c | 4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
43 * t4_wait_op_done_val - wait until an operation is completed
46 * @mask: a single-bit field within @reg that indicates completion
55 * operation completes and -EAGAIN otherwise.
68 if (--attempts == 0) in t4_wait_op_done_val()
69 return -EAGAIN; in t4_wait_op_done_val()
83 * t4_set_reg_field - set a register field to a value
85 * @addr: the register address
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| D | cxgb4.h | 4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
61 #define CH_WARN(adap, fmt, ...) dev_warn(adap->pdev_dev, fmt, ## __VA_ARGS__)
138 FEC_RS = 1 << 1, /* Reed-Solomon */
139 FEC_BASER_RS = 1 << 2 /* BaseR/Reed-Solomon */
262 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */
263 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */
264 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */
265 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */
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| /Linux-v5.10/drivers/media/pci/ddbridge/ |
| D | ddbridge.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2010-2017 Digital Devices GmbH
59 #define DDBRIDGE_VERSION "0.9.33-integrated"
83 const struct ddb_regset *idma; member
338 struct ddb_dma idma[DDB_MAX_INPUT]; member
359 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len);
363 /* ddbridge-core.c */
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| D | ddbridge-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ddbridge-core.c: Digital Devices bridge core functions
5 * Copyright (C) 2010-2017 Digital Devices GmbH
34 #include "ddbridge-i2c.h"
35 #include "ddbridge-regs.h"
36 #include "ddbridge-max.h"
37 #include "ddbridge-ci.h"
38 #include "ddbridge-io.h"
53 #include "ddbridge-dummy-fe.h"
66 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
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| /Linux-v5.10/arch/powerpc/include/asm/ |
| D | cpm2.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
27 /* Device sub-block and page codes.
72 /* CPM2-specific opcodes (see cpm.h for common opcodes)
157 * get some microcode patches :-).
158 * The parameter ram space for the SMCs is fifty-some bytes, and
357 uint sen_tbuf0data0; /* Save area 0 - current frame */
358 uint sen_tbuf0data1; /* Save area 1 - current frame */
369 uint sen_tbuf1data0; /* Save area 0 - current frame */
370 uint sen_tbuf1data1; /* Save area 1 - current frame */
555 uint fen_gaddrh; /* Group address filter, high 32-bits */
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| /Linux-v5.10/drivers/usb/atm/ |
| D | ueagle-atm.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
6 * Copyright (c) 2005-2007 Matthieu Castet <castet.matthieu@free.fr>
7 * Copyright (c) 2005-2007 Stanislaw Gruszka <stf_xl@wp.pl>
41 dev_dbg(&(usb_dev)->dev, \
42 "[ueagle-atm dbg] %s: " format, \
49 dev_dbg(&(usb_dev)->dev, \
50 "[ueagle-atm vdbg] " format, ##args); \
60 dev_err(&(usb_dev)->dev , "[UEAGLE-ATM] " format , ##args)
63 dev_warn(&(usb_dev)->dev , "[Ueagle-atm] " format, ##args)
66 dev_info(&(usb_dev)->dev , "[ueagle-atm] " format, ##args)
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | exynos5410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
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| D | s5pv210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd.
19 #include <dt-bindings/clock/s5pv210.h>
20 #include <dt-bindings/clock/s5pv210-audss.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
45 #address-cells = <1>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a8";
55 xxti: oscillator-0 {
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| D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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| D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
55 compatible = "arm,cortex-a15";
58 clock-names = "cpu";
59 operating-points-v2 = <&cpu0_opp_table>;
60 #cooling-cells = <2>; /* min followed by max */
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| D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-1800000000 {
50 opp-hz = /bits/ 64 <1800000000>;
51 opp-microvolt = <1250000 1250000 1500000>;
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| /Linux-v5.10/drivers/mfd/ |
| D | intel-lpss.c | 1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
27 #include <linux/io-64-nonatomic-lo-hi.h>
31 #include "intel-lpss.h"
41 /* Offsets from lpss->priv */
100 * Cells needs to be ordered so that the iDMA is created first. This is
117 .name = "dw-apb-uart",
123 .name = "pxa2xx-spi",
133 lpss->active_ltr = readl(lpss->priv + LPSS_PRIV_ACTIVELTR); in intel_lpss_cache_ltr()
134 lpss->idle_ltr = readl(lpss->priv + LPSS_PRIV_IDLELTR); in intel_lpss_cache_ltr()
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| /Linux-v5.10/drivers/usb/gadget/udc/ |
| D | fusb300_udc.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
9 #include <linux/dma-mapping.h>
22 MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>");
39 u32 reg = ioread32(fusb300->reg + offset); in fusb300_enable_bit()
42 iowrite32(reg, fusb300->reg + offset); in fusb300_enable_bit()
48 u32 reg = ioread32(fusb300->reg + offset); in fusb300_disable_bit()
51 iowrite32(reg, fusb300->reg + offset); in fusb300_disable_bit()
58 ep->epnum = info.epnum; in fusb300_ep_setting()
59 ep->type = info.type; in fusb300_ep_setting()
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| /Linux-v5.10/sound/pci/ |
| D | es1968.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Rewritted from card-es1938.c source.
27 * encoding. The codecs are almost always AC-97 compliant codecs,
88 #include <linux/dma-mapping.h>
102 #include <media/drv-intf/tea575x.h>
119 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 1-MAX */
122 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
123 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
124 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
126 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
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| /Linux-v5.10/drivers/scsi/qla2xxx/ |
| D | qla_def.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
132 static inline u8 rd_reg_byte(const volatile u8 __iomem *addr) in rd_reg_byte() argument
134 return readb(addr); in rd_reg_byte()
137 static inline u16 rd_reg_word(const volatile __le16 __iomem *addr) in rd_reg_word() argument
139 return readw(addr); in rd_reg_word()
142 static inline u32 rd_reg_dword(const volatile __le32 __iomem *addr) in rd_reg_dword() argument
144 return readl(addr); in rd_reg_dword()
147 static inline u8 rd_reg_byte_relaxed(const volatile u8 __iomem *addr) in rd_reg_byte_relaxed() argument
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| /Linux-v5.10/drivers/mmc/host/ |
| D | dw_mmc.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
37 #include <linux/mmc/slot-gpio.h>
72 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
77 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
78 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
80 u32 des6; /* Lower 32-bits of Next Descriptor Address */
81 u32 des7; /* Upper 32-bits of Next Descriptor Address */
96 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
109 struct dw_mci_slot *slot = s->private; in dw_mci_req_show()
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