Lines Matching +full:idma +full:- +full:addr
1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
37 #include <linux/mmc/slot-gpio.h>
72 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
77 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
78 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
80 u32 des6; /* Lower 32-bits of Next Descriptor Address */
81 u32 des7; /* Upper 32-bits of Next Descriptor Address */
96 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
109 struct dw_mci_slot *slot = s->private; in dw_mci_req_show()
116 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
117 mrq = slot->mrq; in dw_mci_req_show()
120 cmd = mrq->cmd; in dw_mci_req_show()
121 data = mrq->data; in dw_mci_req_show()
122 stop = mrq->stop; in dw_mci_req_show()
127 cmd->opcode, cmd->arg, cmd->flags, in dw_mci_req_show()
128 cmd->resp[0], cmd->resp[1], cmd->resp[2], in dw_mci_req_show()
129 cmd->resp[2], cmd->error); in dw_mci_req_show()
132 data->bytes_xfered, data->blocks, in dw_mci_req_show()
133 data->blksz, data->flags, data->error); in dw_mci_req_show()
137 stop->opcode, stop->arg, stop->flags, in dw_mci_req_show()
138 stop->resp[0], stop->resp[1], stop->resp[2], in dw_mci_req_show()
139 stop->resp[2], stop->error); in dw_mci_req_show()
142 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
150 struct dw_mci *host = s->private; in dw_mci_regs_show()
152 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
161 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
169 struct mmc_host *mmc = slot->mmc; in dw_mci_init_debugfs()
170 struct dw_mci *host = slot->host; in dw_mci_init_debugfs()
173 root = mmc->debugfs_root; in dw_mci_init_debugfs()
179 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
181 &host->pending_events); in dw_mci_init_debugfs()
183 &host->completed_events); in dw_mci_init_debugfs()
196 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
199 dev_err(host->dev, in dw_mci_ctrl_reset()
222 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
226 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
232 struct dw_mci *host = slot->host; in mci_send_cmd()
240 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
243 dev_err(&slot->mmc->class_dev, in mci_send_cmd()
251 struct dw_mci *host = slot->host; in dw_mci_prepare_command()
254 cmd->error = -EINPROGRESS; in dw_mci_prepare_command()
255 cmdr = cmd->opcode; in dw_mci_prepare_command()
257 if (cmd->opcode == MMC_STOP_TRANSMISSION || in dw_mci_prepare_command()
258 cmd->opcode == MMC_GO_IDLE_STATE || in dw_mci_prepare_command()
259 cmd->opcode == MMC_GO_INACTIVE_STATE || in dw_mci_prepare_command()
260 (cmd->opcode == SD_IO_RW_DIRECT && in dw_mci_prepare_command()
261 ((cmd->arg >> 9) & 0x1FFFF) == SDIO_CCCR_ABORT)) in dw_mci_prepare_command()
263 else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) in dw_mci_prepare_command()
266 if (cmd->opcode == SD_SWITCH_VOLTAGE) { in dw_mci_prepare_command()
273 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
274 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
284 * ever called with a non-zero clock. That shouldn't happen in dw_mci_prepare_command()
288 clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id); in dw_mci_prepare_command()
294 if (cmd->flags & MMC_RSP_PRESENT) { in dw_mci_prepare_command()
297 if (cmd->flags & MMC_RSP_136) in dw_mci_prepare_command()
301 if (cmd->flags & MMC_RSP_CRC) in dw_mci_prepare_command()
304 if (cmd->data) { in dw_mci_prepare_command()
306 if (cmd->data->flags & MMC_DATA_WRITE) in dw_mci_prepare_command()
310 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &slot->flags)) in dw_mci_prepare_command()
321 if (!cmd->data) in dw_mci_prep_stop_abort()
324 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
325 cmdr = cmd->opcode; in dw_mci_prep_stop_abort()
334 stop->opcode = MMC_STOP_TRANSMISSION; in dw_mci_prep_stop_abort()
335 stop->arg = 0; in dw_mci_prep_stop_abort()
336 stop->flags = MMC_RSP_R1B | MMC_CMD_AC; in dw_mci_prep_stop_abort()
338 stop->opcode = SD_IO_RW_DIRECT; in dw_mci_prep_stop_abort()
339 stop->arg |= (1 << 31) | (0 << 28) | (SDIO_CCCR_ABORT << 9) | in dw_mci_prep_stop_abort()
340 ((cmd->arg >> 28) & 0x7); in dw_mci_prep_stop_abort()
341 stop->flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC; in dw_mci_prep_stop_abort()
346 cmdr = stop->opcode | SDMMC_CMD_STOP | in dw_mci_prep_stop_abort()
349 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
368 host->bus_hz); in dw_mci_set_cto()
386 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
387 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
388 mod_timer(&host->cto_timer, in dw_mci_set_cto()
390 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
396 host->cmd = cmd; in dw_mci_start_command()
397 dev_vdbg(host->dev, in dw_mci_start_command()
399 cmd->arg, cmd_flags); in dw_mci_start_command()
401 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
414 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
416 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
422 if (host->using_dma) { in dw_mci_stop_dma()
423 host->dma_ops->stop(host); in dw_mci_stop_dma()
424 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
428 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
433 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
435 if (data && data->host_cookie == COOKIE_MAPPED) { in dw_mci_dma_cleanup()
436 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
437 data->sg, in dw_mci_dma_cleanup()
438 data->sg_len, in dw_mci_dma_cleanup()
440 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_dma_cleanup()
472 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
474 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
476 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
477 data && (data->flags & MMC_DATA_READ)) in dw_mci_dmac_complete_dma()
479 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
480 data->sg, in dw_mci_dmac_complete_dma()
481 data->sg_len, in dw_mci_dmac_complete_dma()
484 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
491 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
492 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
500 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
503 host->ring_size = in dw_mci_idmac_init()
507 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
509 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
513 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
517 p->des0 = 0; in dw_mci_idmac_init()
518 p->des1 = 0; in dw_mci_idmac_init()
519 p->des2 = 0; in dw_mci_idmac_init()
520 p->des3 = 0; in dw_mci_idmac_init()
523 /* Set the last descriptor as the end-of-ring descriptor */ in dw_mci_idmac_init()
524 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
525 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
526 p->des0 = IDMAC_DES0_ER; in dw_mci_idmac_init()
531 host->ring_size = in dw_mci_idmac_init()
535 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
536 i < host->ring_size - 1; in dw_mci_idmac_init()
538 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
540 p->des0 = 0; in dw_mci_idmac_init()
541 p->des1 = 0; in dw_mci_idmac_init()
544 /* Set the last descriptor as the end-of-ring descriptor */ in dw_mci_idmac_init()
545 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
546 p->des0 = cpu_to_le32(IDMAC_DES0_ER); in dw_mci_idmac_init()
551 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
552 /* Mask out interrupts - get Tx & Rx complete only */ in dw_mci_idmac_init()
558 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
559 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
562 /* Mask out interrupts - get Tx & Rx complete only */ in dw_mci_idmac_init()
568 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
583 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
586 unsigned int length = sg_dma_len(&data->sg[i]); in dw_mci_prepare_desc64()
588 u64 mem_addr = sg_dma_address(&data->sg[i]); in dw_mci_prepare_desc64()
594 length -= desc_len; in dw_mci_prepare_desc64()
602 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc64()
611 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | in dw_mci_prepare_desc64()
618 desc->des4 = mem_addr & 0xffffffff; in dw_mci_prepare_desc64()
619 desc->des5 = mem_addr >> 32; in dw_mci_prepare_desc64()
630 desc_first->des0 |= IDMAC_DES0_FD; in dw_mci_prepare_desc64()
633 desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); in dw_mci_prepare_desc64()
634 desc_last->des0 |= IDMAC_DES0_LD; in dw_mci_prepare_desc64()
639 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
640 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
642 return -EINVAL; in dw_mci_prepare_desc64()
655 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
658 unsigned int length = sg_dma_len(&data->sg[i]); in dw_mci_prepare_desc32()
660 u32 mem_addr = sg_dma_address(&data->sg[i]); in dw_mci_prepare_desc32()
666 length -= desc_len; in dw_mci_prepare_desc32()
674 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc32()
684 desc->des0 = cpu_to_le32(IDMAC_DES0_OWN | in dw_mci_prepare_desc32()
692 desc->des2 = cpu_to_le32(mem_addr); in dw_mci_prepare_desc32()
703 desc_first->des0 |= cpu_to_le32(IDMAC_DES0_FD); in dw_mci_prepare_desc32()
706 desc_last->des0 &= cpu_to_le32(~(IDMAC_DES0_CH | in dw_mci_prepare_desc32()
708 desc_last->des0 |= cpu_to_le32(IDMAC_DES0_LD); in dw_mci_prepare_desc32()
713 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
714 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
716 return -EINVAL; in dw_mci_prepare_desc32()
724 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
725 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
727 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
769 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
777 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
779 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
781 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
785 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
795 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
800 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
802 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
803 return -EBUSY; in dw_mci_edmac_start_dma()
806 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
810 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
811 return -EBUSY; in dw_mci_edmac_start_dma()
815 desc->callback = dw_mci_dmac_complete_dma; in dw_mci_edmac_start_dma()
816 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
820 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
821 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
824 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
832 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
833 if (!host->dms) in dw_mci_edmac_init()
834 return -ENOMEM; in dw_mci_edmac_init()
836 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
837 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
838 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
840 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
841 kfree(host->dms); in dw_mci_edmac_init()
842 host->dms = NULL; in dw_mci_edmac_init()
851 if (host->dms) { in dw_mci_edmac_exit()
852 if (host->dms->ch) { in dw_mci_edmac_exit()
853 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
854 host->dms->ch = NULL; in dw_mci_edmac_exit()
856 kfree(host->dms); in dw_mci_edmac_exit()
857 host->dms = NULL; in dw_mci_edmac_exit()
877 if (data->host_cookie == COOKIE_PRE_MAPPED) in dw_mci_pre_dma_transfer()
878 return data->sg_len; in dw_mci_pre_dma_transfer()
882 * non-word-aligned buffers or lengths. Also, we don't bother in dw_mci_pre_dma_transfer()
885 if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) in dw_mci_pre_dma_transfer()
886 return -EINVAL; in dw_mci_pre_dma_transfer()
888 if (data->blksz & 3) in dw_mci_pre_dma_transfer()
889 return -EINVAL; in dw_mci_pre_dma_transfer()
891 for_each_sg(data->sg, sg, data->sg_len, i) { in dw_mci_pre_dma_transfer()
892 if (sg->offset & 3 || sg->length & 3) in dw_mci_pre_dma_transfer()
893 return -EINVAL; in dw_mci_pre_dma_transfer()
896 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
897 data->sg, in dw_mci_pre_dma_transfer()
898 data->sg_len, in dw_mci_pre_dma_transfer()
901 return -EINVAL; in dw_mci_pre_dma_transfer()
903 data->host_cookie = cookie; in dw_mci_pre_dma_transfer()
912 struct mmc_data *data = mrq->data; in dw_mci_pre_req()
914 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
918 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_pre_req()
920 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
922 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_pre_req()
930 struct mmc_data *data = mrq->data; in dw_mci_post_req()
932 if (!slot->host->use_dma || !data) in dw_mci_post_req()
935 if (data->host_cookie != COOKIE_UNMAPPED) in dw_mci_post_req()
936 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
937 data->sg, in dw_mci_post_req()
938 data->sg_len, in dw_mci_post_req()
940 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_post_req()
947 struct dw_mci *host = slot->host; in dw_mci_get_cd()
951 if (((mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_get_cd()
955 if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { in dw_mci_get_cd()
956 if (mmc->caps & MMC_CAP_NEEDS_POLL) { in dw_mci_get_cd()
957 dev_info(&mmc->class_dev, in dw_mci_get_cd()
960 dev_info(&mmc->class_dev, in dw_mci_get_cd()
961 "card is non-removable.\n"); in dw_mci_get_cd()
963 set_bit(DW_MMC_CARD_PRESENT, &slot->flags); in dw_mci_get_cd()
970 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
973 spin_lock_bh(&host->lock); in dw_mci_get_cd()
974 if (present && !test_and_set_bit(DW_MMC_CARD_PRESENT, &slot->flags)) in dw_mci_get_cd()
975 dev_dbg(&mmc->class_dev, "card is present\n"); in dw_mci_get_cd()
977 !test_and_clear_bit(DW_MMC_CARD_PRESENT, &slot->flags)) in dw_mci_get_cd()
978 dev_dbg(&mmc->class_dev, "card is not present\n"); in dw_mci_get_cd()
979 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
986 unsigned int blksz = data->blksz; in dw_mci_adjust_fifoth()
988 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
991 int idx = ARRAY_SIZE(mszs) - 1; in dw_mci_adjust_fifoth()
994 if (!host->use_dma) in dw_mci_adjust_fifoth()
997 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
998 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1011 rx_wmark = mszs[idx] - 1; in dw_mci_adjust_fifoth()
1014 } while (--idx > 0); in dw_mci_adjust_fifoth()
1026 unsigned int blksz = data->blksz; in dw_mci_ctrl_thld()
1035 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1036 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1043 if (data->flags & MMC_DATA_WRITE && in dw_mci_ctrl_thld()
1044 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1047 if (data->flags & MMC_DATA_WRITE) in dw_mci_ctrl_thld()
1052 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1053 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1054 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1057 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1058 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1082 host->using_dma = 0; in dw_mci_submit_data_dma()
1085 if (!host->use_dma) in dw_mci_submit_data_dma()
1086 return -ENODEV; in dw_mci_submit_data_dma()
1090 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1094 host->using_dma = 1; in dw_mci_submit_data_dma()
1096 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1097 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1099 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1100 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1108 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1117 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1121 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1123 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1124 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1126 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1129 return -ENODEV; in dw_mci_submit_data_dma()
1141 data->error = -EINPROGRESS; in dw_mci_submit_data()
1143 WARN_ON(host->data); in dw_mci_submit_data()
1144 host->sg = NULL; in dw_mci_submit_data()
1145 host->data = data; in dw_mci_submit_data()
1147 if (data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1148 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1150 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1155 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1160 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1161 host->sg = data->sg; in dw_mci_submit_data()
1162 host->part_buf_start = 0; in dw_mci_submit_data()
1163 host->part_buf_count = 0; in dw_mci_submit_data()
1167 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1171 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1183 if (host->wm_aligned) in dw_mci_submit_data()
1186 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1187 host->prev_blksz = 0; in dw_mci_submit_data()
1194 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1200 struct dw_mci *host = slot->host; in dw_mci_setup_bus()
1201 unsigned int clock = slot->clock; in dw_mci_setup_bus()
1207 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1210 slot->mmc->actual_clock = 0; in dw_mci_setup_bus()
1215 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1216 div = host->bus_hz / clock; in dw_mci_setup_bus()
1217 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1220 * over-clocking the card. in dw_mci_setup_bus()
1224 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1226 if ((clock != slot->__clk_old && in dw_mci_setup_bus()
1227 !test_bit(DW_MMC_CARD_NEEDS_POLL, &slot->flags)) || in dw_mci_setup_bus()
1231 dev_info(&slot->mmc->class_dev, in dw_mci_setup_bus()
1233 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1234 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1235 host->bus_hz, div); in dw_mci_setup_bus()
1241 if (slot->mmc->caps & MMC_CAP_NEEDS_POLL && in dw_mci_setup_bus()
1242 slot->mmc->f_min == clock) in dw_mci_setup_bus()
1243 set_bit(DW_MMC_CARD_NEEDS_POLL, &slot->flags); in dw_mci_setup_bus()
1260 clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; in dw_mci_setup_bus()
1261 if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags)) in dw_mci_setup_bus()
1262 clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; in dw_mci_setup_bus()
1269 slot->__clk_old = clock; in dw_mci_setup_bus()
1270 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1271 host->bus_hz; in dw_mci_setup_bus()
1274 host->current_speed = clock; in dw_mci_setup_bus()
1277 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1288 mrq = slot->mrq; in __dw_mci_start_request()
1290 host->mrq = mrq; in __dw_mci_start_request()
1292 host->pending_events = 0; in __dw_mci_start_request()
1293 host->completed_events = 0; in __dw_mci_start_request()
1294 host->cmd_status = 0; in __dw_mci_start_request()
1295 host->data_status = 0; in __dw_mci_start_request()
1296 host->dir_status = 0; in __dw_mci_start_request()
1298 data = cmd->data; in __dw_mci_start_request()
1301 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1302 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1305 cmdflags = dw_mci_prepare_command(slot->mmc, cmd); in __dw_mci_start_request()
1308 if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) in __dw_mci_start_request()
1318 if (cmd->opcode == SD_SWITCH_VOLTAGE) { in __dw_mci_start_request()
1331 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1332 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1333 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1335 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1338 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1344 struct mmc_request *mrq = slot->mrq; in dw_mci_start_request()
1347 cmd = mrq->sbc ? mrq->sbc : mrq->cmd; in dw_mci_start_request()
1351 /* must be called with host->lock held */
1355 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", in dw_mci_queue_request()
1356 host->state); in dw_mci_queue_request()
1358 slot->mrq = mrq; in dw_mci_queue_request()
1360 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1361 dev_warn(&slot->mmc->class_dev, in dw_mci_queue_request()
1368 host->state = STATE_IDLE; in dw_mci_queue_request()
1371 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1372 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1375 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1382 struct dw_mci *host = slot->host; in dw_mci_request()
1384 WARN_ON(slot->mrq); in dw_mci_request()
1393 mrq->cmd->error = -ENOMEDIUM; in dw_mci_request()
1398 spin_lock_bh(&host->lock); in dw_mci_request()
1402 spin_unlock_bh(&host->lock); in dw_mci_request()
1408 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1412 switch (ios->bus_width) { in dw_mci_set_ios()
1414 slot->ctype = SDMMC_CTYPE_4BIT; in dw_mci_set_ios()
1417 slot->ctype = SDMMC_CTYPE_8BIT; in dw_mci_set_ios()
1421 slot->ctype = SDMMC_CTYPE_1BIT; in dw_mci_set_ios()
1424 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1427 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_set_ios()
1428 ios->timing == MMC_TIMING_UHS_DDR50 || in dw_mci_set_ios()
1429 ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_set_ios()
1430 regs |= ((0x1 << slot->id) << 16); in dw_mci_set_ios()
1432 regs &= ~((0x1 << slot->id) << 16); in dw_mci_set_ios()
1434 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1435 slot->host->timing = ios->timing; in dw_mci_set_ios()
1438 * Use mirror of ios->clock to prevent race with mmc in dw_mci_set_ios()
1441 slot->clock = ios->clock; in dw_mci_set_ios()
1443 if (drv_data && drv_data->set_ios) in dw_mci_set_ios()
1444 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1446 switch (ios->power_mode) { in dw_mci_set_ios()
1448 if (!IS_ERR(mmc->supply.vmmc)) { in dw_mci_set_ios()
1449 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, in dw_mci_set_ios()
1450 ios->vdd); in dw_mci_set_ios()
1452 dev_err(slot->host->dev, in dw_mci_set_ios()
1458 set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); in dw_mci_set_ios()
1459 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1460 regs |= (1 << slot->id); in dw_mci_set_ios()
1461 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1464 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1465 if (!IS_ERR(mmc->supply.vqmmc)) { in dw_mci_set_ios()
1466 ret = regulator_enable(mmc->supply.vqmmc); in dw_mci_set_ios()
1468 dev_err(slot->host->dev, in dw_mci_set_ios()
1471 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1475 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1479 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1491 if (!IS_ERR(mmc->supply.vmmc)) in dw_mci_set_ios()
1492 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in dw_mci_set_ios()
1494 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1495 regulator_disable(mmc->supply.vqmmc); in dw_mci_set_ios()
1496 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1498 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1499 regs &= ~(1 << slot->id); in dw_mci_set_ios()
1500 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1506 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1507 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1519 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1527 struct dw_mci *host = slot->host; in dw_mci_switch_voltage()
1528 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1530 u32 v18 = SDMMC_UHS_18V << slot->id; in dw_mci_switch_voltage()
1533 if (drv_data && drv_data->switch_voltage) in dw_mci_switch_voltage()
1534 return drv_data->switch_voltage(mmc, ios); in dw_mci_switch_voltage()
1542 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) in dw_mci_switch_voltage()
1547 if (!IS_ERR(mmc->supply.vqmmc)) { in dw_mci_switch_voltage()
1550 dev_dbg(&mmc->class_dev, in dw_mci_switch_voltage()
1551 "Regulator set error %d - %s V\n", in dw_mci_switch_voltage()
1572 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1574 dev_dbg(&mmc->class_dev, "card is %s\n", in dw_mci_get_ro()
1575 read_only ? "read-only" : "read-write"); in dw_mci_get_ro()
1583 struct dw_mci *host = slot->host; in dw_mci_hw_reset()
1586 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1600 reset &= ~(SDMMC_RST_HWACTIVE << slot->id); in dw_mci_hw_reset()
1603 reset |= SDMMC_RST_HWACTIVE << slot->id; in dw_mci_hw_reset()
1611 struct dw_mci *host = slot->host; in dw_mci_init_card()
1618 if (mmc->caps & MMC_CAP_SDIO_IRQ) { in dw_mci_init_card()
1619 const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id; in dw_mci_init_card()
1625 if (card->type == MMC_TYPE_SDIO || in dw_mci_init_card()
1626 card->type == MMC_TYPE_SD_COMBO) { in dw_mci_init_card()
1627 set_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags); in dw_mci_init_card()
1630 clear_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags); in dw_mci_init_card()
1644 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq()
1648 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1653 int_mask |= SDMMC_INT_SDIO(slot->sdio_id); in __dw_mci_enable_sdio_irq()
1655 int_mask &= ~SDMMC_INT_SDIO(slot->sdio_id); in __dw_mci_enable_sdio_irq()
1658 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1664 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq()
1670 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1672 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1685 struct dw_mci *host = slot->host; in dw_mci_execute_tuning()
1686 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1687 int err = -EINVAL; in dw_mci_execute_tuning()
1689 if (drv_data && drv_data->execute_tuning) in dw_mci_execute_tuning()
1690 err = drv_data->execute_tuning(slot, opcode); in dw_mci_execute_tuning()
1698 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning()
1699 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1701 if (drv_data && drv_data->prepare_hs400_tuning) in dw_mci_prepare_hs400_tuning()
1702 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1715 * the scatter-gather pointer to NULL. in dw_mci_reset()
1717 if (host->sg) { in dw_mci_reset()
1718 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1719 host->sg = NULL; in dw_mci_reset()
1722 if (host->use_dma) in dw_mci_reset()
1732 if (!host->use_dma) { in dw_mci_reset()
1738 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1742 dev_err(host->dev, in dw_mci_reset()
1754 dev_err(host->dev, in dw_mci_reset()
1761 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1769 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1792 __releases(&host->lock) in dw_mci_request_end()
1793 __acquires(&host->lock) in dw_mci_request_end()
1796 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1798 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1800 host->slot->mrq = NULL; in dw_mci_request_end()
1801 host->mrq = NULL; in dw_mci_request_end()
1802 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1803 slot = list_entry(host->queue.next, in dw_mci_request_end()
1805 list_del(&slot->queue_node); in dw_mci_request_end()
1806 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1807 mmc_hostname(slot->mmc)); in dw_mci_request_end()
1808 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1811 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1813 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1814 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1816 host->state = STATE_IDLE; in dw_mci_request_end()
1819 spin_unlock(&host->lock); in dw_mci_request_end()
1821 spin_lock(&host->lock); in dw_mci_request_end()
1826 u32 status = host->cmd_status; in dw_mci_command_complete()
1828 host->cmd_status = 0; in dw_mci_command_complete()
1831 if (cmd->flags & MMC_RSP_PRESENT) { in dw_mci_command_complete()
1832 if (cmd->flags & MMC_RSP_136) { in dw_mci_command_complete()
1833 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1834 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1835 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1836 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1838 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1839 cmd->resp[1] = 0; in dw_mci_command_complete()
1840 cmd->resp[2] = 0; in dw_mci_command_complete()
1841 cmd->resp[3] = 0; in dw_mci_command_complete()
1846 cmd->error = -ETIMEDOUT; in dw_mci_command_complete()
1847 else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) in dw_mci_command_complete()
1848 cmd->error = -EILSEQ; in dw_mci_command_complete()
1850 cmd->error = -EIO; in dw_mci_command_complete()
1852 cmd->error = 0; in dw_mci_command_complete()
1854 return cmd->error; in dw_mci_command_complete()
1859 u32 status = host->data_status; in dw_mci_data_complete()
1863 data->error = -ETIMEDOUT; in dw_mci_data_complete()
1865 data->error = -EILSEQ; in dw_mci_data_complete()
1867 if (host->dir_status == in dw_mci_data_complete()
1874 data->bytes_xfered = 0; in dw_mci_data_complete()
1875 data->error = -ETIMEDOUT; in dw_mci_data_complete()
1876 } else if (host->dir_status == in dw_mci_data_complete()
1878 data->error = -EILSEQ; in dw_mci_data_complete()
1882 data->error = -EILSEQ; in dw_mci_data_complete()
1885 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1893 data->bytes_xfered = data->blocks * data->blksz; in dw_mci_data_complete()
1894 data->error = 0; in dw_mci_data_complete()
1897 return data->error; in dw_mci_data_complete()
1913 host->bus_hz); in dw_mci_set_drto()
1918 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
1919 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
1920 mod_timer(&host->dto_timer, in dw_mci_set_drto()
1922 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
1927 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
1937 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
1938 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
1945 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
1949 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
1950 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
1965 spin_lock(&host->lock); in dw_mci_tasklet_func()
1967 state = host->state; in dw_mci_tasklet_func()
1968 data = host->data; in dw_mci_tasklet_func()
1969 mrq = host->mrq; in dw_mci_tasklet_func()
1984 cmd = host->cmd; in dw_mci_tasklet_func()
1985 host->cmd = NULL; in dw_mci_tasklet_func()
1986 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
1988 if (cmd == mrq->sbc && !err) { in dw_mci_tasklet_func()
1989 __dw_mci_start_request(host, host->slot, in dw_mci_tasklet_func()
1990 mrq->cmd); in dw_mci_tasklet_func()
1994 if (cmd->data && err) { in dw_mci_tasklet_func()
2016 if (err != -ETIMEDOUT) { in dw_mci_tasklet_func()
2027 if (!cmd->data || err) { in dw_mci_tasklet_func()
2045 &host->pending_events)) { in dw_mci_tasklet_func()
2047 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2055 &host->pending_events)) { in dw_mci_tasklet_func()
2057 * If all data-related interrupts don't come in dw_mci_tasklet_func()
2060 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2065 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2081 &host->pending_events)) { in dw_mci_tasklet_func()
2083 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2100 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2105 host->data = NULL; in dw_mci_tasklet_func()
2106 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2110 if (!data->stop || mrq->sbc) { in dw_mci_tasklet_func()
2111 if (mrq->sbc && data->stop) in dw_mci_tasklet_func()
2112 data->stop->error = 0; in dw_mci_tasklet_func()
2117 /* stop command for open-ended transfer*/ in dw_mci_tasklet_func()
2118 if (data->stop) in dw_mci_tasklet_func()
2131 &host->pending_events)) { in dw_mci_tasklet_func()
2132 host->cmd = NULL; in dw_mci_tasklet_func()
2139 * If err has non-zero, in dw_mci_tasklet_func()
2140 * stop-abort command has been already issued. in dw_mci_tasklet_func()
2151 if (mrq->cmd->error && mrq->data) in dw_mci_tasklet_func()
2154 host->cmd = NULL; in dw_mci_tasklet_func()
2155 host->data = NULL; in dw_mci_tasklet_func()
2157 if (!mrq->sbc && mrq->stop) in dw_mci_tasklet_func()
2158 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2160 host->cmd_status = 0; in dw_mci_tasklet_func()
2167 &host->pending_events)) in dw_mci_tasklet_func()
2175 host->state = state; in dw_mci_tasklet_func()
2177 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2184 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2185 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2191 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2192 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2193 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2200 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2202 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2204 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2205 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2213 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2214 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2215 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2220 struct mmc_data *data = host->data; in dw_mci_push_data16()
2224 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2228 cnt -= len; in dw_mci_push_data16()
2229 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2230 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2231 host->part_buf_count = 0; in dw_mci_push_data16()
2238 int len = min(cnt & -2, (int)sizeof(aligned_buf)); in dw_mci_push_data16()
2244 cnt -= len; in dw_mci_push_data16()
2247 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2254 for (; cnt >= 2; cnt -= 2) in dw_mci_push_data16()
2255 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2262 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data16()
2263 (data->blksz * data->blocks)) in dw_mci_push_data16()
2264 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2275 int len = min(cnt & -2, (int)sizeof(aligned_buf)); in dw_mci_pull_data16()
2280 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2284 cnt -= len; in dw_mci_pull_data16()
2291 for (; cnt >= 2; cnt -= 2) in dw_mci_pull_data16()
2292 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2296 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2303 struct mmc_data *data = host->data; in dw_mci_push_data32()
2307 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2311 cnt -= len; in dw_mci_push_data32()
2312 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2313 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2314 host->part_buf_count = 0; in dw_mci_push_data32()
2321 int len = min(cnt & -4, (int)sizeof(aligned_buf)); in dw_mci_push_data32()
2327 cnt -= len; in dw_mci_push_data32()
2330 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2337 for (; cnt >= 4; cnt -= 4) in dw_mci_push_data32()
2338 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2345 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data32()
2346 (data->blksz * data->blocks)) in dw_mci_push_data32()
2347 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2358 int len = min(cnt & -4, (int)sizeof(aligned_buf)); in dw_mci_pull_data32()
2363 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2367 cnt -= len; in dw_mci_pull_data32()
2374 for (; cnt >= 4; cnt -= 4) in dw_mci_pull_data32()
2375 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2379 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2386 struct mmc_data *data = host->data; in dw_mci_push_data64()
2390 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2394 cnt -= len; in dw_mci_push_data64()
2396 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2397 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2398 host->part_buf_count = 0; in dw_mci_push_data64()
2405 int len = min(cnt & -8, (int)sizeof(aligned_buf)); in dw_mci_push_data64()
2411 cnt -= len; in dw_mci_push_data64()
2414 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2421 for (; cnt >= 8; cnt -= 8) in dw_mci_push_data64()
2422 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2429 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data64()
2430 (data->blksz * data->blocks)) in dw_mci_push_data64()
2431 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2442 int len = min(cnt & -8, (int)sizeof(aligned_buf)); in dw_mci_pull_data64()
2447 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2452 cnt -= len; in dw_mci_pull_data64()
2459 for (; cnt >= 8; cnt -= 8) in dw_mci_pull_data64()
2460 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2464 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2478 cnt -= len; in dw_mci_pull_data()
2481 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2486 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2489 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2490 int shift = host->data_shift; in dw_mci_read_data_pio()
2499 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2500 buf = sg_miter->addr; in dw_mci_read_data_pio()
2501 remain = sg_miter->length; in dw_mci_read_data_pio()
2506 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2511 data->bytes_xfered += len; in dw_mci_read_data_pio()
2513 remain -= len; in dw_mci_read_data_pio()
2516 sg_miter->consumed = offset; in dw_mci_read_data_pio()
2526 sg_miter->consumed = 0; in dw_mci_read_data_pio()
2533 host->sg = NULL; in dw_mci_read_data_pio()
2535 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2540 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2543 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2544 int shift = host->data_shift; in dw_mci_write_data_pio()
2547 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2554 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2555 buf = sg_miter->addr; in dw_mci_write_data_pio()
2556 remain = sg_miter->length; in dw_mci_write_data_pio()
2560 fcnt = ((fifo_depth - in dw_mci_write_data_pio()
2562 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2566 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2567 data->bytes_xfered += len; in dw_mci_write_data_pio()
2569 remain -= len; in dw_mci_write_data_pio()
2572 sg_miter->consumed = offset; in dw_mci_write_data_pio()
2580 sg_miter->consumed = 0; in dw_mci_write_data_pio()
2587 host->sg = NULL; in dw_mci_write_data_pio()
2589 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2594 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2596 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2597 host->cmd_status = status; in dw_mci_cmd_interrupt()
2601 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2602 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2607 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2609 if (slot->mmc->ops->card_event) in dw_mci_handle_cd()
2610 slot->mmc->ops->card_event(slot->mmc); in dw_mci_handle_cd()
2611 mmc_detect_change(slot->mmc, in dw_mci_handle_cd()
2612 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2619 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2622 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2626 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2635 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2637 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2639 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2643 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2645 del_timer(&host->cto_timer); in dw_mci_interrupt()
2647 host->cmd_status = pending; in dw_mci_interrupt()
2649 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2651 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2657 host->data_status = pending; in dw_mci_interrupt()
2659 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2660 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2664 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2666 del_timer(&host->dto_timer); in dw_mci_interrupt()
2669 if (!host->data_status) in dw_mci_interrupt()
2670 host->data_status = pending; in dw_mci_interrupt()
2672 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2673 if (host->sg != NULL) in dw_mci_interrupt()
2676 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2677 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2679 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2684 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2690 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2695 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_interrupt()
2700 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_interrupt()
2708 if (pending & SDMMC_INT_SDIO(slot->sdio_id)) { in dw_mci_interrupt()
2710 SDMMC_INT_SDIO(slot->sdio_id)); in dw_mci_interrupt()
2712 sdio_signal_irq(slot->mmc); in dw_mci_interrupt()
2717 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2720 /* Handle IDMA interrupts */ in dw_mci_interrupt()
2721 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2727 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2728 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2736 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2737 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2746 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps()
2747 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2748 struct mmc_host *mmc = slot->mmc; in dw_mci_init_slot_caps()
2751 if (host->pdata->caps) in dw_mci_init_slot_caps()
2752 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2754 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2755 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2757 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2758 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2762 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2765 if (drv_data && drv_data->caps) { in dw_mci_init_slot_caps()
2766 if (ctrl_id >= drv_data->num_caps) { in dw_mci_init_slot_caps()
2767 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2769 return -EINVAL; in dw_mci_init_slot_caps()
2771 mmc->caps |= drv_data->caps[ctrl_id]; in dw_mci_init_slot_caps()
2774 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2775 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2777 mmc->f_min = DW_MCI_FREQ_MIN; in dw_mci_init_slot_caps()
2778 if (!mmc->f_max) in dw_mci_init_slot_caps()
2779 mmc->f_max = DW_MCI_FREQ_MAX; in dw_mci_init_slot_caps()
2782 if (mmc->caps & MMC_CAP_SDIO_IRQ) in dw_mci_init_slot_caps()
2783 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in dw_mci_init_slot_caps()
2794 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2796 return -ENOMEM; in dw_mci_init_slot()
2799 slot->id = 0; in dw_mci_init_slot()
2800 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
2801 slot->mmc = mmc; in dw_mci_init_slot()
2802 slot->host = host; in dw_mci_init_slot()
2803 host->slot = slot; in dw_mci_init_slot()
2805 mmc->ops = &dw_mci_ops; in dw_mci_init_slot()
2812 if (!mmc->ocr_avail) in dw_mci_init_slot()
2813 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in dw_mci_init_slot()
2824 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2825 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2826 mmc->max_blk_size = 65535; in dw_mci_init_slot()
2827 mmc->max_seg_size = 0x1000; in dw_mci_init_slot()
2828 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2829 mmc->max_blk_count = mmc->max_req_size / 512; in dw_mci_init_slot()
2830 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
2831 mmc->max_segs = 64; in dw_mci_init_slot()
2832 mmc->max_blk_size = 65535; in dw_mci_init_slot()
2833 mmc->max_blk_count = 65535; in dw_mci_init_slot()
2834 mmc->max_req_size = in dw_mci_init_slot()
2835 mmc->max_blk_size * mmc->max_blk_count; in dw_mci_init_slot()
2836 mmc->max_seg_size = mmc->max_req_size; in dw_mci_init_slot()
2839 mmc->max_segs = 64; in dw_mci_init_slot()
2840 mmc->max_blk_size = 65535; /* BLKSIZ is 16 bits */ in dw_mci_init_slot()
2841 mmc->max_blk_count = 512; in dw_mci_init_slot()
2842 mmc->max_req_size = mmc->max_blk_size * in dw_mci_init_slot()
2843 mmc->max_blk_count; in dw_mci_init_slot()
2844 mmc->max_seg_size = mmc->max_req_size; in dw_mci_init_slot()
2867 mmc_remove_host(slot->mmc); in dw_mci_cleanup_slot()
2868 slot->host->slot = NULL; in dw_mci_cleanup_slot()
2869 mmc_free_host(slot->mmc); in dw_mci_cleanup_slot()
2875 struct device *dev = host->dev; in dw_mci_init_dma()
2880 * 2b'00: No DMA Interface -> Actually means using Internal DMA block in dw_mci_init_dma()
2881 * 2b'01: DesignWare DMA Interface -> Synopsys DW-DMA block in dw_mci_init_dma()
2882 * 2b'10: Generic DMA Interface -> non-Synopsys generic DMA block in dw_mci_init_dma()
2883 * 2b'11: Non DW DMA Interface -> pio only in dw_mci_init_dma()
2888 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
2889 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
2890 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
2891 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
2892 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
2893 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
2899 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
2907 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
2908 host->dma_64bit_address = 1; in dw_mci_init_dma()
2909 dev_info(host->dev, in dw_mci_init_dma()
2910 "IDMAC supports 64-bit address mode.\n"); in dw_mci_init_dma()
2911 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
2912 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
2915 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
2916 host->dma_64bit_address = 0; in dw_mci_init_dma()
2917 dev_info(host->dev, in dw_mci_init_dma()
2918 "IDMAC supports 32-bit address mode.\n"); in dw_mci_init_dma()
2922 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
2924 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
2925 if (!host->sg_cpu) { in dw_mci_init_dma()
2926 dev_err(host->dev, in dw_mci_init_dma()
2932 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
2933 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
2936 if ((device_property_read_string_array(dev, "dma-names", in dw_mci_init_dma()
2941 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
2942 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
2945 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
2946 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
2947 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
2948 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
2953 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
2960 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
2961 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
2968 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
2969 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
2973 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
2974 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
2975 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
2984 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
2992 * pending command in the controller--we just assume it will never come. in dw_mci_cto_timer()
2994 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
2997 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3000 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3002 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3010 switch (host->state) { in dw_mci_cto_timer()
3019 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3020 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3021 tasklet_schedule(&host->tasklet); in dw_mci_cto_timer()
3024 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3025 host->state); in dw_mci_cto_timer()
3030 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3039 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3045 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3048 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3051 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3053 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3061 switch (host->state) { in dw_mci_dto_timer()
3069 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3070 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3071 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3072 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
3075 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3076 host->state); in dw_mci_dto_timer()
3081 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3088 struct device *dev = host->dev; in dw_mci_parse_dt()
3089 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3095 return ERR_PTR(-ENOMEM); in dw_mci_parse_dt()
3098 pdata->rstc = devm_reset_control_get_optional_exclusive(dev, "reset"); in dw_mci_parse_dt()
3099 if (IS_ERR(pdata->rstc)) { in dw_mci_parse_dt()
3100 if (PTR_ERR(pdata->rstc) == -EPROBE_DEFER) in dw_mci_parse_dt()
3101 return ERR_PTR(-EPROBE_DEFER); in dw_mci_parse_dt()
3104 if (device_property_read_u32(dev, "fifo-depth", &pdata->fifo_depth)) in dw_mci_parse_dt()
3106 "fifo-depth property not found, using value of FIFOTH register as default\n"); in dw_mci_parse_dt()
3108 device_property_read_u32(dev, "card-detect-delay", in dw_mci_parse_dt()
3109 &pdata->detect_delay_ms); in dw_mci_parse_dt()
3111 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3113 if (device_property_present(dev, "fifo-watermark-aligned")) in dw_mci_parse_dt()
3114 host->wm_aligned = true; in dw_mci_parse_dt()
3116 if (!device_property_read_u32(dev, "clock-frequency", &clock_frequency)) in dw_mci_parse_dt()
3117 pdata->bus_hz = clock_frequency; in dw_mci_parse_dt()
3119 if (drv_data && drv_data->parse_dt) { in dw_mci_parse_dt()
3120 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3131 return ERR_PTR(-EINVAL); in dw_mci_parse_dt()
3141 * No need for CD if all slots have a non-error GPIO in dw_mci_enable_cd()
3144 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3147 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3148 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3152 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3158 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3162 if (!host->pdata) { in dw_mci_probe()
3163 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3164 if (IS_ERR(host->pdata)) in dw_mci_probe()
3165 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3169 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3170 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3171 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3173 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3175 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3180 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3181 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3182 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3183 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3185 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3187 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3191 if (host->pdata->bus_hz) { in dw_mci_probe()
3192 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3194 dev_warn(host->dev, in dw_mci_probe()
3196 host->pdata->bus_hz); in dw_mci_probe()
3198 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3201 if (!host->bus_hz) { in dw_mci_probe()
3202 dev_err(host->dev, in dw_mci_probe()
3204 ret = -ENODEV; in dw_mci_probe()
3208 if (!IS_ERR(host->pdata->rstc)) { in dw_mci_probe()
3209 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3211 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3214 if (drv_data && drv_data->init) { in dw_mci_probe()
3215 ret = drv_data->init(host); in dw_mci_probe()
3217 dev_err(host->dev, in dw_mci_probe()
3223 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3224 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3225 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3227 spin_lock_init(&host->lock); in dw_mci_probe()
3228 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3229 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3232 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3237 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3238 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3240 host->data_shift = 1; in dw_mci_probe()
3242 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3243 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3245 host->data_shift = 3; in dw_mci_probe()
3250 "Defaulting to 32-bit access.\n"); in dw_mci_probe()
3251 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3252 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3254 host->data_shift = 2; in dw_mci_probe()
3259 ret = -ENODEV; in dw_mci_probe()
3263 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3274 * FIFO threshold settings RxMark = fifo_size / 2 - 1, in dw_mci_probe()
3277 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3279 * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may in dw_mci_probe()
3287 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3289 host->fifo_depth = fifo_size; in dw_mci_probe()
3290 host->fifoth_val = in dw_mci_probe()
3291 SDMMC_SET_FIFOTH(0x2, fifo_size / 2 - 1, fifo_size / 2); in dw_mci_probe()
3292 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3300 * Need to check the version-id and set data-offset for DATA register. in dw_mci_probe()
3302 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3303 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3305 if (host->data_addr_override) in dw_mci_probe()
3306 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3307 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3308 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3310 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3312 tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); in dw_mci_probe()
3313 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3314 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3328 dev_info(host->dev, in dw_mci_probe()
3330 host->irq, width, fifo_size); in dw_mci_probe()
3335 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3345 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3346 host->dma_ops->exit(host); in dw_mci_probe()
3348 if (!IS_ERR(host->pdata->rstc)) in dw_mci_probe()
3349 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3352 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3355 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3363 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3364 if (host->slot) in dw_mci_remove()
3365 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3374 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3375 host->dma_ops->exit(host); in dw_mci_remove()
3377 if (!IS_ERR(host->pdata->rstc)) in dw_mci_remove()
3378 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3380 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3381 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3392 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3393 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3395 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3397 if (host->slot && in dw_mci_runtime_suspend()
3398 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3399 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3400 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3411 if (host->slot && in dw_mci_runtime_resume()
3412 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3413 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3414 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3419 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3424 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3425 ret = -ENODEV; in dw_mci_runtime_resume()
3429 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3430 host->dma_ops->init(host); in dw_mci_runtime_resume()
3436 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3437 host->prev_blksz = 0; in dw_mci_runtime_resume()
3449 if (host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3450 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3453 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3455 /* Re-enable SDIO interrupts. */ in dw_mci_runtime_resume()
3456 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3457 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3465 if (host->slot && in dw_mci_runtime_resume()
3466 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3467 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3468 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()