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/Linux-v6.6/Documentation/devicetree/bindings/pinctrl/
Dsemtech,sx1501q.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Neil Armstrong <neil.armstrong@linaro.org>
16 - semtech,sx1501q
17 - semtech,sx1502q
18 - semtech,sx1503q
19 - semtech,sx1504q
20 - semtech,sx1505q
21 - semtech,sx1506q
[all …]
Dnuvoton,wpcm450-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,wpcm450-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
14 const: nuvoton,wpcm450-pinctrl
19 '#address-cells':
22 '#size-cells':
31 "^gpio@[0-7]$":
44 gpio-controller: true
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/net/can/
Dtcan4x5x.txt7 - compatible:
11 - reg: 0
12 - #address-cells: 1
13 - #size-cells: 0
14 - spi-max-frequency: Maximum frequency of the SPI bus the chip can
16 - interrupt-parent: the phandle to the interrupt controller which provides
18 - interrupts: interrupt specification for data-ready.
24 - reset-gpios: Hardwired output GPIO. If not defined then software
26 - device-state-gpios: Input GPIO that indicates if the device is in
29 - device-wake-gpios: Wake up GPIO to wake up the TCAN device. Not
[all …]
/Linux-v6.6/arch/arm/boot/dts/nxp/imx/
Dimx6ull-dhcom-drc02.dts1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 * DHCM-iMX6ULL-C080-R051-F0409-SPI-E2-CAN2-SD-RTC-ADC-I-01D2
7 * DHCOR PCB number: 578-200 or newer
8 * DHCOM PCB number: 579-200 or newer
9 * DRC02 PCB number: 568-100 or newer (2nd ethernet by SoM)
11 /dts-v1/;
13 #include "imx6ull-dhcom-som.dtsi"
14 #include "imx6ull-dhcom-som-cfg-sdcard.dtsi"
18 compatible = "dh,imx6ull-dhcom-drc02", "dh,imx6ull-dhcom-som",
19 "dh,imx6ull-dhcor-som", "fsl,imx6ull";
[all …]
Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
9 button-0 {
13 debounce-interval = <10>;
14 wakeup-source;
17 button-1 {
21 debounce-interval = <10>;
22 wakeup-source;
25 button-2 {
29 debounce-interval = <10>;
[all …]
Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
11 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
19 stdout-path = &uart1;
27 gpio-keys {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_gpio_keys>;
32 key-volume-up {
36 wakeup-source;
[all …]
Dimx6ul-14x14-evk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/media/video-interfaces.h>
9 stdout-path = &uart1;
17 backlight_display: backlight-display {
18 compatible = "pwm-backlight";
20 brightness-levels = <0 4 8 16 32 64 128 255>;
21 default-brightness-level = <6>;
26 reg_sd1_vmmc: regulator-sd1-vmmc {
27 compatible = "regulator-fixed";
28 regulator-name = "VSD_3V3";
[all …]
Dimx6qdl-sabresd.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 stdout-path = &uart1;
20 reg_usb_otg_vbus: regulator-usb-otg-vbus {
21 compatible = "regulator-fixed";
22 regulator-name = "usb_otg_vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
[all …]
/Linux-v6.6/arch/arm64/boot/dts/freescale/
Dmba8mx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/net/ti-dp83867.h>
8 /* TQ-Systems GmbH MBa8Mx baseboard */
12 compatible = "pwm-beeper";
14 beeper-hz = <4000>;
15 amp-supply = <&reg_vcc_3v3>;
19 stdout-path = &uart3;
22 gpio-keys {
23 compatible = "gpio-keys";
[all …]
Dimx8mq-librem5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2020 Purism SPC
6 /dts-v1/;
8 #include "dt-bindings/input/input.h"
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include "dt-bindings/pwm/pwm.h"
12 #include "dt-bindings/usb/pd.h"
18 chassis-type = "handset";
20 backlight_dsi: backlight-dsi {
[all …]
Dimx8mn-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 compatible = "gpio-leds";
10 led-0 {
13 default-state = "off";
16 led-1 {
19 default-state = "off";
22 led-2 {
25 default-state = "off";
28 led-3 {
29 pinctrl-names = "default";
[all …]
Dimx8mm-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 compatible = "gpio-leds";
15 default-state = "off";
21 default-state = "off";
27 default-state = "off";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_led3>;
35 linux,default-trigger = "heartbeat";
39 pcie0_refclk: pcie0-refclk {
[all …]
Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 hdmi-connector {
20 compatible = "hdmi-connector";
26 remote-endpoint = <&adv7533_out>;
31 gpio-leds {
32 compatible = "gpio-leds";
[all …]
/Linux-v6.6/include/dt-bindings/sound/
Dcs35l45.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * cs35l45.h -- CS35L45 ALSA SoC audio driver DT bindings header
12 * cirrus,asp-sdout-hiz-ctrl
14 * TX_HIZ_UNUSED: TX pin high-impedance during unused slots.
15 * TX_HIZ_DISABLED: TX pin high-impedance when all channels disabled.
21 * Optional GPIOX Sub-nodes:
22 * The cs35l45 node can have up to three "cirrus,gpio-ctrlX" ('X' = [1,2,3])
23 * sub-nodes for configuring the GPIO pins.
25 * - gpio-dir : GPIO pin direction. Valid only when 'gpio-ctrl'
30 * - gpio-lvl : GPIO level. Valid only when 'gpio-ctrl' is 1 and 'gpio-dir' is 0.
[all …]
/Linux-v6.6/arch/arm/boot/dts/nxp/mxs/
Dimx28.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx28-pinfunc.h"
9 #address-cells = <1>;
10 #size-cells = <1>;
12 interrupt-parent = <&icoll>;
15 * pre-existing /chosen node to be available to insert the
24 gpio1 = &gpio1;
42 #address-cells = <1>;
43 #size-cells = <0>;
[all …]
Dimx23.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 #include "imx23-pinfunc.h"
8 #address-cells = <1>;
9 #size-cells = <1>;
11 interrupt-parent = <&icoll>;
14 * pre-existing /chosen node to be available to insert the
21 gpio1 = &gpio1;
31 #address-cells = <1>;
32 #size-cells = <0>;
35 compatible = "arm,arm926ej-s";
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/sound/
Dcirrus,cs35l45.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
11 - Richard Fitzgerald <rf@opensource.cirrus.com>
18 - $ref: dai-common.yaml#
23 - cirrus,cs35l45
28 '#sound-dai-cells':
31 reset-gpios:
34 vdd-a-supply:
[all …]
/Linux-v6.6/drivers/iio/adc/
Dmax11410.c1 // SPDX-License-Identifier: GPL-2.0-only
175 /* This driver only needs to write 8-bit registers */ in max11410_write_reg()
177 return -EINVAL; in max11410_write_reg()
179 return regmap_write(st->regmap, reg, val); in max11410_write_reg()
188 ret = regmap_bulk_read(st->regmap, reg, &st->scan.data, 3); in max11410_read_reg()
192 *val = get_unaligned_be24(&st->scan.data); in max11410_read_reg()
196 return regmap_read(st->regmap, reg, val); in max11410_read_reg()
204 return st->avdd; in max11410_get_vrefp()
206 return st->vrefp[refsel]; in max11410_get_vrefp()
215 return st->vrefn[refsel]; in max11410_get_vrefn()
[all …]
/Linux-v6.6/drivers/pinctrl/
Dpinctrl-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * With some ideas taken from pinctrl-samsung:
14 * and pinctrl-at91:
15 * Copyright (C) 2011-2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
30 #include <linux/pinctrl/pinconf-generic.h>
37 #include <dt-bindings/pinctrl/rockchip.h>
41 #include "pinctrl-rockchip.h"
67 { .offset = -1 }, \
68 { .offset = -1 }, \
69 { .offset = -1 }, \
[all …]
/Linux-v6.6/sound/pci/hda/
Dpatch_cirrus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
66 /* Vendor-specific processing widget */
79 * 1 = digital immediate, analog zero-cross
80 * 2 = digtail & analog soft-ramp
81 * 3 = digital soft-ramp, analog zero-cross
85 #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
86 /* PGA mode: 0 = differential, 1 = signle-ended */
88 #define CS_COEF_ADC_LI_PGA_MODE (1 << 6) /* PGA setup for line-in */
92 * 1 = zero-cross
93 * 2 = soft-ramp
[all …]
Dpatch_conexant.c1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * Tobin Davis <tdavis@dsl-only.net>
63 spec->gen.beep_nid = nid; in set_beep_amp()
65 knew = snd_hda_gen_add_kctl(&spec->gen, NULL, in set_beep_amp()
68 return -ENOMEM; in set_beep_amp()
69 knew->private_value = beep_amp; in set_beep_amp()
76 struct conexant_spec *spec = codec->spec; in cx_auto_parse_beep()
95 struct conexant_spec *spec = codec->spec; in cx_auto_parse_eapd()
103 spec->eapds[spec->num_eapds++] = nid; in cx_auto_parse_eapd()
104 if (spec->num_eapds >= ARRAY_SIZE(spec->eapds)) in cx_auto_parse_eapd()
[all …]
/Linux-v6.6/sound/soc/codecs/
Dtlv320adc3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
8 // Copyright (C) 2014-2018, Ambarella, Inc.
15 #include <dt-bindings/sound/tlv320adc3xxx.h>
34 #include <sound/soc-dapm.h>
59 * Setting the clock source using simple-card (clocks or
60 * system-clock-frequency property) sets clk_id = 0 = ADC3XXX_PLL_AUTO.
78 /* 2-3 Reserved */
86 /* 9-17 Reserved */
93 /* 23-24 Reserved */
109 /* 39-41 Reserved */
[all …]
/Linux-v6.6/arch/arm64/boot/dts/rockchip/
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rails _are_ included if the rails go to the AP even if the AP
39 * - The EC controls the enable and the EC always enables a rail as
41 * - The rails are actually connected to each other by a jumper and
46 ppvar_sys: ppvar-sys {
[all …]
/Linux-v6.6/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
12 #include <dt-bindings/dma/qcom-gpi.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
[all …]
/Linux-v6.6/drivers/pinctrl/nuvoton/
Dpinctrl-npcm7xx.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
21 #include <linux/pinctrl/pinconf-generic.h>
51 #define NPCM7XX_GP_N_PU 0x1c /* Pull-up */
52 #define NPCM7XX_GP_N_PD 0x20 /* Pull-down */
110 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_set()
115 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_set()
124 raw_spin_lock_irqsave(&gc->bgpio_lock, flags); in npcm_gpio_clr()
129 raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags); in npcm_gpio_clr()
136 seq_printf(s, "-- module %d [gpio%d - %d]\n", in npcmgpio_dbg_show()
[all …]

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