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/Linux-v6.1/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra186-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra186-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra186-pmc
17 - nvidia,tegra194-pmc
18 - nvidia,tegra234-pmc
24 reg-names:
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/Linux-v6.1/arch/arm/boot/dts/
Drk3188.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3188-cru.h>
10 #include <dt-bindings/power/rk3188-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
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Drk3066a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/clock/rk3066a-cru.h>
10 #include <dt-bindings/power/rk3066-power.h>
17 #address-cells = <1>;
18 #size-cells = <0>;
19 enable-method = "rockchip,rk3066-smp";
23 compatible = "arm,cortex-a9";
24 next-level-cache = <&L2>;
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Drk3036.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3036-cru.h>
8 #include <dt-bindings/soc/rockchip,boot-mode.h>
9 #include <dt-bindings/power/rk3036-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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Drk322x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/pinctrl/rockchip.h>
7 #include <dt-bindings/clock/rk3228-cru.h>
8 #include <dt-bindings/thermal/thermal.h>
9 #include <dt-bindings/power/rk3228-power.h>
12 #address-cells = <1>;
13 #size-cells = <1>;
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/Linux-v6.1/drivers/pinctrl/mvebu/
Dpinctrl-armada-37xx.c6 * Gregory CLEMENT <gregory.clement@free-electrons.com>
19 #include <linux/pinctrl/pinconf-generic.h>
29 #include "../pinctrl-utils.h"
176 PIN_GRP_GPIO_3("pwm2", 13, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5),
234 *offset -= GPIO_PER_REG; in armada_37xx_update_reg()
242 while (*grp < info->ngroups) { in armada_37xx_find_next_grp_by_pin()
243 struct armada_37xx_pin_group *group = &info->groups[*grp]; in armada_37xx_find_next_grp_by_pin()
247 for (j = 0; j < (group->npins + group->extra_npins); j++) in armada_37xx_find_next_grp_by_pin()
248 if (group->pins[j] == pin) in armada_37xx_find_next_grp_by_pin()
257 return -ENOTSUPP; in armada_37xx_pin_config_group_get()
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/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3328.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3328-cru.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3328-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
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/Linux-v6.1/drivers/pinctrl/cirrus/
Dpinctrl-madera-core.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016-2018 Cirrus Logic
19 #include <linux/pinctrl/pinconf-generic.h>
24 #include "../pinctrl-utils.h"
26 #include "pinctrl-madera.h"
30 * NOTE: IDs are zero-indexed for coding convenience
76 * All single-pin functions can be mapped to any GPIO, however pinmux applies
80 * Since these do not correspond to anything in the actual hardware - they are
81 * merely an adaptation to pinctrl's view of the world - we use the same name
93 /* set of pin numbers for single-pin groups, zero-indexed */
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/Linux-v6.1/drivers/pinctrl/intel/
Dpinctrl-merrifield.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/pinctrl/pinconf-generic.h>
20 #include "pinctrl-intel.h"
57 * struct mrfld_family - Intel pin family description
76 .npins = (e) - (s) + 1, \
83 .npins = (e) - (s) + 1, \
173 /* Family 6: GP SSP (22 pins) */
386 FUNCTION("pwm2", mrfld_pwm2_groups),
409 * struct mrfld_pinctrl - Intel Merrifield pinctrl private structure
440 #define pin_to_bufno(f, p) ((p) - (f)->pin_base)
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/Linux-v6.1/drivers/soc/tegra/
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
36 #include <linux/pinctrl/pinconf-generic.h>
54 #include <dt-bindings/interrupt-controller/arm-gic.h>
55 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
56 #include <dt-bindings/gpio/tegra186-gpio.h>
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