6  * Gregory CLEMENT <gregory.clement@free-electrons.com>
19 #include <linux/pinctrl/pinconf-generic.h>
29 #include "../pinctrl-utils.h"
176 	PIN_GRP_GPIO_3("pwm2", 13, 1, BIT(5) | BIT(22), 0, BIT(22), BIT(5),
234 		*offset -= GPIO_PER_REG;  in armada_37xx_update_reg()
242 	while (*grp < info->ngroups) {  in armada_37xx_find_next_grp_by_pin()
243 		struct armada_37xx_pin_group *group = &info->groups[*grp];  in armada_37xx_find_next_grp_by_pin()
247 		for (j = 0; j < (group->npins + group->extra_npins); j++)  in armada_37xx_find_next_grp_by_pin()
248 			if (group->pins[j] == pin)  in armada_37xx_find_next_grp_by_pin()
257 	return -ENOTSUPP;  in armada_37xx_pin_config_group_get()
264 	return -ENOTSUPP;  in armada_37xx_pin_config_group_set()
277 	return info->ngroups;  in armada_37xx_get_groups_count()
285 	return info->groups[group].name;  in armada_37xx_get_group_name()
295 	if (selector >= info->ngroups)  in armada_37xx_get_group_pins()
296 		return -EINVAL;  in armada_37xx_get_group_pins()
298 	*pins = info->groups[selector].pins;  in armada_37xx_get_group_pins()
299 	*npins = info->groups[selector].npins +  in armada_37xx_get_group_pins()
300 		info->groups[selector].extra_npins;  in armada_37xx_get_group_pins()
321 	return info->nfuncs;  in armada_37xx_pmx_get_funcs_count()
329 	return info->funcs[selector].name;  in armada_37xx_pmx_get_func_name()
339 	*groups = info->funcs[selector].groups;  in armada_37xx_pmx_get_groups()
340 	*num_groups = info->funcs[selector].ngroups;  in armada_37xx_pmx_get_groups()
350 	struct device *dev = info->dev;  in armada_37xx_pmx_set_by_name()
352 	unsigned int mask = grp->reg_mask;  in armada_37xx_pmx_set_by_name()
355 	dev_dbg(dev, "enable function %s group %s\n", name, grp->name);  in armada_37xx_pmx_set_by_name()
357 	func = match_string(grp->funcs, NB_FUNCS, name);  in armada_37xx_pmx_set_by_name()
359 		return -ENOTSUPP;  in armada_37xx_pmx_set_by_name()
361 	val = grp->val[func];  in armada_37xx_pmx_set_by_name()
363 	regmap_update_bits(info->regmap, reg, mask, val);  in armada_37xx_pmx_set_by_name()
374 	struct armada_37xx_pin_group *grp = &info->groups[group];  in armada_37xx_pmx_set()
375 	const char *name = info->funcs[selector].name;  in armada_37xx_pmx_set()
398 	return regmap_update_bits(info->regmap, reg, mask, 0);  in armada_37xx_gpio_direction_input()
410 	regmap_read(info->regmap, reg, &val);  in armada_37xx_gpio_get_direction()
428 	ret = regmap_update_bits(info->regmap, reg, mask, mask);  in armada_37xx_gpio_direction_output()
435 	regmap_update_bits(info->regmap, reg, mask, val);  in armada_37xx_gpio_direction_output()
449 	regmap_read(info->regmap, reg, &val);  in armada_37xx_gpio_get()
465 	regmap_update_bits(info->regmap, reg, mask, val);  in armada_37xx_gpio_set()
473 	struct gpio_chip *chip = range->gc;  in armada_37xx_pmx_gpio_set_direction()
475 	dev_dbg(info->dev, "gpio_direction for pin %u as %s-%d to %s\n",  in armada_37xx_pmx_gpio_set_direction()
476 		offset, range->name, offset, input ? "input" : "output");  in armada_37xx_pmx_gpio_set_direction()
495 	dev_dbg(info->dev, "requesting gpio %d\n", offset);  in armada_37xx_gpio_request_enable()
534 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_ack()
535 	writel(d->mask, info->base + reg);  in armada_37xx_irq_ack()
536 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_ack()
547 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_mask()
548 	val = readl(info->base + reg);  in armada_37xx_irq_mask()
549 	writel(val & ~d->mask, info->base + reg);  in armada_37xx_irq_mask()
550 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_mask()
561 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_unmask()
562 	val = readl(info->base + reg);  in armada_37xx_irq_unmask()
563 	writel(val | d->mask, info->base + reg);  in armada_37xx_irq_unmask()
564 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_unmask()
575 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_set_wake()
576 	val = readl(info->base + reg);  in armada_37xx_irq_set_wake()
578 		val |= (BIT(d->hwirq % GPIO_PER_REG));  in armada_37xx_irq_set_wake()
580 		val &= ~(BIT(d->hwirq % GPIO_PER_REG));  in armada_37xx_irq_set_wake()
581 	writel(val, info->base + reg);  in armada_37xx_irq_set_wake()
582 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_set_wake()
594 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_set_type()
596 	val = readl(info->base + reg);  in armada_37xx_irq_set_type()
599 		val &= ~(BIT(d->hwirq % GPIO_PER_REG));  in armada_37xx_irq_set_type()
602 		val |= (BIT(d->hwirq % GPIO_PER_REG));  in armada_37xx_irq_set_type()
608 		regmap_read(info->regmap, in_reg, &in_val);  in armada_37xx_irq_set_type()
611 		if (in_val & BIT(d->hwirq % GPIO_PER_REG))  in armada_37xx_irq_set_type()
612 			val |= BIT(d->hwirq % GPIO_PER_REG);	/* falling */  in armada_37xx_irq_set_type()
614 			val &= ~(BIT(d->hwirq % GPIO_PER_REG));	/* rising */  in armada_37xx_irq_set_type()
618 		raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_set_type()
619 		return -EINVAL;  in armada_37xx_irq_set_type()
621 	writel(val, info->base + reg);  in armada_37xx_irq_set_type()
622 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_set_type()
635 	regmap_read(info->regmap, INPUT_VAL + 4*reg_idx, &l);  in armada_37xx_edge_both_irq_swap_pol()
637 	raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_edge_both_irq_swap_pol()
638 	p = readl(info->base + IRQ_POL + 4 * reg_idx);  in armada_37xx_edge_both_irq_swap_pol()
641 		 * For the gpios which are used for both-edge irqs, when their  in armada_37xx_edge_both_irq_swap_pol()
651 		writel(p, info->base + IRQ_POL + 4 * reg_idx);  in armada_37xx_edge_both_irq_swap_pol()
655 		ret = -1;  in armada_37xx_edge_both_irq_swap_pol()
658 	raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_edge_both_irq_swap_pol()
667 	struct irq_domain *d = gc->irq.domain;  in armada_37xx_irq_handler()
671 	for (i = 0; i <= d->revmap_size / GPIO_PER_REG; i++) {  in armada_37xx_irq_handler()
675 		raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_handler()
676 		status = readl_relaxed(info->base + IRQ_STATUS + 4 * i);  in armada_37xx_irq_handler()
678 		status &= readl_relaxed(info->base + IRQ_EN + 4 * i);  in armada_37xx_irq_handler()
679 		raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_handler()
681 			u32 hwirq = ffs(status) - 1;  in armada_37xx_irq_handler()
696 					       info->base +  in armada_37xx_irq_handler()
706 			raw_spin_lock_irqsave(&info->irq_lock, flags);  in armada_37xx_irq_handler()
707 			status = readl_relaxed(info->base +  in armada_37xx_irq_handler()
710 			status &= readl_relaxed(info->base + IRQ_EN + 4 * i);  in armada_37xx_irq_handler()
711 			raw_spin_unlock_irqrestore(&info->irq_lock, flags);  in armada_37xx_irq_handler()
725 	d->mask = BIT(d->hwirq % GPIO_PER_REG);  in armada_37xx_irq_startup()
735 	struct gpio_chip *gc = &info->gpio_chip;  in armada_37xx_irqchip_register()
736 	struct irq_chip *irqchip = &info->irq_chip;  in armada_37xx_irqchip_register()
737 	struct gpio_irq_chip *girq = &gc->irq;  in armada_37xx_irqchip_register()
738 	struct device_node *np = to_of_node(gc->fwnode);  in armada_37xx_irqchip_register()
739 	struct device *dev = &pdev->dev;  in armada_37xx_irqchip_register()
742 	raw_spin_lock_init(&info->irq_lock);  in armada_37xx_irqchip_register()
750 	info->base = devm_platform_ioremap_resource(pdev, 1);  in armada_37xx_irqchip_register()
751 	if (IS_ERR(info->base))  in armada_37xx_irqchip_register()
752 		return PTR_ERR(info->base);  in armada_37xx_irqchip_register()
754 	irqchip->irq_ack = armada_37xx_irq_ack;  in armada_37xx_irqchip_register()
755 	irqchip->irq_mask = armada_37xx_irq_mask;  in armada_37xx_irqchip_register()
756 	irqchip->irq_unmask = armada_37xx_irq_unmask;  in armada_37xx_irqchip_register()
757 	irqchip->irq_set_wake = armada_37xx_irq_set_wake;  in armada_37xx_irqchip_register()
758 	irqchip->irq_set_type = armada_37xx_irq_set_type;  in armada_37xx_irqchip_register()
759 	irqchip->irq_startup = armada_37xx_irq_startup;  in armada_37xx_irqchip_register()
760 	irqchip->name = info->data->name;  in armada_37xx_irqchip_register()
761 	girq->chip = irqchip;  in armada_37xx_irqchip_register()
762 	girq->parent_handler = armada_37xx_irq_handler;  in armada_37xx_irqchip_register()
768 	girq->num_parents = nr_irq_parent;  in armada_37xx_irqchip_register()
769 	girq->parents = devm_kcalloc(dev, nr_irq_parent, sizeof(*girq->parents), GFP_KERNEL);  in armada_37xx_irqchip_register()
770 	if (!girq->parents)  in armada_37xx_irqchip_register()
771 		return -ENOMEM;  in armada_37xx_irqchip_register()
777 		girq->parents[i] = irq;  in armada_37xx_irqchip_register()
779 	girq->default_type = IRQ_TYPE_NONE;  in armada_37xx_irqchip_register()
780 	girq->handler = handle_edge_irq;  in armada_37xx_irqchip_register()
788 	struct device *dev = &pdev->dev;  in armada_37xx_gpiochip_register()
795 		return -ENODEV;  in armada_37xx_gpiochip_register()
797 	info->gpio_chip = armada_37xx_gpiolib_chip;  in armada_37xx_gpiochip_register()
799 	gc = &info->gpio_chip;  in armada_37xx_gpiochip_register()
800 	gc->ngpio = info->data->nr_pins;  in armada_37xx_gpiochip_register()
801 	gc->parent = dev;  in armada_37xx_gpiochip_register()
802 	gc->base = -1;  in armada_37xx_gpiochip_register()
803 	gc->fwnode = fwnode;  in armada_37xx_gpiochip_register()
804 	gc->label = info->data->name;  in armada_37xx_gpiochip_register()
814  * armada_37xx_add_function() - Add a new function to the list
828 		return -EOVERFLOW;  in armada_37xx_add_function()
830 	while (funcs->ngroups) {  in armada_37xx_add_function()
832 		if (strcmp(funcs->name, name) == 0) {  in armada_37xx_add_function()
833 			funcs->ngroups++;  in armada_37xx_add_function()
835 			return -EEXIST;  in armada_37xx_add_function()
842 	funcs->name = name;  in armada_37xx_add_function()
843 	funcs->ngroups = 1;  in armada_37xx_add_function()
844 	(*funcsize)--;  in armada_37xx_add_function()
850  * armada_37xx_fill_group() - complete the group array
860 	int n, num = 0, funcsize = info->data->nr_pins;  in armada_37xx_fill_group()
861 	struct device *dev = info->dev;  in armada_37xx_fill_group()
863 	for (n = 0; n < info->ngroups; n++) {  in armada_37xx_fill_group()
864 		struct armada_37xx_pin_group *grp = &info->groups[n];  in armada_37xx_fill_group()
867 		grp->pins = devm_kcalloc(dev, grp->npins + grp->extra_npins,  in armada_37xx_fill_group()
868 					 sizeof(*grp->pins),  in armada_37xx_fill_group()
870 		if (!grp->pins)  in armada_37xx_fill_group()
871 			return -ENOMEM;  in armada_37xx_fill_group()
873 		for (i = 0; i < grp->npins; i++)  in armada_37xx_fill_group()
874 			grp->pins[i] = grp->start_pin + i;  in armada_37xx_fill_group()
876 		for (j = 0; j < grp->extra_npins; j++)  in armada_37xx_fill_group()
877 			grp->pins[i+j] = grp->extra_pin + j;  in armada_37xx_fill_group()
879 		for (f = 0; (f < NB_FUNCS) && grp->funcs[f]; f++) {  in armada_37xx_fill_group()
882 			ret = armada_37xx_add_function(info->funcs, &funcsize,  in armada_37xx_fill_group()
883 					    grp->funcs[f]);  in armada_37xx_fill_group()
884 			if (ret == -EOVERFLOW)  in armada_37xx_fill_group()
886 					info->data->nr_pins);  in armada_37xx_fill_group()
893 	info->nfuncs = num;  in armada_37xx_fill_group()
899  * armada_37xx_fill_func() - complete the funcs array
904  * - the list of the pins included in the group
905  * - the list of pinmux functions that can be selected for this group
910 	struct armada_37xx_pmx_func *funcs = info->funcs;  in armada_37xx_fill_func()
911 	struct device *dev = info->dev;  in armada_37xx_fill_func()
914 	for (n = 0; n < info->nfuncs; n++) {  in armada_37xx_fill_func()
923 			return -ENOMEM;  in armada_37xx_fill_func()
927 		for (g = 0; g < info->ngroups; g++) {  in armada_37xx_fill_func()
928 			struct armada_37xx_pin_group *gp = &info->groups[g];  in armada_37xx_fill_func()  local
931 			f = match_string(gp->funcs, NB_FUNCS, name);  in armada_37xx_fill_func()
935 			*groups = gp->name;  in armada_37xx_fill_func()
945 	const struct armada_37xx_pin_data *pin_data = info->data;  in armada_37xx_pinctrl_register()
946 	struct pinctrl_desc *ctrldesc = &info->pctl;  in armada_37xx_pinctrl_register()
948 	struct device *dev = &pdev->dev;  in armada_37xx_pinctrl_register()
952 	info->groups = pin_data->groups;  in armada_37xx_pinctrl_register()
953 	info->ngroups = pin_data->ngroups;  in armada_37xx_pinctrl_register()
955 	ctrldesc->name = "armada_37xx-pinctrl";  in armada_37xx_pinctrl_register()
956 	ctrldesc->owner = THIS_MODULE;  in armada_37xx_pinctrl_register()
957 	ctrldesc->pctlops = &armada_37xx_pctrl_ops;  in armada_37xx_pinctrl_register()
958 	ctrldesc->pmxops = &armada_37xx_pmx_ops;  in armada_37xx_pinctrl_register()
959 	ctrldesc->confops = &armada_37xx_pinconf_ops;  in armada_37xx_pinctrl_register()
961 	pindesc = devm_kcalloc(dev, pin_data->nr_pins, sizeof(*pindesc), GFP_KERNEL);  in armada_37xx_pinctrl_register()
963 		return -ENOMEM;  in armada_37xx_pinctrl_register()
965 	ctrldesc->pins = pindesc;  in armada_37xx_pinctrl_register()
966 	ctrldesc->npins = pin_data->nr_pins;  in armada_37xx_pinctrl_register()
968 	pin_names = devm_kasprintf_strarray(dev, pin_data->name, pin_data->nr_pins);  in armada_37xx_pinctrl_register()
973 	for (pin = 0; pin < pin_data->nr_pins; pin++) {  in armada_37xx_pinctrl_register()
974 		pdesc->number = pin;  in armada_37xx_pinctrl_register()
975 		pdesc->name = pin_names[pin];  in armada_37xx_pinctrl_register()
983 	info->funcs = devm_kcalloc(dev, pin_data->nr_pins, sizeof(*info->funcs), GFP_KERNEL);  in armada_37xx_pinctrl_register()
984 	if (!info->funcs)  in armada_37xx_pinctrl_register()
985 		return -ENOMEM;  in armada_37xx_pinctrl_register()
995 	info->pctl_dev = devm_pinctrl_register(dev, ctrldesc, info);  in armada_37xx_pinctrl_register()
996 	if (IS_ERR(info->pctl_dev))  in armada_37xx_pinctrl_register()
997 		return dev_err_probe(dev, PTR_ERR(info->pctl_dev), "could not register pinctrl driver\n");  in armada_37xx_pinctrl_register()
1008 	regmap_read(info->regmap, OUTPUT_EN, &info->pm.out_en_l);  in armada_3700_pinctrl_suspend()
1009 	regmap_read(info->regmap, OUTPUT_EN + sizeof(u32), &info->pm.out_en_h);  in armada_3700_pinctrl_suspend()
1010 	regmap_read(info->regmap, OUTPUT_VAL, &info->pm.out_val_l);  in armada_3700_pinctrl_suspend()
1011 	regmap_read(info->regmap, OUTPUT_VAL + sizeof(u32),  in armada_3700_pinctrl_suspend()
1012 		    &info->pm.out_val_h);  in armada_3700_pinctrl_suspend()
1014 	info->pm.irq_en_l = readl(info->base + IRQ_EN);  in armada_3700_pinctrl_suspend()
1015 	info->pm.irq_en_h = readl(info->base + IRQ_EN + sizeof(u32));  in armada_3700_pinctrl_suspend()
1016 	info->pm.irq_pol_l = readl(info->base + IRQ_POL);  in armada_3700_pinctrl_suspend()
1017 	info->pm.irq_pol_h = readl(info->base + IRQ_POL + sizeof(u32));  in armada_3700_pinctrl_suspend()
1020 	regmap_read(info->regmap, SELECTION, &info->pm.selection);  in armada_3700_pinctrl_suspend()
1033 	regmap_write(info->regmap, OUTPUT_EN, info->pm.out_en_l);  in armada_3700_pinctrl_resume()
1034 	regmap_write(info->regmap, OUTPUT_EN + sizeof(u32),  in armada_3700_pinctrl_resume()
1035 		     info->pm.out_en_h);  in armada_3700_pinctrl_resume()
1036 	regmap_write(info->regmap, OUTPUT_VAL, info->pm.out_val_l);  in armada_3700_pinctrl_resume()
1037 	regmap_write(info->regmap, OUTPUT_VAL + sizeof(u32),  in armada_3700_pinctrl_resume()
1038 		     info->pm.out_val_h);  in armada_3700_pinctrl_resume()
1042 	 * that time. GPIOs used for both-edge IRQs may not be synchronized  in armada_3700_pinctrl_resume()
1044 	 * re-configured manually.  in armada_3700_pinctrl_resume()
1046 	gc = &info->gpio_chip;  in armada_3700_pinctrl_resume()
1047 	d = gc->irq.domain;  in armada_3700_pinctrl_resume()
1048 	for (i = 0; i < gc->ngpio; i++) {  in armada_3700_pinctrl_resume()
1053 			mask = info->pm.irq_en_l;  in armada_3700_pinctrl_resume()
1054 			irq_pol = &info->pm.irq_pol_l;  in armada_3700_pinctrl_resume()
1057 			mask = info->pm.irq_en_h;  in armada_3700_pinctrl_resume()
1058 			irq_pol = &info->pm.irq_pol_h;  in armada_3700_pinctrl_resume()
1069 		 * Synchronize level and polarity for both-edge irqs:  in armada_3700_pinctrl_resume()
1070 		 *     - a high input level expects a falling edge,  in armada_3700_pinctrl_resume()
1071 		 *     - a low input level exepects a rising edge.  in armada_3700_pinctrl_resume()
1075 			regmap_read(info->regmap, input_reg, &level);  in armada_3700_pinctrl_resume()
1081 	writel(info->pm.irq_en_l, info->base + IRQ_EN);  in armada_3700_pinctrl_resume()
1082 	writel(info->pm.irq_en_h, info->base + IRQ_EN + sizeof(u32));  in armada_3700_pinctrl_resume()
1083 	writel(info->pm.irq_pol_l, info->base + IRQ_POL);  in armada_3700_pinctrl_resume()
1084 	writel(info->pm.irq_pol_h, info->base + IRQ_POL + sizeof(u32));  in armada_3700_pinctrl_resume()
1087 	regmap_write(info->regmap, SELECTION, info->pm.selection);  in armada_3700_pinctrl_resume()
1108 		.compatible = "marvell,armada3710-sb-pinctrl",
1112 		.compatible = "marvell,armada3710-nb-pinctrl",
1128 	struct device *dev = &pdev->dev;  in armada_37xx_pinctrl_probe()
1148 		return -ENOMEM;  in armada_37xx_pinctrl_probe()
1150 	info->dev = dev;  in armada_37xx_pinctrl_probe()
1151 	info->regmap = regmap;  in armada_37xx_pinctrl_probe()
1152 	info->data = of_device_get_match_data(dev);  in armada_37xx_pinctrl_probe()
1169 		.name = "armada-37xx-pinctrl",