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Searched +full:gcc +full:- +full:ipq8074 (Results 1 – 15 of 15) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dqcom,gcc-ipq8074.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Bindingfor IPQ8074
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <tdas@codeaurora.org>
15 power domains on IPQ8074.
18 - dt-bindings/clock/qcom,gcc-ipq8074.h
22 const: qcom,gcc-ipq8074
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/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 model = "Qualcomm Technologies, Inc. IPQ8074";
11 compatible = "qcom,ipq8074";
15 compatible = "fixed-clock";
16 clock-frequency = <32000>;
17 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <19200000>;
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/Linux-v5.15/Documentation/devicetree/bindings/pci/
Dqcom,pcie.txt3 - compatible:
7 - "qcom,pcie-ipq8064" for ipq8064
8 - "qcom,pcie-ipq8064-v2" for ipq8064 rev 2 or ipq8065
9 - "qcom,pcie-apq8064" for apq8064
10 - "qcom,pcie-apq8084" for apq8084
11 - "qcom,pcie-msm8996" for msm8996 or apq8096
12 - "qcom,pcie-ipq4019" for ipq4019
13 - "qcom,pcie-ipq8074" for ipq8074
14 - "qcom,pcie-qcs404" for qcs404
15 - "qcom,pcie-sdm845" for sdm845
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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dqcom,qmp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qmp-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
20 - qcom,ipq6018-qmp-pcie-phy
21 - qcom,ipq6018-qmp-usb3-phy
22 - qcom,ipq8074-qmp-pcie-phy
23 - qcom,ipq8074-qmp-usb3-phy
24 - qcom,msm8996-qmp-pcie-phy
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Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
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/Linux-v5.15/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,qcs404-wcss-pil"
13 "qcom,msm8916-mss-pil",
14 "qcom,msm8974-mss-pil"
15 "qcom,msm8996-mss-pil"
16 "qcom,msm8998-mss-pil"
17 "qcom,sc7180-mss-pil"
18 "qcom,sdm845-mss-pil"
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/Linux-v5.15/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
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/Linux-v5.15/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
14 - Sivaprakash Murugesan <sivaprak@codeaurora.org>
19 - qcom,ipq6018-apcs-apps-global
20 - qcom,ipq8074-apcs-apps-global
21 - qcom,msm8916-apcs-kpss-global
22 - qcom,msm8939-apcs-kpss-global
23 - qcom,msm8953-apcs-kpss-global
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/firmware/
Dqcom,scm.txt9 - compatible: must contain one of the following:
10 * "qcom,scm-apq8064"
11 * "qcom,scm-apq8084"
12 * "qcom,scm-ipq4019"
13 * "qcom,scm-ipq806x"
14 * "qcom,scm-ipq8074"
15 * "qcom,scm-mdm9607"
16 * "qcom,scm-msm8660"
17 * "qcom,scm-msm8916"
18 * "qcom,scm-msm8960"
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/Linux-v5.15/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
168 tristate "IPQ8074 Global Clock Controller"
170 Support for global clock controller on ipq8074 devices.
173 of ipq8074.
640 tristate "High-Frequency PLL (HFPLL) Clock Controller"
642 Support for the high-frequency PLLs present on Qualcomm devices.
649 Support for the Krait ACC and GCC clock controllers. Say Y
Dgcc-ipq8074.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
18 #include "clk-regmap.h"
19 #include "clk-pll.h"
20 #include "clk-rcg.h"
21 #include "clk-branch.h"
22 #include "clk-alpha-pll.h"
23 #include "clk-regmap-divider.h"
24 #include "clk-regmap-mux.h"
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/Linux-v5.15/drivers/mailbox/
Dqcom-apcs-ipc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
41 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
69 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
82 struct qcom_apcs_ipc *apcs = container_of(chan->mbox, in qcom_apcs_ipc_send_data()
84 unsigned long idx = (unsigned long)chan->con_priv; in qcom_apcs_ipc_send_data()
86 return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); in qcom_apcs_ipc_send_data()
103 apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); in qcom_apcs_ipc_probe()
105 return -ENOMEM; in qcom_apcs_ipc_probe()
108 base = devm_ioremap_resource(&pdev->dev, res); in qcom_apcs_ipc_probe()
[all …]
/Linux-v5.15/drivers/remoteproc/
Dqcom_q6v5_wcss.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2016-2018 Linaro Ltd.
5 * Copyright (c) 2012-2018, The Linux Foundation. All rights reserved.
161 val = readl(wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
163 writel(val, wcss->reg_base + Q6SS_RESET_REG); in q6v5_wcss_reset()
166 val = readl(wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
168 writel(val, wcss->reg_base + Q6SS_XO_CBCR); in q6v5_wcss_reset()
171 ret = readl_poll_timeout(wcss->reg_base + Q6SS_XO_CBCR, in q6v5_wcss_reset()
175 dev_err(wcss->dev, in q6v5_wcss_reset()
180 val = readl(wcss->reg_base + Q6SS_PWR_CTL_REG); in q6v5_wcss_reset()
[all …]
/Linux-v5.15/drivers/phy/qualcomm/
Dphy-qcom-qmp.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
84 * if yes, then offset gives index in the reg-layout
116 /* set of registers with offsets different per-PHY */
2766 /* struct qmp_phy_cfg - per-PHY initialization config */
2768 /* phy-type - PCIE/UFS/USB */
2773 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
2855 * struct qmp_phy - per-lane phy descriptor
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