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/Linux-v5.15/drivers/dma/dw-edma/
Ddw-edma-v0-core.c11 #include "dw-edma-core.h"
12 #include "dw-edma-v0-core.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-v0-debugfs.h"
26 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
28 return dw->rg_region.vaddr; in __dw_regs()
31 #define SET_32(dw, name, value) \ argument
32 writel(value, &(__dw_regs(dw)->name))
34 #define GET_32(dw, name) \ argument
35 readl(&(__dw_regs(dw)->name))
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Ddw-edma-core.c20 #include "dw-edma-core.h"
21 #include "dw-edma-v0-core.h"
68 struct dw_edma *dw = chan->chip->dw; in dw_edma_alloc_chunk() local
85 chunk->ll_region.paddr = dw->ll_region_wr[chan->id].paddr; in dw_edma_alloc_chunk()
86 chunk->ll_region.vaddr = dw->ll_region_wr[chan->id].vaddr; in dw_edma_alloc_chunk()
88 chunk->ll_region.paddr = dw->ll_region_rd[chan->id].paddr; in dw_edma_alloc_chunk()
89 chunk->ll_region.vaddr = dw->ll_region_rd[chan->id].vaddr; in dw_edma_alloc_chunk()
604 struct dw_edma *dw = dw_irq->dw; in dw_edma_interrupt() local
610 total = dw->wr_ch_cnt; in dw_edma_interrupt()
614 total = dw->rd_ch_cnt; in dw_edma_interrupt()
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Ddw-edma-pcie.c18 #include "dw-edma-core.h"
151 struct dw_edma *dw; in dw_edma_pcie_probe() local
217 dw = devm_kzalloc(dev, sizeof(*dw), GFP_KERNEL); in dw_edma_pcie_probe()
218 if (!dw) in dw_edma_pcie_probe()
231 chip->dw = dw; in dw_edma_pcie_probe()
236 dw->mf = vsec_data.mf; in dw_edma_pcie_probe()
237 dw->nr_irqs = nr_irqs; in dw_edma_pcie_probe()
238 dw->ops = &dw_edma_pcie_core_ops; in dw_edma_pcie_probe()
239 dw->wr_ch_cnt = vsec_data.wr_ch_cnt; in dw_edma_pcie_probe()
240 dw->rd_ch_cnt = vsec_data.rd_ch_cnt; in dw_edma_pcie_probe()
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Ddw-edma-v0-debugfs.c12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
41 static struct dw_edma *dw; variable
57 if (dw->mf == EDMA_MF_EDMA_LEGACY && in dw_edma_debugfs_u32_get()
64 for (ch = 0; ch < dw->wr_ch_cnt; ch++) in dw_edma_debugfs_u32_get()
70 for (ch = 0; ch < dw->rd_ch_cnt; ch++) in dw_edma_debugfs_u32_get()
82 raw_spin_lock_irqsave(&dw->lock, flags); in dw_edma_debugfs_u32_get()
87 raw_spin_unlock_irqrestore(&dw->lock, flags); in dw_edma_debugfs_u32_get()
176 if (dw->mf == EDMA_MF_HDMA_COMPAT) { in dw_edma_debugfs_regs_wr()
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DMakefile3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o
5 dw-edma-objs := dw-edma-core.o \
6 dw-edma-v0-core.o $(dw-edma-y)
7 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
/Linux-v5.15/drivers/misc/
Ddw-xdata-pcie.c20 #define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
73 static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw) in __dw_regs() argument
75 return dw->rg_region.vaddr; in __dw_regs()
78 static void dw_xdata_stop(struct dw_xdata *dw) in dw_xdata_stop() argument
82 mutex_lock(&dw->mutex); in dw_xdata_stop()
84 burst = readl(&(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
88 writel(burst, &(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
91 mutex_unlock(&dw->mutex); in dw_xdata_stop()
94 static void dw_xdata_start(struct dw_xdata *dw, bool write) in dw_xdata_start() argument
96 struct device *dev = &dw->pdev->dev; in dw_xdata_start()
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/Linux-v5.15/drivers/gpu/drm/bridge/synopsys/
Ddw-hdmi-ahb-audio.c21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
156 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_iec958()
157 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_iec958()
158 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_iec958()
181 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_s24() argument
184 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_s24()
185 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_s24()
186 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_s24()
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/Linux-v5.15/drivers/dma/dw/
Dcore.c82 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
86 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
101 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
109 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
113 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
119 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
121 dw->initialize_chan(dwc); in dwc_initialize()
124 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
125 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
141 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
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Ddw.c16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan() local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); in dw_dma_initialize_chan()
91 static void dw_dma_set_device_name(struct dw_dma *dw, int id) in dw_dma_set_device_name() argument
93 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); in dw_dma_set_device_name()
96 static void dw_dma_disable(struct dw_dma *dw) in dw_dma_disable() argument
98 do_dw_dma_off(dw); in dw_dma_disable()
101 static void dw_dma_enable(struct dw_dma *dw) in dw_dma_enable() argument
103 do_dw_dma_on(dw); in dw_dma_enable()
108 struct dw_dma *dw; in dw_dma_probe() local
110 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
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Didma32.c48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar() local
49 void __iomem *misc = __dw_regs(dw); in idma32_initialize_chan_xbar()
217 static void idma32_set_device_name(struct dw_dma *dw, int id) in idma32_set_device_name() argument
219 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); in idma32_set_device_name()
228 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
241 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
242 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
245 static void idma32_disable(struct dw_dma *dw) in idma32_disable() argument
247 do_dw_dma_off(dw); in idma32_disable()
248 idma32_fifo_partition(dw); in idma32_disable()
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Dinternal.h11 #include <linux/dma/dw.h>
18 void do_dw_dma_on(struct dw_dma *dw);
19 void do_dw_dma_off(struct dw_dma *dw);
27 void dw_dma_acpi_controller_register(struct dw_dma *dw);
28 void dw_dma_acpi_controller_free(struct dw_dma *dw);
30 static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} in dw_dma_acpi_controller_register() argument
31 static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} in dw_dma_acpi_controller_free() argument
38 void dw_dma_of_controller_register(struct dw_dma *dw);
39 void dw_dma_of_controller_free(struct dw_dma *dw);
45 static inline void dw_dma_of_controller_register(struct dw_dma *dw) {} in dw_dma_of_controller_register() argument
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/Linux-v5.15/Documentation/devicetree/bindings/mmc/
Drockchip-dw-mshc.yaml4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: "synopsys-dw-mshc-common.yaml#"
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
32 - rockchip,px30-dw-mshc
33 - rockchip,rk1808-dw-mshc
34 - rockchip,rk3036-dw-mshc
35 - rockchip,rk3228-dw-mshc
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Dexynos-dw-mshc.txt6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
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Dk3-dw-mshc.txt4 Read synopsys-dw-mshc.txt for more details
8 differences between the core Synopsys dw mshc controller properties described
9 by synopsys-dw-mshc.txt and the properties used by the Hisilicon specific
15 - "hisilicon,hi3660-dw-mshc": for controllers with hi3660 specific extensions.
16 - "hisilicon,hi3670-dw-mshc", "hisilicon,hi3660-dw-mshc": for controllers
18 - "hisilicon,hi4511-dw-mshc": for controllers with hi4511 specific extensions.
19 - "hisilicon,hi6220-dw-mshc": for controllers with hi6220 specific extensions.
30 compatible = "hisilicon,hi4511-dw-mshc";
55 compatible = "hisilicon,hi6220-dw-mshc";
/Linux-v5.15/include/uapi/scsi/
Dscsi_bsg_ufs.h18 /* uic commands are 4DW long, per UFSHCI V2.1 paragraph 5.6.1 */
23 * @dword_0: UPIU header DW-0
24 * @dword_1: UPIU header DW-1
25 * @dword_2: UPIU header DW-2
42 * @value: Attribute value to be written DW-5
43 * @reserved: spec reserved DW-6,7
58 * @data_transfer_len: Data Transfer Length DW-3
59 * @cdb: Command Descriptor Block CDB DW-4 to DW-7
68 * @header:UPIU header structure DW-0 to DW-2
69 * @sc: fields structure for scsi command DW-3 to DW-7
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/Linux-v5.15/drivers/dma/dw-axi-dmac/
Ddw-axi-dmac-platform.c31 #include "dw-axi-dmac.h"
36 * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
184 for (i = 0; i < chip->dw->hdata->nr_channels; i++) { in axi_dma_hw_init()
185 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in axi_dma_hw_init()
186 axi_chan_disable(&chip->dw->chan[i]); in axi_dma_hw_init()
193 u32 max_width = chan->chip->dw->hdata->m_data_width; in axi_chan_get_xfer_width()
338 u32 priority = chan->chip->dw->hdata->priority[chan->id]; in axi_chan_block_xfer_start()
552 if (desc->chan->chip->dw->hdata->nr_masters > 1) in set_desc_dest_master()
564 unsigned int data_width = BIT(chan->chip->dw->hdata->m_data_width); in dw_axi_dma_set_hw_desc()
573 axi_block_ts = chan->chip->dw->hdata->block_size[chan->id]; in dw_axi_dma_set_hw_desc()
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/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_cmdpkt.h93 /* DW 0 */
98 /* DW 1 */
102 /* DW 2 */
106 /* DW 3 */
110 /* DW 4 */
114 /* DW 5 */
118 /* DW 6-8 */
123 /* DW 9 */
133 /* DW 0 */
138 /* DW 1-?? */
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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ih.c143 * @num_dw: size of the iv in dw
273 uint32_t dw[8]; in amdgpu_ih_decode_iv_helper() local
275 dw[0] = le32_to_cpu(ih->ring[ring_index + 0]); in amdgpu_ih_decode_iv_helper()
276 dw[1] = le32_to_cpu(ih->ring[ring_index + 1]); in amdgpu_ih_decode_iv_helper()
277 dw[2] = le32_to_cpu(ih->ring[ring_index + 2]); in amdgpu_ih_decode_iv_helper()
278 dw[3] = le32_to_cpu(ih->ring[ring_index + 3]); in amdgpu_ih_decode_iv_helper()
279 dw[4] = le32_to_cpu(ih->ring[ring_index + 4]); in amdgpu_ih_decode_iv_helper()
280 dw[5] = le32_to_cpu(ih->ring[ring_index + 5]); in amdgpu_ih_decode_iv_helper()
281 dw[6] = le32_to_cpu(ih->ring[ring_index + 6]); in amdgpu_ih_decode_iv_helper()
282 dw[7] = le32_to_cpu(ih->ring[ring_index + 7]); in amdgpu_ih_decode_iv_helper()
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/Linux-v5.15/arch/arm/boot/dts/
Dberlin2cd.dtsi175 compatible = "snps,dw-apb-gpio";
181 compatible = "snps,dw-apb-gpio-port";
193 compatible = "snps,dw-apb-gpio";
199 compatible = "snps,dw-apb-gpio-port";
211 compatible = "snps,dw-apb-gpio";
217 compatible = "snps,dw-apb-gpio-port";
229 compatible = "snps,dw-apb-gpio";
235 compatible = "snps,dw-apb-gpio-port";
267 compatible = "snps,dw-apb-ssi";
277 compatible = "snps,dw-wdt";
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Dberlin2.dtsi185 compatible = "snps,dw-apb-gpio";
191 compatible = "snps,dw-apb-gpio-port";
203 compatible = "snps,dw-apb-gpio";
209 compatible = "snps,dw-apb-gpio-port";
221 compatible = "snps,dw-apb-gpio";
227 compatible = "snps,dw-apb-gpio-port";
239 compatible = "snps,dw-apb-gpio";
245 compatible = "snps,dw-apb-gpio-port";
257 compatible = "snps,dw-apb-timer";
266 compatible = "snps,dw-apb-timer";
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/Linux-v5.15/Documentation/devicetree/bindings/watchdog/
Dsnps,dw-wdt.yaml4 $id: http://devicetree.org/schemas/watchdog/snps,dw-wdt.yaml#
18 - const: snps,dw-wdt
32 - const: snps,dw-wdt
38 description: DW Watchdog pre-timeout interrupt
54 description: Phandle to the DW Watchdog reset lane
60 DW APB Watchdog custom timer intervals - Timeout Period ranges (TOPs).
64 the timer expiration intervals supported by the DW APB Watchdog. Note
65 DW APB Watchdog IP-core might be synthesized with fixed TOP values,
84 compatible = "snps,dw-wdt";
93 compatible = "snps,dw-wdt";
/Linux-v5.15/arch/arm64/boot/dts/synaptics/
Dberlin4ct.dtsi134 compatible = "snps,dw-apb-gpio";
140 compatible = "snps,dw-apb-gpio-port";
152 compatible = "snps,dw-apb-gpio";
158 compatible = "snps,dw-apb-gpio-port";
170 compatible = "snps,dw-apb-gpio";
176 compatible = "snps,dw-apb-gpio-port";
188 compatible = "snps,dw-apb-gpio";
194 compatible = "snps,dw-apb-gpio-port";
206 compatible = "snps,dw-apb-ictl";
233 compatible = "snps,dw-apb-ictl";
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/Linux-v5.15/Documentation/ABI/testing/
Dsysfs-driver-xdata1 What: /sys/class/misc/drivers/dw-xdata-pcie.<device>/write
13 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/write
15 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/write
21 cat /sys/class/misc/dw-xdata-pcie.<device>/write
26 What: /sys/class/misc/dw-xdata-pcie.<device>/read
38 echo 1 > /sys/class/misc/dw-xdata-pcie.<device>/read
40 echo 0 > /sys/class/misc/dw-xdata-pcie.<device>/read
46 cat /sys/class/misc/dw-xdata-pcie.<device>/read
/Linux-v5.15/drivers/misc/sgi-gru/
Dgruhandles.h184 unsigned int cmd:1; /* DW 0 */
199 unsigned long vaddr:64; /* DW 1 */
201 unsigned int asid:24; /* DW 2 */
210 unsigned long vaddrmask:39; /* DW 3 */
259 unsigned int cmd:1; /* DW 0 - low 32*/
274 unsigned int indexway:12; /* DW 0 - high 32 */
280 unsigned long missvaddr:64; /* DW 1 */
282 unsigned int missasid:24; /* DW 2 */
289 unsigned long pfn:41; /* DW 3 */
294 unsigned long fillvaddr:64; /* DW 4 */
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/Linux-v5.15/drivers/gpu/drm/i915/gt/
Dselftest_lrc.c150 int dw; in live_lrc_layout() local
165 dw = 0; in live_lrc_layout()
167 u32 lri = READ_ONCE(hw[dw]); in live_lrc_layout()
170 dw++; in live_lrc_layout()
174 if (lrc[dw] == 0) { in live_lrc_layout()
176 engine->name, lri, dw); in live_lrc_layout()
177 dw++; in live_lrc_layout()
183 engine->name, dw, lri); in live_lrc_layout()
188 if (lrc[dw] != lri) { in live_lrc_layout()
190 engine->name, dw, lri, lrc[dw]); in live_lrc_layout()
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