11 #include "dw-edma-core.h"
12 #include "dw-edma-v0-core.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-v0-debugfs.h"
26 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw)  in __dw_regs()  argument
28 	return dw->rg_region.vaddr;  in __dw_regs()
31 #define SET_32(dw, name, value)				\  argument
32 	writel(value, &(__dw_regs(dw)->name))
34 #define GET_32(dw, name)				\  argument
35 	readl(&(__dw_regs(dw)->name))
37 #define SET_RW_32(dw, dir, name, value)			\  argument
40 			SET_32(dw, wr_##name, value);	\
42 			SET_32(dw, rd_##name, value);	\
45 #define GET_RW_32(dw, dir, name)			\  argument
47 	  ? GET_32(dw, wr_##name)			\
48 	  : GET_32(dw, rd_##name))
50 #define SET_BOTH_32(dw, name, value)			\  argument
52 		SET_32(dw, wr_##name, value);		\
53 		SET_32(dw, rd_##name, value);		\
58 #define SET_64(dw, name, value)				\  argument
59 	writeq(value, &(__dw_regs(dw)->name))
61 #define GET_64(dw, name)				\  argument
62 	readq(&(__dw_regs(dw)->name))
64 #define SET_RW_64(dw, dir, name, value)			\  argument
67 			SET_64(dw, wr_##name, value);	\
69 			SET_64(dw, rd_##name, value);	\
72 #define GET_RW_64(dw, dir, name)			\  argument
74 	  ? GET_64(dw, wr_##name)			\
75 	  : GET_64(dw, rd_##name))
77 #define SET_BOTH_64(dw, name, value)			\  argument
79 		SET_64(dw, wr_##name, value);		\
80 		SET_64(dw, rd_##name, value);		\
85 #define SET_COMPAT(dw, name, value)			\  argument
86 	writel(value, &(__dw_regs(dw)->type.unroll.name))
88 #define SET_RW_COMPAT(dw, dir, name, value)		\  argument
91 			SET_COMPAT(dw, wr_##name, value); \
93 			SET_COMPAT(dw, rd_##name, value); \
97 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch)  in __dw_ch_regs()  argument
99 	if (dw->mf == EDMA_MF_EDMA_LEGACY)  in __dw_ch_regs()
100 		return &(__dw_regs(dw)->type.legacy.ch);  in __dw_ch_regs()
103 		return &__dw_regs(dw)->type.unroll.ch[ch].wr;  in __dw_ch_regs()
105 	return &__dw_regs(dw)->type.unroll.ch[ch].rd;  in __dw_ch_regs()
108 static inline void writel_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in writel_ch()  argument
111 	if (dw->mf == EDMA_MF_EDMA_LEGACY) {  in writel_ch()
115 		raw_spin_lock_irqsave(&dw->lock, flags);  in writel_ch()
122 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in writel_ch()
125 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in writel_ch()
131 static inline u32 readl_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in readl_ch()  argument
136 	if (dw->mf == EDMA_MF_EDMA_LEGACY) {  in readl_ch()
140 		raw_spin_lock_irqsave(&dw->lock, flags);  in readl_ch()
147 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in readl_ch()
150 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in readl_ch()
158 #define SET_CH_32(dw, dir, ch, name, value) \  argument
159 	writel_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
161 #define GET_CH_32(dw, dir, ch, name) \  argument
162 	readl_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
169 static inline void writeq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in writeq_ch()  argument
172 	if (dw->mf == EDMA_MF_EDMA_LEGACY) {  in writeq_ch()
176 		raw_spin_lock_irqsave(&dw->lock, flags);  in writeq_ch()
183 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in writeq_ch()
186 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in writeq_ch()
192 static inline u64 readq_ch(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch,  in readq_ch()  argument
197 	if (dw->mf == EDMA_MF_EDMA_LEGACY) {  in readq_ch()
201 		raw_spin_lock_irqsave(&dw->lock, flags);  in readq_ch()
208 		       &(__dw_regs(dw)->type.legacy.viewport_sel));  in readq_ch()
211 		raw_spin_unlock_irqrestore(&dw->lock, flags);  in readq_ch()
219 #define SET_CH_64(dw, dir, ch, name, value) \  argument
220 	writeq_ch(dw, dir, ch, value, &(__dw_ch_regs(dw, dir, ch)->name))
222 #define GET_CH_64(dw, dir, ch, name) \  argument
223 	readq_ch(dw, dir, ch, &(__dw_ch_regs(dw, dir, ch)->name))
231 void dw_edma_v0_core_off(struct dw_edma *dw)  in dw_edma_v0_core_off()  argument
233 	SET_BOTH_32(dw, int_mask,  in dw_edma_v0_core_off()
235 	SET_BOTH_32(dw, int_clear,  in dw_edma_v0_core_off()
237 	SET_BOTH_32(dw, engine_en, 0);  in dw_edma_v0_core_off()
240 u16 dw_edma_v0_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_ch_count()  argument
246 				   GET_32(dw, ctrl));  in dw_edma_v0_core_ch_count()
249 				   GET_32(dw, ctrl));  in dw_edma_v0_core_ch_count()
259 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_ch_status()  local
263 			GET_CH_32(dw, chan->dir, chan->id, ch_control1));  in dw_edma_v0_core_ch_status()
275 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_clear_done_int()  local
277 	SET_RW_32(dw, chan->dir, int_clear,  in dw_edma_v0_core_clear_done_int()
283 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_clear_abort_int()  local
285 	SET_RW_32(dw, chan->dir, int_clear,  in dw_edma_v0_core_clear_abort_int()
289 u32 dw_edma_v0_core_status_done_int(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_status_done_int()  argument
292 			 GET_RW_32(dw, dir, int_status));  in dw_edma_v0_core_status_done_int()
295 u32 dw_edma_v0_core_status_abort_int(struct dw_edma *dw, enum dw_edma_dir dir)  in dw_edma_v0_core_status_abort_int()  argument
298 			 GET_RW_32(dw, dir, int_status));  in dw_edma_v0_core_status_abort_int()
360 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_start()  local
367 		SET_RW_32(dw, chan->dir, engine_en, BIT(0));  in dw_edma_v0_core_start()
368 		if (dw->mf == EDMA_MF_HDMA_COMPAT) {  in dw_edma_v0_core_start()
371 				SET_RW_COMPAT(dw, chan->dir, ch0_pwr_en,  in dw_edma_v0_core_start()
375 				SET_RW_COMPAT(dw, chan->dir, ch1_pwr_en,  in dw_edma_v0_core_start()
379 				SET_RW_COMPAT(dw, chan->dir, ch2_pwr_en,  in dw_edma_v0_core_start()
383 				SET_RW_COMPAT(dw, chan->dir, ch3_pwr_en,  in dw_edma_v0_core_start()
387 				SET_RW_COMPAT(dw, chan->dir, ch4_pwr_en,  in dw_edma_v0_core_start()
391 				SET_RW_COMPAT(dw, chan->dir, ch5_pwr_en,  in dw_edma_v0_core_start()
395 				SET_RW_COMPAT(dw, chan->dir, ch6_pwr_en,  in dw_edma_v0_core_start()
399 				SET_RW_COMPAT(dw, chan->dir, ch7_pwr_en,  in dw_edma_v0_core_start()
405 		tmp = GET_RW_32(dw, chan->dir, int_mask);  in dw_edma_v0_core_start()
408 		SET_RW_32(dw, chan->dir, int_mask, tmp);  in dw_edma_v0_core_start()
410 		tmp = GET_RW_32(dw, chan->dir, linked_list_err_en);  in dw_edma_v0_core_start()
412 		SET_RW_32(dw, chan->dir, linked_list_err_en, tmp);  in dw_edma_v0_core_start()
414 		SET_CH_32(dw, chan->dir, chan->id, ch_control1,  in dw_edma_v0_core_start()
418 			SET_CH_64(dw, chan->dir, chan->id, llp.reg,  in dw_edma_v0_core_start()
421 			SET_CH_32(dw, chan->dir, chan->id, llp.lsb,  in dw_edma_v0_core_start()
423 			SET_CH_32(dw, chan->dir, chan->id, llp.msb,  in dw_edma_v0_core_start()
428 	SET_RW_32(dw, chan->dir, doorbell,  in dw_edma_v0_core_start()
434 	struct dw_edma *dw = chan->chip->dw;  in dw_edma_v0_core_device_config()  local
438 	SET_RW_32(dw, chan->dir, done_imwr.lsb, chan->msi.address_lo);  in dw_edma_v0_core_device_config()
439 	SET_RW_32(dw, chan->dir, done_imwr.msb, chan->msi.address_hi);  in dw_edma_v0_core_device_config()
441 	SET_RW_32(dw, chan->dir, abort_imwr.lsb, chan->msi.address_lo);  in dw_edma_v0_core_device_config()
442 	SET_RW_32(dw, chan->dir, abort_imwr.msb, chan->msi.address_hi);  in dw_edma_v0_core_device_config()
447 		tmp = GET_RW_32(dw, chan->dir, ch01_imwr_data);  in dw_edma_v0_core_device_config()
452 		tmp = GET_RW_32(dw, chan->dir, ch23_imwr_data);  in dw_edma_v0_core_device_config()
457 		tmp = GET_RW_32(dw, chan->dir, ch45_imwr_data);  in dw_edma_v0_core_device_config()
462 		tmp = GET_RW_32(dw, chan->dir, ch67_imwr_data);  in dw_edma_v0_core_device_config()
481 		SET_RW_32(dw, chan->dir, ch01_imwr_data, tmp);  in dw_edma_v0_core_device_config()
486 		SET_RW_32(dw, chan->dir, ch23_imwr_data, tmp);  in dw_edma_v0_core_device_config()
491 		SET_RW_32(dw, chan->dir, ch45_imwr_data, tmp);  in dw_edma_v0_core_device_config()
496 		SET_RW_32(dw, chan->dir, ch67_imwr_data, tmp);  in dw_edma_v0_core_device_config()