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/Linux-v6.1/Documentation/devicetree/bindings/dma/
Ddma-router.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/dma/dma-router.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DMA Router Generic Binding
10 - Vinod Koul <vkoul@kernel.org>
13 - $ref: "dma-common.yaml#"
16 DMA routers are transparent IP blocks used to route DMA request
17 lines from devices to the DMA controller. Some SoCs (like TI DRA7x)
18 have more peripherals integrated with DMA requests than what the DMA
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Dst,stm32-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/st,stm32-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 DMA MUX (DMA request router) bindings
10 - Amelie Delaunay <amelie.delaunay@foss.st.com>
13 - $ref: "dma-router.yaml#"
16 "#dma-cells":
20 const: st,stm32h7-dmamux
32 - compatible
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Drenesas,rzn1-dmamux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/renesas,rzn1-dmamux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 DMA mux
10 - Miquel Raynal <miquel.raynal@bootlin.com>
13 - $ref: "dma-router.yaml#"
17 const: renesas,rzn1-dmamux
21 description: DMA mux first register offset within the system control parent.
23 '#dma-cells':
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Dti-dma-crossbar.txt1 Texas Instruments DMA Crossbar (DMA request router)
4 - compatible: "ti,dra7-dma-crossbar" for DRA7xx DMA crossbar
5 "ti,am335x-edma-crossbar" for AM335x and AM437x
6 - reg: Memory map for accessing module
7 - #dma-cells: Should be set to match with the DMA controller's dma-cells
8 for ti,dra7-dma-crossbar and <3> for ti,am335x-edma-crossbar.
9 - dma-requests: Number of DMA requests the crossbar can receive
10 - dma-masters: phandle pointing to the DMA controller
12 The DMA controller node need to have the following poroperties:
13 - dma-requests: Number of DMA requests the controller can handle
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Dlpc1850-dmamux.txt1 NXP LPC18xx/43xx DMA MUX (DMA request router)
4 - compatible: "nxp,lpc1850-dmamux"
5 - reg: Memory map for accessing module
6 - #dma-cells: Should be set to <3>.
7 * 1st cell contain the master dma request signal
8 * 2nd cell contain the mux value (0-3) for the peripheral
11 - dma-requests: Number of DMA requests for the mux
12 - dma-masters: phandle pointing to the DMA controller
14 The DMA controller node need to have the following poroperties:
15 - dma-requests: Number of DMA requests the controller can handle
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/Linux-v6.1/drivers/dma/
Dof-dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Device tree helpers for DMA request / controller
7 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
24 * of_dma_find_controller - Get a DMA controller in DT DMA helpers list
25 * @dma_spec: pointer to DMA specifier as found in the device tree
27 * Finds a DMA controller with matching device node and number for dma cells
28 * in a list of registered DMA controllers. If a match is found a valid pointer
29 * to the DMA data stored is retuned. A NULL pointer is returned if no match is
37 if (ofdma->of_node == dma_spec->np) in of_dma_find_controller()
40 pr_debug("%s: can't find DMA controller %pOF\n", __func__, in of_dma_find_controller()
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Ddmaengine.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
7 * This code implements the DMA subsystem. It provides a HW-neutral interface
9 * if present, and allows different HW DMA drivers to register as providing
29 * See Documentation/driver-api/dmaengine for more details
35 #include <linux/dma-mapping.h>
63 /* --- debugfs implementation --- */
71 dma_dev->dbg_dev_root = debugfs_create_dir(dev_name(dma_dev->dev), in dmaengine_debug_register()
73 if (IS_ERR(dma_dev->dbg_dev_root)) in dmaengine_debug_register()
74 dma_dev->dbg_dev_root = NULL; in dmaengine_debug_register()
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Dstm32-dmamux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Pierre-Yves Mordret <pierre-yves.mordret@st.com>
8 * DMA Router driver for STM32 DMA MUX
10 * Based on TI DMA Crossbar driver
39 u32 dma_requests; /* Number of DMA requests connected to DMAMUX */
40 u32 dmamux_requests; /* Number of DMA requests routed toward DMAs */
42 DECLARE_BITMAP(dma_inuse, STM32_DMAMUX_MAX_DMA_REQUESTS); /* Used DMA channel */
46 u32 dma_reqs[]; /* Number of DMA Request per DMA masters.
47 * [0] holds number of DMA Masters.
68 /* Clear dma request */ in stm32_dmamux_free()
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Dlpc18xx-dmamux.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * DMA Router driver for LPC18xx/43xx DMA MUX
7 * Based on TI DMA Crossbar driver by:
8 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com
46 spin_lock_irqsave(&dmamux->lock, flags); in lpc18xx_dmamux_free()
47 mux->busy = false; in lpc18xx_dmamux_free()
48 spin_unlock_irqrestore(&dmamux->lock, flags); in lpc18xx_dmamux_free()
54 struct platform_device *pdev = of_find_device_by_node(ofdma->of_node); in lpc18xx_dmamux_reserve()
59 if (dma_spec->args_count != 3) { in lpc18xx_dmamux_reserve()
60 dev_err(&pdev->dev, "invalid number of dma mux args\n"); in lpc18xx_dmamux_reserve()
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/Linux-v6.1/drivers/thunderbolt/
Dtb.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Thunderbolt driver - bus logic (NHI independent)
12 #include <linux/nvmem-provider.h>
27 * struct tb_nvm - Structure holding NVM information
34 * @non_active: Non-active portion NVMem device
43 * @vops: Router vendor specific NVM operations (optional)
75 * enum tb_switch_tmu_rate - TMU refresh rate
91 * struct tb_switch_tmu - Structure holding switch TMU configuration
93 * @has_ucap: Does the switch support uni-directional mode
96 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
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Dswitch.c1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - switch/port utility functions
11 #include <linux/nvmem-provider.h>
30 MODULE_PARM_DESC(clx, "allow low power states on the high-speed lanes (default: true)");
45 if (uuid_equal(&st->uuid, sw->uuid)) in __nvm_get_auth_status()
60 *status = st ? st->status : 0; in nvm_get_auth_status()
67 if (WARN_ON(!sw->uuid)) in nvm_set_auth_status()
78 memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); in nvm_set_auth_status()
79 INIT_LIST_HEAD(&st->list); in nvm_set_auth_status()
80 list_add_tail(&st->list, &nvm_auth_status_cache); in nvm_set_auth_status()
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Dusb4.c1 // SPDX-License-Identifier: GPL-2.0
87 return -EOPNOTSUPP; in usb4_native_switch_op()
112 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; in __usb4_switch_op()
115 return -EINVAL; in __usb4_switch_op()
118 * If the connection manager implementation provides USB4 router in __usb4_switch_op()
122 if (cm_ops->usb4_switch_op) { in __usb4_switch_op()
125 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status, in __usb4_switch_op()
128 if (ret != -EOPNOTSUPP) in __usb4_switch_op()
133 * router operation instead. in __usb4_switch_op()
162 if (!device_may_wakeup(&sw->dev)) in usb4_switch_check_wakes()
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Dtb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - bus logic (NHI independent)
22 * struct tb_cm - Simple Thunderbolt connection manager
41 return ((void *)tcm - sizeof(struct tb)); in tcm_to_tb()
62 ev->tb = tb; in tb_queue_hotplug()
63 ev->route = route; in tb_queue_hotplug()
64 ev->port = port; in tb_queue_hotplug()
65 ev->unplug = unplug; in tb_queue_hotplug()
66 INIT_WORK(&ev->work, tb_handle_hotplug); in tb_queue_hotplug()
67 queue_work(tb->wq, &ev->work); in tb_queue_hotplug()
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Dctl.c1 // SPDX-License-Identifier: GPL-2.0
3 * Thunderbolt driver - control channel and configuration commands
23 * struct tb_ctl - Thunderbolt control channel
27 * @frame_pool: DMA pool for control messages
32 * @timeout_msec: Default timeout for non-raw control messages
54 dev_WARN(&(ctl)->nhi->pdev->dev, format, ## arg)
57 dev_err(&(ctl)->nhi->pdev->dev, format, ## arg)
60 dev_warn(&(ctl)->nhi->pdev->dev, format, ## arg)
63 dev_info(&(ctl)->nhi->pdev->dev, format, ## arg)
66 dev_dbg(&(ctl)->nhi->pdev->dev, format, ## arg)
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/Linux-v6.1/sound/pci/ca0106/
Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
15 * Use separate card based DMA buffer for periods table list.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
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/Linux-v6.1/include/linux/
Ddmaengine.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
18 * typedef dma_cookie_t - an opaque DMA cookie
20 * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
31 * enum dma_status - DMA transaction status
46 * enum dma_transaction_type - DMA transaction types/indexes
49 * automatically set as dma devices are registered.
73 * enum dma_transfer_direction - dma transfer mode and direction indicator
89 * ----------------------------
91 * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG).
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/Linux-v6.1/Documentation/devicetree/bindings/clock/
Drenesas,r9a06g032-sysctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,r9a06g032-sysctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gareth Williams <gareth.williams.jx@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
15 const: renesas,r9a06g032-sysctrl
23 - description: External 40 MHz crystal
24 - description: Optional external 32.768 kHz crystal
25 - description: Optional external JTAG input
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/Linux-v6.1/Documentation/devicetree/bindings/dma/ti/
Dk3-bcdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
5 ---
6 $id: http://devicetree.org/schemas/dma/ti/k3-bcdma.yaml#
7 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Peter Ujfalusi <peter.ujfalusi@gmail.com>
15 The Block Copy DMA (BCDMA) is intended to perform similar functions as the TR
16 mode channels of K3 UDMA-P.
23 Split channels can be used to service PSI-L based peripherals.
24 The peripherals can be PSI-L native or legacy, non PSI-L native peripherals
25 with PDMAs. PDMA is tasked to act as a bridge between the PSI-L fabric and the
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/Linux-v6.1/Documentation/networking/device_drivers/fddi/
Dskfp.rst1 .. SPDX-License-Identifier: GPL-2.0
6 SysKonnect driver - SKFP
9 |copy| Copyright 1998-2000 SysKonnect,
11 skfp.txt created 11-May-2000
53 - SK-5521 (SK-NET FDDI-UP)
54 - SK-5522 (SK-NET FDDI-UP DAS)
55 - SK-5541 (SK-NET FDDI-FP)
56 - SK-5543 (SK-NET FDDI-LP)
57 - SK-5544 (SK-NET FDDI-LP DAS)
58 - SK-5821 (SK-NET FDDI-UP64)
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/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dnvidia,tegra-audio-graph-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra-audio-graph-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Sameer Pujar <spujar@nvidia.com>
19 - $ref: audio-graph.yaml#
24 - nvidia,tegra210-audio-graph-card
25 - nvidia,tegra186-audio-graph-card
30 clock-names:
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/Linux-v6.1/arch/arm/boot/dts/
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
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Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
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/Linux-v6.1/drivers/mailbox/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
72 the Turris Mox router).
96 This driver provides support for inter-processor communication
183 module will be called mailbox-mpfs.
192 providing an interface for invoking the inter-process communication
205 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
208 An implementation of the APM X-Gene Interprocessor Communication
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/Linux-v6.1/Documentation/arm/stm32/
Dstm32-dma-mdma-chaining.rst1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
15 direct memory access controllers (DMA).
17 STM32MP1 SoCs embed both STM32 DMA and STM32 MDMA controllers. STM32 DMA
18 request routing capabilities are enhanced by a DMA request multiplexer
23 STM32 DMAMUX routes any DMA request from a given peripheral to any STM32 DMA
24 controller (STM32MP1 counts two STM32 DMA controllers) channels.
26 **STM32 DMA**
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/Linux-v6.1/Documentation/admin-guide/
Dthunderbolt.rst1 .. SPDX-License-Identifier: GPL-2.0
8 manager is an entity running on the host router (host controller)
22 is expected to be accompanied with an IOMMU based DMA protection.
25 -----------------------------------
27 should be a userspace tool that handles all the low-level details, keeps
31 found in ``Documentation/ABI/testing/sysfs-bus-thunderbolt``.
35 ``/etc/udev/rules.d/99-local.rules``::
41 vulnerable to DMA attacks.
46 be DMA masters and thus read contents of the host memory without CPU and OS
102 -----------------------------------------------------------------
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