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/Linux-v5.15/drivers/gpu/drm/msm/dp/
Ddp_power.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
12 * sruct dp_power - DisplayPort's power related data
26 * dp_power_init() - enable power supplies for display controller
38 * dp_power_deinit() - turn off regulators and gpios.
48 * dp_power_clk_status() - display controller clocks status
60 * dp_power_clk_enable() - enable display controller clocks
74 * dp_power_client_init() - initialize clock and regulator modules
79 * This API will configure the DisplayPort's clocks and regulator
85 * dp_power_clinet_deinit() - de-initialize clock and regulator modules
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/Linux-v5.15/Documentation/devicetree/bindings/display/msm/
Ddp-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MSM Display Port Controller
10 - Kuogee Hsieh <khsieh@codeaurora.org>
13 Device tree bindings for DisplayPort host controller for MSM targets
14 that are compatible with VESA DisplayPort interface specification.
19 - qcom,sc7180-dp
29 - description: AHB clock to enable register access
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/Linux-v5.15/Documentation/devicetree/bindings/display/xlnx/
Dxlnx,zynqmp-dpsub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort Subsystem
10 The DisplayPort subsystem of Xilinx ZynqMP (Zynq UltraScale+ MPSoC)
11 implements the display and audio pipelines based on the DisplayPort v1.2
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
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/Linux-v5.15/Documentation/devicetree/bindings/dma/xilinx/
Dxlnx,zynqmp-dpdma.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort DMA Controller Device Tree Bindings
11 DisplayPort Subsystem. The DMA engine supports up to 6 DMA channels (3
16 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - $ref: "../dma-controller.yaml#"
22 "#dma-cells":
25 The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h
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/Linux-v5.15/drivers/gpu/drm/xlnx/
Dzynqmp_dpsub.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 * struct zynqmp_dpsub - ZynqMP DisplayPort Subsystem
33 * @disp: The display controller
34 * @dp: The DisplayPort controller
Dzynqmp_dp.c1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP DisplayPort Driver
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
242 * struct zynqmp_dp_link_config - Common link config between source and sink
252 * struct zynqmp_dp_mode - Configured mode of DisplayPort
266 * struct zynqmp_dp_config - Configuration of DisplayPort from DTS
278 * struct zynqmp_dp - Xilinx DisplayPort core
285 * @reset: reset controller
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/Linux-v5.15/Documentation/devicetree/bindings/clock/
Dqcom,mmcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller Binding
10 - Jeffrey Hugo <jhugo@codeaurora.org>
11 - Taniya Das <tdas@codeaurora.org>
20 - qcom,mmcc-apq8064
21 - qcom,mmcc-apq8084
22 - qcom,mmcc-msm8660
23 - qcom,mmcc-msm8960
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/Linux-v5.15/Documentation/devicetree/bindings/display/
Ddp-aux-bus.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/dp-aux-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort AUX bus
10 - Douglas Anderson <dianders@chromium.org>
13 DisplayPort controllers provide a control channel to the sinks that
20 of the DP controller under the "aux-bus" node.
29 const: "aux-bus"
32 $ref: panel/panel-common.yaml#
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/Linux-v5.15/sound/pci/hda/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "HD-Audio"
23 This option enables the HD-audio controller. Don't forget
27 will be called snd-hda-intel.
35 Say Y here to support the HDA controller present in NVIDIA
38 This options enables support for the HD Audio controller
43 will be called snd-hda-tegra.
48 bool "Build hwdep interface for HD-audio driver"
51 Say Y here to build a hwdep interface for HD-audio driver.
52 This interface can be used for out-of-band communication
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/Linux-v5.15/Documentation/devicetree/bindings/display/bridge/
Dite,it6505.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Allen Chen <allen.chen@ite.com.tw>
13 The IT6505 is a high-performance DisplayPort 1.1a transmitter,
14 fully compliant with DisplayPort 1.1a, HDCP 1.3 specifications.
16 and ensures robust transmission of high-quality uncompressed video
27 transmission of high-definition content. Users of the IT6505 need not
37 ovdd-supply:
40 pwr18-supply:
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Dgoogle,cros-ec-anx7688.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/google,cros-ec-anx7688.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ChromeOS EC ANX7688 HDMI to DP Converter through Type-C Port
10 - Nicolas Boichat <drinkcat@chromium.org>
11 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
15 DisplayPort 1.3 Ultra-HDi (4096x2160p60). It is an Analogix ANX7688 chip
16 which is connected to and operated by the ChromeOS Embedded Controller
17 (See google,cros-ec.yaml). It is accessed using I2C tunneling through
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Danalogix,anx7814.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analogix ANX7814 SlimPort (Full-HD Transmitter)
10 - Enric Balletbo i Serra <enric.balletbo@collabora.com>
15 - analogix,anx7808
16 - analogix,anx7812
17 - analogix,anx7814
18 - analogix,anx7818
28 hpd-gpios:
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Dcdns,mhdp8546.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Swapnil Jakhade <sjakhade@cadence.com>
11 - Yuti Amonkar <yamonkar@cadence.com>
16 - cdns,mhdp8546
17 - ti,j721e-mhdp8546
22 - description:
26 - description:
28 - description:
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Dti,sn65dsi86.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sandeep Panda <spanda@codeaurora.org>
23 enable-gpios:
27 suspend-gpios:
31 no-hpd:
37 vccio-supply:
40 vpll-supply:
41 description: A 1.8V supply that powers the DisplayPort PLL.
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/Linux-v5.15/Documentation/gpu/
Dtegra.rst6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
22 outputs, such as RGB, HDMI, DSI, and DisplayPort.
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
52 .. kernel-doc:: drivers/gpu/host1x/bus.c
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/Linux-v5.15/drivers/dma/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
65 Enable support for Altera / Intel mSGDMA controller.
93 Support the Atmel AHB DMA controller.
100 Support the Atmel XDMA controller.
103 tristate "Analog Devices AXI-DMAC DMA support"
109 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
110 controller is often used in Analog Devices' reference designs for FPGA
140 This selects support for the DMA controller in Ingenic JZ4780 SoCs.
142 devices which can use the DMA controller, say Y or M here.
145 tristate "SA-11x0 DMA support"
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/Linux-v5.15/drivers/platform/x86/intel/int33fe/
Dintel_cht_int33fe_typec.c1 // SPDX-License-Identifier: GPL-2.0
11 * 2. Maxim MAX17047 Fuel Gauge Controller
12 * 3. FUSB302 USB Type-C Controller
16 * instantiate I²C clients for chips 2 - 4, so that standard I²C drivers
32 * Grrr, I severely dislike buggy BIOS-es. At least one BIOS enumerates
56 static const char * const max17047_suppliers[] = { "bq24190-charger" };
59 PROPERTY_ENTRY_STRING_ARRAY("supplied-from", max17047_suppliers),
78 PROPERTY_ENTRY_STRING("linux,extcon-name", "cht_wcove_pwrsrc"),
79 PROPERTY_ENTRY_REF_ARRAY("usb-role-switch", fusb302_mux_refs),
105 .name = "displayport",
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/Linux-v5.15/Documentation/devicetree/bindings/display/connector/
Ddp-connector.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/connector/dp-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: DisplayPort Connector
10 - Tomi Valkeinen <tomi.valkeinen@ti.com>
14 const: dp-connector
20 - full-size
21 - mini
23 hpd-gpios:
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/Linux-v5.15/Documentation/devicetree/bindings/display/exynos/
Dexynos_dp.txt5 -dp-controller node
6 -dptx-phy node(defined inside dp-controller node)
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10 -reg: deprecated
12 -samsung,enable-mask: deprecated
13 The bit-mask used to enable/disable DP PHY.
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
17 -compatible:
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/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dphy-cadence-torrent.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 hardware included with the Cadence MHDP DisplayPort controller. Torrent
16 - Swapnil Jakhade <sjakhade@cadence.com>
17 - Yuti Amonkar <yamonkar@cadence.com>
22 - cdns,torrent-phy
23 - ti,j721e-serdes-10g
25 '#address-cells':
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/Linux-v5.15/Documentation/devicetree/bindings/connector/
Dusb-connector.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/connector/usb-connector.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
14 of a USB interface controller or a separate node when it is attached to both
15 MUX and USB interface controller.
20 - enum:
21 - usb-a-connector
22 - usb-b-connector
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/Linux-v5.15/drivers/gpu/drm/bridge/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "Chipone ICN6211 MIPI-DSI/RGB Converter bridge"
36 ICN6211 is MIPI-DSI/RGB Converter bridge from chipone.
60 ChromeOS EC ANX7688 is an ultra-low power
61 4K Ultra-HD (4096x2160p60) mobile HD transmitter
63 2.0 to DisplayPort 1.3 Ultra-HD. It is connected
64 to the ChromeOS Embedded Controller.
70 Driver for display connectors with support for DDC and hot-plug
74 on ARM-based platforms. Saying Y here when this driver is not needed
91 The module will be named "lontium-lt8912b".
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/Linux-v5.15/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
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/Linux-v5.15/Documentation/arm/omap/
Ddss.rst7 TV-out and multiple display support, but there are lots of small improvements
10 The DSS2 driver (omapdss module) is in arch/arm/plat-omap/dss/, and the FB,
11 panel and controller drivers are in drivers/video/omap2/. DSS1 and DSS2 live
15 --------
19 - MIPI DPI (parallel) output
20 - MIPI DSI output in command mode
21 - MIPI DBI (RFBI) output
22 - SDI output
23 - TV output
24 - All pieces can be compiled as a module or inside kernel
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/Linux-v5.15/drivers/thunderbolt/
Dacpi.c1 // SPDX-License-Identifier: GPL-2.0
28 ret = fwnode_property_get_reference_args(fwnode, "usb4-host-interface", in tb_acpi_add_link()
34 if (nhi->pdev->dev.fwnode != args.fwnode) in tb_acpi_add_link()
44 adev = adev->parent; in tb_acpi_add_link()
60 dev = dev->parent; in tb_acpi_add_link()
71 if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI || in tb_acpi_add_link()
77 link = device_link_add(&pdev->dev, &nhi->pdev->dev, in tb_acpi_add_link()
81 dev_dbg(&nhi->pdev->dev, "created link from %s\n", in tb_acpi_add_link()
82 dev_name(&pdev->dev)); in tb_acpi_add_link()
84 dev_warn(&nhi->pdev->dev, "device link creation from %s failed\n", in tb_acpi_add_link()
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