Lines Matching +full:displayport +full:- +full:controller
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/xilinx/xlnx,zynqmp-dpdma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP DisplayPort DMA Controller Device Tree Bindings
11 DisplayPort Subsystem. The DMA engine supports up to 6 DMA channels (3
16 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
19 - $ref: "../dma-controller.yaml#"
22 "#dma-cells":
25 The cell is the DMA channel ID (see dt-bindings/dma/xlnx-zynqmp-dpdma.h
29 const: xlnx,zynqmp-dpdma
41 clock-names:
45 - "#dma-cells"
46 - compatible
47 - reg
48 - interrupts
49 - clocks
50 - clock-names
55 - |
56 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 dma: dma-controller@fd4c0000 {
59 compatible = "xlnx,zynqmp-dpdma";
62 interrupt-parent = <&gic>;
64 clock-names = "axi_clk";
65 #dma-cells = <1>;