Searched +full:display +full:- +full:controller (Results 1 – 25 of 921) sorted by relevance
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| /Linux-v5.15/drivers/clk/qcom/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
40 tristate "MSM8916 APCS Clock Controller"
43 Support for the APCS Clock Controller on msm8916 devices. The
49 tristate "MSM8996 CPU Clock Controller"
53 Support for the CPU clock controller on msm8996 devices.
58 tristate "SDX55 APCS Clock Controller"
61 Support for the APCS Clock Controller on SDX55 platform. The
67 tristate "RPM based Clock Controller"
80 tristate "RPM over SMD based Clock Controller"
102 tristate "APQ8084 Global Clock Controller"
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| /Linux-v5.15/drivers/staging/fbtft/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 tristate "Support for small TFT LCD display modules"
14 tristate "FB driver for the AGM1264K-FL LCD display"
17 Framebuffer support for the AGM1264K-FL LCD display (two Samsung KS0108 compatible chips)
20 tristate "FB driver for the BD663474 LCD Controller"
26 tristate "FB driver for the HX8340BN LCD Controller"
32 tristate "FB driver for the HX8347D LCD Controller"
38 tristate "FB driver for the HX8353D LCD Controller"
44 tristate "FB driver for the HX8357D LCD Controller"
50 tristate "FB driver for the ILI9163 LCD Controller"
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| /Linux-v5.15/Documentation/devicetree/bindings/auxdisplay/ |
| D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hitachi HD44780 Character LCD Controller
10 - Geert Uytterhoeven <geert@linux-m68k.org>
13 The Hitachi HD44780 Character LCD Controller is commonly used on character
14 LCDs that can display one or more lines of text. It exposes an M6800 bus
15 interface, which can be used in either 4-bit or 8-bit mode. By using a
24 data-gpios:
26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or
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| /Linux-v5.15/Documentation/devicetree/bindings/display/msm/ |
| D | dpu-sc7180.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sc7180.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SC7180 target
10 - Krishna Manikandan <mkrishn@codeaurora.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
20 - const: qcom,sc7180-mdss
25 reg-names:
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| D | dpu-sdm845.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SDM845 target
10 - Krishna Manikandan <mkrishn@codeaurora.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
20 - const: qcom,sdm845-mdss
25 reg-names:
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| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI controller
10 - Krishna Manikandan <mkrishn@codeaurora.org>
13 - $ref: "../dsi-controller.yaml#"
18 - const: qcom,mdss-dsi-ctrl
23 reg-names:
31 - description: Display byte clock
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| D | dp-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dp-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MSM Display Port Controller
10 - Kuogee Hsieh <khsieh@codeaurora.org>
13 Device tree bindings for DisplayPort host controller for MSM targets
19 - qcom,sc7180-dp
29 - description: AHB clock to enable register access
30 - description: Display Port AUX clock
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| /Linux-v5.15/drivers/staging/olpc_dcon/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
3 tristate "One Laptop Per Child Display CONtroller support"
10 secondary Display CONtroller, or DCON. This secondary controller
11 is present in the video pipeline between the primary display
12 controller (integrate into the processor or chipset) and the LCD
13 panel. It allows the main processor/display controller to be
14 completely powered off while still retaining an image on the display.
15 This controller is only available on OLPC platforms. Unless you have
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| /Linux-v5.15/Documentation/gpu/ |
| D | tegra.rst | 2 drm/tegra NVIDIA Tegra GPU and display driver
5 NVIDIA Tegra SoCs support a set of display, graphics and video functions via
6 the host1x controller. host1x supplies command streams, gathered from a push
11 supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
18 - A host1x driver that provides infrastructure and access to the host1x
21 - A KMS driver that supports the display controllers as well as a number of
24 - A set of custom userspace IOCTLs that can be used to submit jobs to the
40 device using a driver-provided function which will set up the bits specific to
48 -------------------------------
50 .. kernel-doc:: include/linux/host1x.h
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| /Linux-v5.15/drivers/gpu/drm/sun4i/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "DRM Support for Allwinner A10 Display Engine"
14 Display Engine. If M is selected the module will be called
15 sun4i-drm.
20 tristate "Allwinner A10 HDMI Controller Support"
24 controller.
33 controller and want to use CEC.
36 tristate "Support for Allwinner A10 Display Engine Backend"
40 original Allwinner Display Engine, which has a backend to
42 selected the module will be called sun4i-backend.
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| /Linux-v5.15/Documentation/devicetree/bindings/display/ |
| D | intel,keembay-display.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/intel,keembay-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Devicetree bindings for Intel Keem Bay display controller
10 - Anitha Chrisanthus <anitha.chrisanthus@intel.com>
11 - Edmond J Dea <edmund.j.dea@intel.com>
15 const: intel,keembay-display
19 - description: LCD registers range
21 reg-names:
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| D | atmel,lcdc.txt | 2 -----------------------------------------------------
5 - compatible :
6 "atmel,at91sam9261-lcdc" ,
7 "atmel,at91sam9263-lcdc" ,
8 "atmel,at91sam9g10-lcdc" ,
9 "atmel,at91sam9g45-lcdc" ,
10 "atmel,at91sam9g45es-lcdc" ,
11 "atmel,at91sam9rl-lcdc" ,
12 "atmel,at32ap-lcdc"
13 - reg : Should contain 1 register ranges(address and length).
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| D | solomon,ssd1307fb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/solomon,ssd1307fb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Solomon SSD1307 OLED Controller Framebuffer
10 - Maxime Ripard <mripard@kernel.org>
15 - solomon,ssd1305fb-i2c
16 - solomon,ssd1306fb-i2c
17 - solomon,ssd1307fb-i2c
18 - solomon,ssd1309fb-i2c
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| /Linux-v5.15/drivers/video/fbdev/mmp/hw/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "mmp display controller hw support"
7 Marvell MMP display hw controller support
8 this controller is used on Marvell PXA910 and
12 bool "mmp display controller spi port"
16 Marvell MMP display hw controller spi port support
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| /Linux-v5.15/Documentation/devicetree/bindings/display/panel/ |
| D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Display Panels
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
15 display panels. It doesn't constitue a device tree binding specification by
24 width-mm:
29 height-mm:
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| /Linux-v5.15/Documentation/devicetree/bindings/display/exynos/ |
| D | exynos7-decon.txt | 1 Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)
3 DECON (Display and Enhancement Controller) is the Display Controller for the
8 - compatible: value should be "samsung,exynos7-decon";
10 - reg: physical base address and length of the DECON registers set.
12 - interrupts: should contain a list of all DECON IP block interrupts in the
14 format depends on the interrupt controller used.
16 - interrupt-names: should contain the interrupt names: "fifo", "vsync",
20 - pinctrl-0: pin control group to be used for this controller.
22 - pinctrl-names: must contain a "default" entry.
24 - clocks: must include clock specifiers corresponding to entries in the
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| D | exynos_dp.txt | 1 The Exynos display port interface should be configured based on
5 -dp-controller node
6 -dptx-phy node(defined inside dp-controller node)
8 For the DP-PHY initialization, we use the dptx-phy node.
9 Required properties for dptx-phy: deprecated, use phys and phy-names
10 -reg: deprecated
12 -samsung,enable-mask: deprecated
13 The bit-mask used to enable/disable DP PHY.
15 For the Panel initialization, we read data from dp-controller node.
16 Required properties for dp-controller:
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| /Linux-v5.15/drivers/platform/surface/aggregator/ |
| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * Provides access to a SAM-over-SSH connected EC via a controller device.
10 * Copyright (C) 2019-2021 Maximilian Luz <luzmaximilian@gmail.com>
24 #include <linux/surface_aggregator/controller.h>
27 #include "controller.h"
33 /* -- Static controller reference. ------------------------------------------ */
36 * Main controller reference. The corresponding lock must be held while
43 * ssam_get_controller() - Get reference to SSAM controller.
45 * Returns a reference to the SSAM controller of the system or %NULL if there
48 * controller, thus the calling party must ensure that ssam_controller_put()
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| /Linux-v5.15/drivers/gpu/drm/msm/dp/ |
| D | dp_parser.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
11 #include <linux/phy/phy-dp.h>
16 #define DP_LABEL "MDSS DP DISPLAY"
45 * struct dp_display_data - display related device tree data.
47 * @ctrl_node: referece to controller device
49 * @is_active: is the controller currently active
50 * @name: name of the display
51 * @display_type: type of the display
62 * struct dp_ctrl_resource - controller's IO related data
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| /Linux-v5.15/drivers/gpu/drm/xlnx/ |
| D | zynqmp_disp.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * ZynqMP Display Controller Driver
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
27 #include <linux/dma-mapping.h>
42 * --------
44 * The display controller part of ZynqMP DP subsystem, made of the Audio/Video
47 * +------------------------------------------------------------+
48 * +--------+ | +----------------+ +-----------+ |
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| /Linux-v5.15/Documentation/devicetree/bindings/display/atmel/ |
| D | hlcdc-dc.txt | 1 Device-Tree bindings for Atmel's HLCDC (High LCD Controller) DRM driver
3 The Atmel HLCDC Display Controller is subdevice of the HLCDC MFD device.
4 See ../../mfd/atmel-hlcdc.txt for more details.
7 - compatible: value should be "atmel,hlcdc-display-controller"
8 - pinctrl-names: the pin control state names. Should contain "default".
9 - pinctrl-0: should contain the default pinctrl states.
10 - #address-cells: should be set to 1.
11 - #size-cells: should be set to 0.
20 according to ../../media/video-interfaces.txt, specifically
21 - bus-width: recognized values are <12>, <16>, <18> and <24>, and
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| /Linux-v5.15/Documentation/devicetree/bindings/gpio/ |
| D | xylon,logicvc-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/gpio/xylon,logicvc-gpio.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Xylon LogiCVC GPIO controller
11 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
14 The LogiCVC GPIO describes the GPIO block included in the LogiCVC display
15 controller. These are meant to be used for controlling display-related
18 The controller exposes GPIOs from the display and power control registers,
20 - GPIO[4:0] (display control) mapped to index 0-4
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| /Linux-v5.15/Documentation/fb/ |
| D | metronomefb.rst | 9 Metronomefb is a driver for the Metronome display controller. The controller
10 is from E-Ink Corporation. It is intended to be used to drive the E-Ink
11 Vizplex display media. E-Ink hosts some details of this controller and the
12 display media here http://www.e-ink.com/products/matrix/metronome.html .
17 The display and error status are each pulled through individual GPIOs.
21 PXA board used in the AM-200 EPD devkit. This example is am200epd.c
24 interface to the metronome controller. The waveform information is expected to
32 a possibility that it could have some permanent effects on the display media.
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| /Linux-v5.15/Documentation/devicetree/bindings/display/imx/ |
| D | nxp,imx8mq-dcss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: iMX8MQ Display Controller Subsystem (DCSS)
11 - Laurentiu Palcu <laurentiu.palcu@nxp.com>
15 The DCSS (display controller sub system) is used to source up to three
16 display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP
17 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10
23 const: nxp,imx8mq-dcss
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| /Linux-v5.15/Documentation/devicetree/bindings/mfd/ |
| D | atmel-hlcdc.txt | 1 Device-Tree bindings for Atmel's HLCDC (High LCD Controller) MFD driver
4 - compatible: value should be one of the following:
5 "atmel,at91sam9n12-hlcdc"
6 "atmel,at91sam9x5-hlcdc"
7 "atmel,sama5d2-hlcdc"
8 "atmel,sama5d3-hlcdc"
9 "atmel,sama5d4-hlcdc"
10 "microchip,sam9x60-hlcdc"
11 - reg: base address and size of the HLCDC device registers.
12 - clock-names: the name of the 3 clocks requested by the HLCDC device.
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