Lines Matching +full:display +full:- +full:controller

1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dpu-sdm845.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DPU dt properties for SDM845 target
10 - Krishna Manikandan <mkrishn@codeaurora.org>
13 Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
20 - const: qcom,sdm845-mdss
25 reg-names:
28 power-domains:
33 - description: Display AHB clock from gcc
34 - description: Display AXI clock
35 - description: Display core clock
37 clock-names:
39 - const: iface
40 - const: bus
41 - const: core
46 interrupt-controller: true
48 "#address-cells": true
50 "#size-cells": true
52 "#interrupt-cells":
57 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
58 - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
63 "^display-controller@[0-9a-f]+$":
70 - const: qcom,sdm845-dpu
74 - description: Address offset and size for mdp register set
75 - description: Address offset and size for vbif register set
77 reg-names:
79 - const: mdp
80 - const: vbif
84 - description: Display ahb clock
85 - description: Display axi clock
86 - description: Display core clock
87 - description: Display vsync clock
89 clock-names:
91 - const: iface
92 - const: bus
93 - const: core
94 - const: vsync
99 power-domains:
102 operating-points-v2: true
121 - port@0
122 - port@1
125 - compatible
126 - reg
127 - reg-names
128 - clocks
129 - interrupts
130 - power-domains
131 - operating-points-v2
132 - ports
135 - compatible
136 - reg
137 - reg-names
138 - power-domains
139 - clocks
140 - interrupts
141 - interrupt-controller
142 - iommus
143 - ranges
148 - |
149 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
150 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
151 #include <dt-bindings/interrupt-controller/arm-gic.h>
152 #include <dt-bindings/power/qcom-rpmpd.h>
154 display-subsystem@ae00000 {
155 #address-cells = <1>;
156 #size-cells = <1>;
157 compatible = "qcom,sdm845-mdss";
159 reg-names = "mdss";
160 power-domains = <&dispcc MDSS_GDSC>;
165 clock-names = "iface", "bus", "core";
168 interrupt-controller;
169 #interrupt-cells = <1>;
175 display-controller@ae01000 {
176 compatible = "qcom,sdm845-dpu";
179 reg-names = "mdp", "vbif";
185 clock-names = "iface", "bus", "core", "vsync";
187 interrupt-parent = <&mdss>;
189 power-domains = <&rpmhpd SDM845_CX>;
190 operating-points-v2 = <&mdp_opp_table>;
193 #address-cells = <1>;
194 #size-cells = <0>;
199 remote-endpoint = <&dsi0_in>;
206 remote-endpoint = <&dsi1_in>;