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/Linux-v5.10/drivers/i2c/muxes/
Di2c-mux-gpmux.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/i2c-mux.h>
18 struct mux_control *control; member
28 ret = mux_control_select(mux->control, chan); in i2c_mux_select()
29 mux->do_not_deselect = ret < 0; in i2c_mux_select()
38 if (mux->do_not_deselect) in i2c_mux_deselect()
41 return mux_control_deselect(mux->control); in i2c_mux_deselect()
46 struct device_node *np = dev->of_node; in mux_parent_adapter()
48 struct i2c_adapter *parent; in mux_parent_adapter() local
50 parent_np = of_parse_phandle(np, "i2c-parent", 0); in mux_parent_adapter()
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/Linux-v5.10/drivers/iio/multiplexer/
Diio-mux.c1 // SPDX-License-Identifier: GPL-2.0
30 struct mux_control *control; member
31 struct iio_channel *parent; member
40 struct mux_child *child = &mux->child[idx]; in iio_mux_select()
41 struct iio_chan_spec const *chan = &mux->chan[idx]; in iio_mux_select()
45 ret = mux_control_select(mux->control, chan->channel); in iio_mux_select()
47 mux->cached_state = -1; in iio_mux_select()
51 if (mux->cached_state == chan->channel) in iio_mux_select()
54 if (chan->ext_info) { in iio_mux_select()
55 for (i = 0; chan->ext_info[i].name; ++i) { in iio_mux_select()
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/Linux-v5.10/Documentation/devicetree/bindings/mux/
Dreg-mux.txt1 Generic register bitfield-based multiplexer controller bindings
3 Define register bitfields to be used to control multiplexers. The parent
7 - compatible : should be one of
8 "reg-mux" : if parent device of mux controller is not syscon device
9 "mmio-mux" : if parent device of mux controller is syscon device
10 - #mux-control-cells : <1>
11 - mux-reg-masks : an array of register offset and pre-shifted bitfield mask
12 pairs, each describing a single mux control.
13 * Standard mux-controller bindings as decribed in mux-controller.txt
16 - idle-states : if present, the state the muxes will have when idle. The
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Dmux-controller.txt5 that uses the mux controller. Thus, a mux controller can possibly control
8 control several multiplexers for a single consumer.
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
19 want to use with a property containing a 'mux-ctrl-list':
21 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
22 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
23 mux-ctrl-phandle : phandle to mux controller node
24 mux-ctrl-specifier : array of #mux-control-cells specifying the
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Dgpio-mux.txt1 GPIO-based multiplexer controller bindings
3 Define what GPIO pins are used to control a multiplexer. Or several
4 multiplexers, if the same pins control more than one multiplexer.
7 - compatible : "gpio-mux"
8 - mux-gpios : list of gpios used to control the multiplexer, least
10 - #mux-control-cells : <0>
11 * Standard mux-controller bindings as decribed in mux-controller.txt
14 - idle-state : if present, the state the mux will have when idle. The
23 mux: mux-controller {
24 compatible = "gpio-mux";
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/Linux-v5.10/include/linux/firmware/imx/svc/
Dpm.h1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Copyright 2017-2018 NXP
8 * control, clock control, reset control, and wake-up event control.
56 #define IMX_SC_PM_PW_MODE_LP 2 /* Power in low-power */
77 * Defines for SC PM CLK Parent
79 #define IMX_SC_PM_PARENT_XTAL 0 /* Parent is XTAL. */
80 #define IMX_SC_PM_PARENT_PLL0 1 /* Parent is PLL0 */
81 #define IMX_SC_PM_PARENT_PLL1 2 /* Parent is PLL1 or PLL0/2 */
82 #define IMX_SC_PM_PARENT_PLL2 3 /* Parent in PLL2 or PLL0/4 */
83 #define IMX_SC_PM_PARENT_BYPS 4 /* Parent is a bypass clock. */
/Linux-v5.10/drivers/usb/musb/
Dsunxi.c1 // SPDX-License-Identifier: GPL-2.0+
18 #include <linux/phy/phy-sun4i-usb.h>
95 if (!test_bit(SUNXI_MUSB_FL_ENABLED, &glue->flags)) in sunxi_musb_work()
98 if (test_and_clear_bit(SUNXI_MUSB_FL_HOSTMODE_PEND, &glue->flags)) { in sunxi_musb_work()
99 struct musb *musb = glue->musb; in sunxi_musb_work()
103 spin_lock_irqsave(&musb->lock, flags); in sunxi_musb_work()
105 devctl = readb(musb->mregs + SUNXI_MUSB_DEVCTL); in sunxi_musb_work()
106 if (test_bit(SUNXI_MUSB_FL_HOSTMODE, &glue->flags)) { in sunxi_musb_work()
107 set_bit(SUNXI_MUSB_FL_VBUS_ON, &glue->flags); in sunxi_musb_work()
108 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE; in sunxi_musb_work()
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Dmusb_dsps.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <linux/dma-mapping.h>
24 #include <linux/platform_data/usb-omap.h>
46 u16 control; member
59 /* bit positions for control */
90 u32 control; member
118 { "control", 0x14 },
136 struct musb *musb = platform_get_drvdata(glue->musb); in dsps_mod_timer()
140 wait = msecs_to_jiffies(glue->wrp->poll_timeout); in dsps_mod_timer()
144 mod_timer(&musb->dev_timer, jiffies + wait); in dsps_mod_timer()
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/Linux-v5.10/Documentation/devicetree/bindings/arm/
Dcci.txt5 ARM multi-cluster systems maintain intra-cluster coherency through a
10 clusters, through memory mapped interface, with a global control register
11 space and multiple sets of interface control registers, one per slave
19 Node's parent must be the root node /, and the address space visible
24 - compatible
28 "arm,cci-400"
29 "arm,cci-500"
30 "arm,cci-550"
32 - reg
37 address of CCI control registers common to all
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/Linux-v5.10/include/linux/
Dpowercap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
24 * struct powercap_control_type_ops - Define control type callbacks
25 * @set_enable: Enable/Disable whole control type.
32 * control type is closed. So it is safe to free data
33 * structure associated with this control type.
35 * for the control type.
37 * This structure defines control type callbacks to be implemented by client
47 * struct powercap_control_type - Defines a powercap control_type
52 * @lock: mutex for control type
58 * @node: linked-list node
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/Linux-v5.10/drivers/acpi/acpica/
Dpsparse.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
4 * Module Name: psparse - Parser top level AML parse routines
6 * Copyright (C) 2000 - 2020, Intel Corp.
34 * PARAMETERS: opcode - An AML opcode
44 /* Extended (2-byte) opcode if > 255 */ in acpi_ps_get_opcode_size()
59 * PARAMETERS: parser_state - A parser state object
72 aml = parser_state->aml; in acpi_ps_peek_opcode()
90 * PARAMETERS: walk_state - Current State
91 * op - Op to complete
121 if (((walk_state->parse_flags & ACPI_PARSE_TREE_MASK) != in acpi_ps_complete_this_op()
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/Linux-v5.10/drivers/infiniband/hw/qib/
Dqib_pcie.c2 * Copyright (c) 2010 - 2017 Intel Corporation. All rights reserved.
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
51 * from qib_pcie_params, which every chip-specific
82 qib_early_err(&pdev->dev, "pci enable failed: error %d\n", in qib_pcie_init()
83 -ret); in qib_pcie_init()
89 qib_devinfo(pdev, "pci_request_regions fails: err %d\n", -ret); in qib_pcie_init()
109 qib_early_err(&pdev->dev, in qib_pcie_init()
117 qib_early_err(&pdev->dev, in qib_pcie_init()
133 * fields required to re-initialize after a chip reset, or for
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/Linux-v5.10/drivers/regulator/
Dtps65090-regulator.c1 // SPDX-License-Identifier: GPL-2.0-only
33 * struct tps65090_regulator - Per-regulator data for a tps65090 regulator
54 * tps65090_reg_set_overcurrent_wait - Setup overcurrent wait
62 * Return: 0 if no error, non-zero if there was an error writing the register.
69 ret = regmap_update_bits(rdev->regmap, rdev->desc->enable_reg, in tps65090_reg_set_overcurrent_wait()
71 ri->overcurrent_wait << CTRL_WT_BIT); in tps65090_reg_set_overcurrent_wait()
73 dev_err(&rdev->dev, "Error updating overcurrent wait %#x\n", in tps65090_reg_set_overcurrent_wait()
74 rdev->desc->enable_reg); in tps65090_reg_set_overcurrent_wait()
81 * tps65090_try_enable_fet - Try to enable a FET
85 * Return: 0 if ok, -ENOTRECOVERABLE if the FET power good bit did not get
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/Linux-v5.10/drivers/hid/
Dhid-roccat-koneplus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * and functionality and without the non-standard behaviours the Kone had.
22 #include <linux/hid-roccat.h>
23 #include "hid-ids.h"
24 #include "hid-roccat-common.h"
25 #include "hid-roccat-koneplus.h"
34 koneplus->actual_profile = new_profile; in koneplus_profile_activated()
40 struct roccat_common2_control control; in koneplus_send_control() local
45 return -EINVAL; in koneplus_send_control()
47 control.command = ROCCAT_COMMON_COMMAND_CONTROL; in koneplus_send_control()
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Dhid-roccat-kovaplus.c1 // SPDX-License-Identifier: GPL-2.0-or-later
20 #include <linux/hid-roccat.h>
21 #include "hid-ids.h"
22 #include "hid-roccat-common.h"
23 #include "hid-roccat-kovaplus.h"
37 if (new_profile_index >= ARRAY_SIZE(kovaplus->profile_settings)) in kovaplus_profile_activated()
39 kovaplus->actual_profile = new_profile_index; in kovaplus_profile_activated()
40 kovaplus->actual_cpi = kovaplus->profile_settings[new_profile_index].cpi_startup_level; in kovaplus_profile_activated()
41 kovaplus->actual_x_sensitivity = kovaplus->profile_settings[new_profile_index].sensitivity_x; in kovaplus_profile_activated()
42 kovaplus->actual_y_sensitivity = kovaplus->profile_settings[new_profile_index].sensitivity_y; in kovaplus_profile_activated()
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Dhid-roccat-pyra.c1 // SPDX-License-Identifier: GPL-2.0-or-later
22 #include <linux/hid-roccat.h>
23 #include "hid-ids.h"
24 #include "hid-roccat-common.h"
25 #include "hid-roccat-pyra.h"
35 if (new_profile >= ARRAY_SIZE(pyra->profile_settings)) in profile_activated()
37 pyra->actual_profile = new_profile; in profile_activated()
38 pyra->actual_cpi = pyra->profile_settings[pyra->actual_profile].y_cpi; in profile_activated()
44 struct roccat_common2_control control; in pyra_send_control() local
49 return -EINVAL; in pyra_send_control()
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Dhid-roccat-common.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include "hid-roccat-common.h"
29 return -ENOMEM; in roccat_common2_receive()
39 return ((len < 0) ? len : ((len != size) ? -EIO : 0)); in roccat_common2_receive()
51 return -ENOMEM; in roccat_common2_send()
60 return ((len < 0) ? len : ((len != size) ? -EIO : 0)); in roccat_common2_send()
75 struct roccat_common2_control control; in roccat_common2_receive_control_status() local
81 &control, sizeof(struct roccat_common2_control)); in roccat_common2_receive_control_status()
86 switch (control.value) { in roccat_common2_receive_control_status()
95 return -EINVAL; in roccat_common2_receive_control_status()
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/Linux-v5.10/drivers/clk/bcm/
Dclk-kona-setup.c18 #include "clk-kona.h"
21 #define selector_clear_exists(sel) ((sel)->width = 0)
28 struct ccu_policy *ccu_policy = &ccu->policy; in ccu_data_offsets_valid()
31 limit = ccu->range - sizeof(u32); in ccu_data_offsets_valid()
34 if (ccu_policy->enable.offset > limit) { in ccu_data_offsets_valid()
37 ccu->name, ccu_policy->enable.offset, limit); in ccu_data_offsets_valid()
40 if (ccu_policy->control.offset > limit) { in ccu_data_offsets_valid()
41 pr_err("%s: bad policy control offset for %s " in ccu_data_offsets_valid()
43 ccu->name, ccu_policy->control.offset, limit); in ccu_data_offsets_valid()
53 struct peri_clk_data *peri = bcm_clk->u.peri; in clk_requires_trigger()
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Dclk-kona.h24 #include <linux/clk-provider.h>
28 /* The common clock framework uses u8 to represent a parent index */
32 #define BAD_CLK_NAME ((const char *)-1)
41 #define FLAG_SET(obj, type, flag) ((obj)->flags |= FLAG(type, flag))
42 #define FLAG_CLEAR(obj, type, flag) ((obj)->flags &= ~(FLAG(type, flag)))
43 #define FLAG_FLIP(obj, type, flag) ((obj)->flags ^= FLAG(type, flag))
44 #define FLAG_TEST(obj, type, flag) (!!((obj)->flags & FLAG(type, flag)))
48 #define ccu_policy_exists(ccu_policy) ((ccu_policy)->enable.offset != 0)
52 #define policy_exists(policy) ((policy)->offset != 0)
63 #define hyst_exists(hyst) ((hyst)->offset != 0)
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/Linux-v5.10/drivers/staging/greybus/
Daudio_helper.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <sound/soc-dapm.h>
21 struct snd_soc_dai *dai = dai_w->priv; in gbaudio_dapm_link_dai_widget()
24 list_for_each_entry(w, &card->widgets, list) { in gbaudio_dapm_link_dai_widget()
25 if (w->dapm != dai_w->dapm) in gbaudio_dapm_link_dai_widget()
28 switch (w->id) { in gbaudio_dapm_link_dai_widget()
36 if (!w->sname || !strstr(w->sname, dai_w->sname)) in gbaudio_dapm_link_dai_widget()
41 * if (w->linked) in gbaudio_dapm_link_dai_widget()
45 if (dai_w->id == snd_soc_dapm_dai_in) { in gbaudio_dapm_link_dai_widget()
52 dev_dbg(dai->dev, "%s -> %s\n", src->name, sink->name); in gbaudio_dapm_link_dai_widget()
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/Linux-v5.10/Documentation/devicetree/bindings/clock/ti/
Dmux.txt3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped multiplexer with multiple input clock signals or
8 gate or adjust the parent rate via a divider or multiplier.
17 register value selected parent clock
24 "index-starts-at-one" modified the scheme as follows:
26 register value selected clock parent
31 The binding must provide the register to control the mux. Optionally
32 the number of bits to shift the control field in the register can be
36 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
39 - compatible : shall be "ti,mux-clock" or "ti,composite-mux-clock".
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/Linux-v5.10/drivers/mfd/
Dtc6393xb.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright(c) 2005-2006 Chris Humbert
37 #define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */
38 #define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */
39 #define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */
40 #define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */
41 #define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */
42 #define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */
43 #define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */
44 #define SCR_CCR 0x98 /* w Clock Control */
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/Linux-v5.10/drivers/irqchip/
Dirq-al-fic.c1 // SPDX-License-Identifier: GPL-2.0
50 u32 control = readl_relaxed(fic->base + AL_FIC_CONTROL); in al_fic_set_trigger() local
54 control &= ~CONTROL_TRIGGER_RISING; in al_fic_set_trigger()
57 control |= CONTROL_TRIGGER_RISING; in al_fic_set_trigger()
59 gc->chip_types->handler = handler; in al_fic_set_trigger()
60 fic->state = new_state; in al_fic_set_trigger()
61 writel_relaxed(control, fic->base + AL_FIC_CONTROL); in al_fic_set_trigger()
67 struct al_fic *fic = gc->private; in al_fic_irq_set_type()
76 ret = -EINVAL; in al_fic_irq_set_type()
92 if (fic->state == AL_FIC_UNCONFIGURED) { in al_fic_irq_set_type()
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/Linux-v5.10/include/media/
Dv4l2-ctrls.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
14 #include <media/media-request.h>
17 * Include the stateless codec compound control definitions.
20 #include <media/mpeg2-ctrls.h>
21 #include <media/fwht-ctrls.h>
22 #include <media/h264-ctrls.h>
23 #include <media/vp8-ctrls.h>
24 #include <media/hevc-ctrls.h>
39 * union v4l2_ctrl_ptr - A pointer to a control value.
40 * @p_s32: Pointer to a 32-bit signed value.
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/Linux-v5.10/drivers/soc/aspeed/
Daspeed-p2a-ctrl.c1 // SPDX-License-Identifier: GPL-2.0+
10 * Provides a simple driver to control the ASPEED P2A interface which allows
28 #include <linux/aspeed-p2a-ctrl.h>
30 #define DEVICE_NAME "aspeed-p2a-ctrl"
32 /* SCU2C is a Misc. Control Register. */
34 /* SCU180 is the PCIe Configuration Setting Control Register. */
74 struct aspeed_p2a_ctrl *parent; member
91 regmap_update_bits(p2a_ctrl->regmap, in aspeed_p2a_enable_bridge()
97 regmap_update_bits(p2a_ctrl->regmap, SCU180, SCU180_ENP2A, 0); in aspeed_p2a_disable_bridge()
104 struct aspeed_p2a_user *priv = file->private_data; in aspeed_p2a_mmap()
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