Lines Matching +full:control +full:- +full:parent

3 Binding status: Unstable - ABI compatibility may be broken in the future
6 register-mapped multiplexer with multiple input clock signals or
8 gate or adjust the parent rate via a divider or multiplier.
17 register value		selected parent clock
24 "index-starts-at-one" modified the scheme as follows:
26 register value		selected clock parent
31 The binding must provide the register to control the mux. Optionally
32 the number of bits to shift the control field in the register can be
36 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
39 - compatible : shall be "ti,mux-clock" or "ti,composite-mux-clock".
40 - #clock-cells : from common clock binding; shall be set to 0.
41 - clocks : link phandles of parent clocks
42 - reg : register offset for register controlling adjustable mux
45 - ti,bit-shift : number of bits to shift the bit-mask, defaults to
47 - ti,index-starts-at-one : valid input select programming starts at 1, not
49 - ti,set-rate-parent : clk_set_rate is propagated to parent clock,
50   not supported by the composite-mux-clock subtype
51 - ti,latch-bit : latch the mux value to HW, only needed if the register
58 	#clock-cells = <0>;
59 	compatible = "ti,mux-clock";
62 	ti,index-starts-at-one;
66 	#clock-cells = <0>;
67 	compatible = "ti,mux-clock";
69 	ti,bit-shift = <24>;
74 	#clock-cells = <0>;
75 	compatible = "ti,composite-mux-clock";
77 	ti,bit-shift = <4>;