Lines Matching +full:control +full:- +full:parent
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright(c) 2005-2006 Chris Humbert
37 #define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */
38 #define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */
39 #define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */
40 #define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */
41 #define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */
42 #define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */
43 #define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */
44 #define SCR_CCR 0x98 /* w Clock Control */
45 #define SCR_PLL2CR 0x9a /* w PLL2 Control */
46 #define SCR_PLL1CR 0x9c /* l PLL1 Control */
47 #define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */
48 #define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */
50 #define SCR_MCR 0xe4 /* w Mode Control */
51 #define SCR_CONFIG 0xfc /* b Configuration Control */
82 /* bits 8 - 16 are unknown */
86 /*--------------------------------------------------------------------------*/
118 /*--------------------------------------------------------------------------*/
122 struct tc6393xb *tc6393xb = dev_get_drvdata(nand->dev.parent); in tc6393xb_nand_enable()
125 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_nand_enable()
128 dev_dbg(nand->dev.parent, "SMD buffer on\n"); in tc6393xb_nand_enable()
129 tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1)); in tc6393xb_nand_enable()
131 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_nand_enable()
220 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_ohci_enable()
225 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_ohci_enable()
227 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
229 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_enable()
231 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
233 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_enable()
235 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_ohci_enable()
242 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_ohci_disable()
247 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_ohci_disable()
249 fer = tmio_ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
251 tmio_iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_ohci_disable()
253 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
255 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_ohci_disable()
257 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_ohci_disable()
264 struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent); in tc6393xb_ohci_suspend()
267 if (tcpd->resume_restore) in tc6393xb_ohci_suspend()
268 return -EBUSY; in tc6393xb_ohci_suspend()
275 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_fb_enable()
279 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_fb_enable()
281 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_fb_enable()
284 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_fb_enable()
286 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_fb_enable()
293 struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent); in tc6393xb_fb_disable()
297 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_fb_disable()
299 ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_fb_disable()
302 tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_fb_disable()
304 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_fb_disable()
311 struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); in tc6393xb_lcd_set_power()
315 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_lcd_set_power()
317 fer = ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_lcd_set_power()
322 iowrite8(fer, tc6393xb->scr + SCR_FER); in tc6393xb_lcd_set_power()
324 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_lcd_set_power()
332 struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent); in tc6393xb_lcd_mode()
335 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_lcd_mode()
337 iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0); in tc6393xb_lcd_mode()
338 iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2); in tc6393xb_lcd_mode()
340 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_lcd_mode()
348 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_enable()
350 tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0, in tc6393xb_mmc_enable()
358 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_resume()
360 tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0, in tc6393xb_mmc_resume()
368 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_pwr()
370 tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state); in tc6393xb_mmc_pwr()
375 struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent); in tc6393xb_mmc_clk_div()
377 tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state); in tc6393xb_mmc_clk_div()
388 .name = "tmio-nand",
394 .name = "tmio-mmc",
403 .name = "tmio-ohci",
412 .name = "tmio-fb",
422 /*--------------------------------------------------------------------------*/
430 return !!(tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)) in tc6393xb_gpio_get()
440 dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8)); in __tc6393xb_gpio_set()
446 tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8)); in __tc6393xb_gpio_set()
455 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_set()
459 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_set()
469 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_input()
471 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_input()
473 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_input()
475 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_input()
487 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_output()
491 doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_output()
493 tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8)); in tc6393xb_gpio_direction_output()
495 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_gpio_direction_output()
502 tc6393xb->gpio.label = "tc6393xb"; in tc6393xb_register_gpio()
503 tc6393xb->gpio.base = gpio_base; in tc6393xb_register_gpio()
504 tc6393xb->gpio.ngpio = 16; in tc6393xb_register_gpio()
505 tc6393xb->gpio.set = tc6393xb_gpio_set; in tc6393xb_register_gpio()
506 tc6393xb->gpio.get = tc6393xb_gpio_get; in tc6393xb_register_gpio()
507 tc6393xb->gpio.direction_input = tc6393xb_gpio_direction_input; in tc6393xb_register_gpio()
508 tc6393xb->gpio.direction_output = tc6393xb_gpio_direction_output; in tc6393xb_register_gpio()
510 return gpiochip_add_data(&tc6393xb->gpio, tc6393xb); in tc6393xb_register_gpio()
513 /*--------------------------------------------------------------------------*/
521 irq_base = tc6393xb->irq_base; in tc6393xb_irq()
523 while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) & in tc6393xb_irq()
524 ~tmio_ioread8(tc6393xb->scr + SCR_IMR))) in tc6393xb_irq()
541 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_irq_mask()
542 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
543 imr |= 1 << (data->irq - tc6393xb->irq_base); in tc6393xb_irq_mask()
544 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_mask()
545 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_irq_mask()
554 raw_spin_lock_irqsave(&tc6393xb->lock, flags); in tc6393xb_irq_unmask()
555 imr = tmio_ioread8(tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
556 imr &= ~(1 << (data->irq - tc6393xb->irq_base)); in tc6393xb_irq_unmask()
557 tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR); in tc6393xb_irq_unmask()
558 raw_spin_unlock_irqrestore(&tc6393xb->lock, flags); in tc6393xb_irq_unmask()
573 irq_base = tc6393xb->irq_base; in tc6393xb_attach_irq()
581 irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING); in tc6393xb_attach_irq()
582 irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq, in tc6393xb_attach_irq()
591 irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL); in tc6393xb_detach_irq()
593 irq_base = tc6393xb->irq_base; in tc6393xb_detach_irq()
602 /*--------------------------------------------------------------------------*/
606 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_probe()
613 return -EINVAL; in tc6393xb_probe()
617 ret = -ENOMEM; in tc6393xb_probe()
621 raw_spin_lock_init(&tc6393xb->lock); in tc6393xb_probe()
627 tc6393xb->irq = ret; in tc6393xb_probe()
631 tc6393xb->iomem = iomem; in tc6393xb_probe()
632 tc6393xb->irq_base = tcpd->irq_base; in tc6393xb_probe()
634 tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI"); in tc6393xb_probe()
635 if (IS_ERR(tc6393xb->clk)) { in tc6393xb_probe()
636 ret = PTR_ERR(tc6393xb->clk); in tc6393xb_probe()
640 rscr = &tc6393xb->rscr; in tc6393xb_probe()
641 rscr->name = "tc6393xb-core"; in tc6393xb_probe()
642 rscr->start = iomem->start; in tc6393xb_probe()
643 rscr->end = iomem->start + 0xff; in tc6393xb_probe()
644 rscr->flags = IORESOURCE_MEM; in tc6393xb_probe()
650 tc6393xb->scr = ioremap(rscr->start, resource_size(rscr)); in tc6393xb_probe()
651 if (!tc6393xb->scr) { in tc6393xb_probe()
652 ret = -ENOMEM; in tc6393xb_probe()
656 ret = clk_prepare_enable(tc6393xb->clk); in tc6393xb_probe()
660 ret = tcpd->enable(dev); in tc6393xb_probe()
664 iowrite8(0, tc6393xb->scr + SCR_FER); in tc6393xb_probe()
665 iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); in tc6393xb_probe()
667 tc6393xb->scr + SCR_CCR); in tc6393xb_probe()
670 BIT(15), tc6393xb->scr + SCR_MCR); in tc6393xb_probe()
671 iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); in tc6393xb_probe()
672 iowrite8(0, tc6393xb->scr + SCR_IRR); in tc6393xb_probe()
673 iowrite8(0xbf, tc6393xb->scr + SCR_IMR); in tc6393xb_probe()
676 tmio_ioread8(tc6393xb->scr + SCR_REVID), in tc6393xb_probe()
677 (unsigned long) iomem->start, tc6393xb->irq); in tc6393xb_probe()
679 tc6393xb->gpio.base = -1; in tc6393xb_probe()
681 if (tcpd->gpio_base >= 0) { in tc6393xb_probe()
682 ret = tc6393xb_register_gpio(tc6393xb, tcpd->gpio_base); in tc6393xb_probe()
689 if (tcpd->setup) { in tc6393xb_probe()
690 ret = tcpd->setup(dev); in tc6393xb_probe()
695 tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data; in tc6393xb_probe()
697 sizeof(*tcpd->nand_data); in tc6393xb_probe()
698 tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data; in tc6393xb_probe()
699 tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data); in tc6393xb_probe()
701 ret = mfd_add_devices(&dev->dev, dev->id, in tc6393xb_probe()
703 iomem, tcpd->irq_base, NULL); in tc6393xb_probe()
708 if (tcpd->teardown) in tc6393xb_probe()
709 tcpd->teardown(dev); in tc6393xb_probe()
715 if (tc6393xb->gpio.base != -1) in tc6393xb_probe()
716 gpiochip_remove(&tc6393xb->gpio); in tc6393xb_probe()
717 tcpd->disable(dev); in tc6393xb_probe()
719 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_probe()
721 iounmap(tc6393xb->scr); in tc6393xb_probe()
723 release_resource(&tc6393xb->rscr); in tc6393xb_probe()
725 clk_put(tc6393xb->clk); in tc6393xb_probe()
735 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_remove()
739 mfd_remove_devices(&dev->dev); in tc6393xb_remove()
741 if (tcpd->teardown) in tc6393xb_remove()
742 tcpd->teardown(dev); in tc6393xb_remove()
746 if (tc6393xb->gpio.base != -1) in tc6393xb_remove()
747 gpiochip_remove(&tc6393xb->gpio); in tc6393xb_remove()
749 ret = tcpd->disable(dev); in tc6393xb_remove()
750 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_remove()
751 iounmap(tc6393xb->scr); in tc6393xb_remove()
752 release_resource(&tc6393xb->rscr); in tc6393xb_remove()
753 clk_put(tc6393xb->clk); in tc6393xb_remove()
762 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_suspend()
766 tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR); in tc6393xb_suspend()
767 tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER); in tc6393xb_suspend()
770 tc6393xb->suspend_state.gpo_dsr[i] = in tc6393xb_suspend()
771 ioread8(tc6393xb->scr + SCR_GPO_DSR(i)); in tc6393xb_suspend()
772 tc6393xb->suspend_state.gpo_doecr[i] = in tc6393xb_suspend()
773 ioread8(tc6393xb->scr + SCR_GPO_DOECR(i)); in tc6393xb_suspend()
774 tc6393xb->suspend_state.gpi_bcr[i] = in tc6393xb_suspend()
775 ioread8(tc6393xb->scr + SCR_GPI_BCR(i)); in tc6393xb_suspend()
777 ret = tcpd->suspend(dev); in tc6393xb_suspend()
778 clk_disable_unprepare(tc6393xb->clk); in tc6393xb_suspend()
785 struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev); in tc6393xb_resume()
790 ret = clk_prepare_enable(tc6393xb->clk); in tc6393xb_resume()
794 ret = tcpd->resume(dev); in tc6393xb_resume()
798 if (!tcpd->resume_restore) in tc6393xb_resume()
801 iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER); in tc6393xb_resume()
802 iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR); in tc6393xb_resume()
803 iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR); in tc6393xb_resume()
806 BIT(15), tc6393xb->scr + SCR_MCR); in tc6393xb_resume()
807 iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER); in tc6393xb_resume()
808 iowrite8(0, tc6393xb->scr + SCR_IRR); in tc6393xb_resume()
809 iowrite8(0xbf, tc6393xb->scr + SCR_IMR); in tc6393xb_resume()
812 iowrite8(tc6393xb->suspend_state.gpo_dsr[i], in tc6393xb_resume()
813 tc6393xb->scr + SCR_GPO_DSR(i)); in tc6393xb_resume()
814 iowrite8(tc6393xb->suspend_state.gpo_doecr[i], in tc6393xb_resume()
815 tc6393xb->scr + SCR_GPO_DOECR(i)); in tc6393xb_resume()
816 iowrite8(tc6393xb->suspend_state.gpi_bcr[i], in tc6393xb_resume()
817 tc6393xb->scr + SCR_GPI_BCR(i)); in tc6393xb_resume()