| /Linux-v6.1/Documentation/devicetree/bindings/regmap/ |
| D | regmap.txt | 5 little-endian,
6 big-endian,
7 native-endian: See common-properties.txt for a definition
10 Regmap defaults to little-endian register access on MMIO based
12 architectures that typically run big-endian operating systems
13 (e.g. PowerPC), registers can be defined as big-endian and must
16 On SoCs that can be operated in both big-endian and little-endian
19 chips), "native-endian" is used to allow using the same device tree
23 Scenario 1 : a register set in big-endian mode.
27 big-endian;
|
| /Linux-v6.1/Documentation/devicetree/bindings/phy/ |
| D | lantiq,vrx200-pcie-phy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 "#phy-cells":
15 description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>
19 - lantiq,vrx200-pcie-phy
20 - lantiq,arx300-pcie-phy
27 - description: PHY module clock
[all …]
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| /Linux-v6.1/drivers/usb/host/ |
| D | ehci-fsl.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Copyright (C) 2005-2010,2012 Freescale Semiconductor, Inc.
8 /* offsets for the non-ehci registers in the FSL SOC USB controller */
22 #define USBMODE_ES (1 << 2) /* (Big) Endian Select */
31 #define FSL_SOC_USB_SNOOP1 0x400 /* NOTE: big-endian */
32 #define FSL_SOC_USB_SNOOP2 0x404 /* NOTE: big-endian */
33 #define FSL_SOC_USB_AGECNTTHRSH 0x408 /* NOTE: big-endian */
34 #define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
35 #define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
36 #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
|
| /Linux-v6.1/Documentation/devicetree/bindings/usb/ |
| D | generic-ohci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ohci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: "usb-hcd.yaml"
13 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
18 - items:
19 - enum:
20 - allwinner,sun4i-a10-ohci
21 - allwinner,sun50i-a64-ohci
[all …]
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| D | generic-ehci.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/generic-ehci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
13 - $ref: "usb-hcd.yaml"
14 - if:
19 const: ibm,usb-ehci-440epx
28 - items:
29 - enum:
[all …]
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| /Linux-v6.1/drivers/crypto/cavium/cpt/ |
| D | cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
30 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
42 * Address must be 16-byte aligned.
44 * sign-extended bit <48> for forward compatibility.
46 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
48 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
56 * work-queue entry that CPT submits work to SSO after all context,
60 * use a sign-extended bit <48> for forward compatibility.
76 #if defined(__BIG_ENDIAN_BITFIELD) /* Word 0 - Big Endian */
80 #else /* Word 0 - Little Endian */
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| /Linux-v6.1/Documentation/devicetree/bindings/ |
| D | common-properties.txt | 5 ----------
13 - big-endian: Boolean; force big endian register accesses
15 know the peripheral always needs to be accessed in big endian (BE) mode.
16 - little-endian: Boolean; force little endian register accesses
18 peripheral always needs to be accessed in little endian (LE) mode.
19 - native-endian: Boolean; always use register accesses matched to the
20 endianness of the kernel binary (e.g. LE vmlinux -> readl/writel,
21 BE vmlinux -> ioread32be/iowrite32be). In this case no byte swaps
22 will ever be performed. Use this if the hardware "self-adjusts"
27 In such cases, little-endian is the preferred default, but it is not
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mux-reg.txt | 1 Register-based I2C Bus Mux
7 - compatible: i2c-mux-reg
8 - i2c-parent: The phandle of the I2C bus that this multiplexer's master-side
10 * Standard I2C mux properties. See i2c-mux.yaml in this directory.
11 * I2C child bus nodes. See i2c-mux.yaml in this directory.
14 - reg: this pair of <offset size> specifies the register to control the mux.
15 The <offset size> depends on its parent node. It can be any memory-mapped
18 - little-endian: The existence indicates the register is in little endian.
19 - big-endian: The existence indicates the register is in big endian.
20 If both little-endian and big-endian are omitted, the endianness of the
[all …]
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| /Linux-v6.1/drivers/crypto/marvell/octeontx/ |
| D | otx_cpt_hw_types.h | 1 /* SPDX-License-Identifier: GPL-2.0
154 * CPT OcteonTX VF MSI-X Vector Enumeration
155 * Enumerates the MSI-X interrupt vectors.
167 * stored in memory as little-endian unless CPT()_PF_Q()_CTL[INST_BE] is set.
179 * Address must be 16-byte aligned.
181 * sign-extended bit <48> for forward compatibility.
183 * grp:10 [171:162] If [WQ_PTR] is nonzero, the SSO guest-group to use when
185 * For the SSO to not discard the add-work request, FPA_PF_MAP() must map
193 * work-queue entry that CPT submits work to SSO after all context,
197 * use a sign-extended bit <48> for forward compatibility.
[all …]
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
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| /Linux-v6.1/arch/arm/include/asm/ |
| D | bitops.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
6 * Big endian support: Copyright 2001, Nicolas Pitre
34 * First, the atomic bitops. These use native endian.
123 #include <asm-generic/bitops/non-atomic.h>
126 * A note about Endian-ness.
127 * -------------------------
129 * When the ARM is put into big endian mode via CR15, the processor
132 * ------------ physical data bus bits -----------
135 * big byte 0 byte 1 byte 2 byte 3
137 * This means that reading a 32-bit word at address 0 returns the same
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| /Linux-v6.1/Documentation/devicetree/bindings/sound/ |
| D | fsl,spdif.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
20 - fsl,imx35-spdif
21 - fsl,vf610-spdif
22 - fsl,imx6sx-spdif
23 - fsl,imx8qm-spdif
24 - fsl,imx8qxp-spdif
25 - fsl,imx8mq-spdif
[all …]
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| D | fsl,esai.txt | 3 The Enhanced Serial Audio Interface (ESAI) provides a full-duplex serial port
10 - compatible : Compatible list, should contain one of the following
12 "fsl,imx35-esai",
13 "fsl,vf610-esai",
14 "fsl,imx6ull-esai",
15 "fsl,imx8qm-esai",
17 - reg : Offset and length of the register set for the device.
19 - interrupts : Contains the spdif interrupt.
21 - dmas : Generic dma devicetree binding as described in
24 - dma-names : Two dmas have to be defined, "tx" and "rx".
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| /Linux-v6.1/tools/lib/traceevent/ |
| D | event-parse-api.c | 1 // SPDX-License-Identifier: LGPL-2.1
7 #include "event-parse.h"
8 #include "event-parse-local.h"
9 #include "event-utils.h"
12 * tep_get_event - returns the event with the given index
21 if (tep && tep->events && index < tep->nr_events) in tep_get_event()
22 return tep->events[index]; in tep_get_event()
28 * tep_get_first_event - returns the first event in the events array
40 * tep_get_events_count - get the number of defined events
49 return tep->nr_events; in tep_get_events_count()
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|
| /Linux-v6.1/Documentation/devicetree/bindings/timer/ |
| D | fsl,ftm-timer.txt | 5 - compatible : should be "fsl,ftm-timer"
6 - reg : Specifies base physical address and size of the register sets for the
8 - interrupts : Should be the clock event device interrupt.
9 - clocks : The clocks provided by the SoC to drive the timer, must contain an
10 entry for each entry in clock-names.
11 - clock-names : Must include the following entries:
12 o "ftm-evt"
13 o "ftm-src"
14 o "ftm-evt-counter-en"
15 o "ftm-src-counter-en"
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/counter/ |
| D | ftm-quaddec.txt | 6 - compatible: Must be "fsl,ftm-quaddec".
7 - reg: Must be set to the memory region of the flextimer.
10 - big-endian: Access the device registers in big-endian mode.
14 compatible = "fsl,ftm-quaddec";
16 big-endian;
|
| /Linux-v6.1/arch/arm/boot/compressed/ |
| D | big-endian.S | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * linux/arch/arm/boot/compressed/big-endian.S
5 * Switch CPU into big endian mode.
12 orr r0, r0, #(1 << 7) @ enable big endian mode
|
| /Linux-v6.1/Documentation/devicetree/bindings/display/ |
| D | sm501fb.txt | 7 - compatible : should be "smi,sm501".
8 - reg : contain two entries:
9 - First entry: System Configuration register
10 - Second entry: IO space (Display Controller register)
11 - interrupts : SMI interrupt to the cpu should be described here.
14 - mode : select a video mode:
15 <xres>x<yres>[-<bpp>][@<refresh>]
16 - edid : verbatim EDID data block describing attached display.
19 - little-endian: available on big endian systems, to
20 set different foreign endian.
[all …]
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| D | fsl,dcu.txt | 4 - compatible: Should be one of
5 * "fsl,ls1021a-dcu".
6 * "fsl,vf610-dcu".
8 - reg: Address and length of the register set for dcu.
9 - clocks: Handle to "dcu" and "pix" clock (in the order below)
11 See ../clocks/clock-bindings.txt for details.
12 - clock-names: Should be "dcu" and "pix"
13 See ../clocks/clock-bindings.txt for details.
14 - big-endian Boolean property, LS1021A DCU registers are big-endian.
15 - port Video port for the panel output
[all …]
|
| /Linux-v6.1/Documentation/devicetree/bindings/pwm/ |
| D | pwm-fsl-ftm.txt | 8 SoC | FTM-PWM endianness
9 --------+-------------------
14 Please see ../regmap/regmap.txt for more detail about how to specify endian
19 - compatible : should be "fsl,<soc>-ftm-pwm" and one of the following
21 - "fsl,vf610-ftm-pwm" for PWM compatible with the one integrated on VF610
22 - "fsl,imx8qm-ftm-pwm" for PWM compatible with the one integrated on i.MX8QM
23 - reg: Physical base address and length of the controller's registers
24 - #pwm-cells: Should be 3. See pwm.yaml in this directory for a description of
26 - clock-names: Should include the following module clock source entries:
31 - clocks: Must contain a phandle and clock specifier for each entry in
[all …]
|
| /Linux-v6.1/drivers/mtd/nand/raw/brcmnand/ |
| D | brcmnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 /* Special register offset constant to intercept a non-MMIO access
38 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_prepare()
39 soc->prepare_data_bus(soc, true, is_param); in brcmnand_soc_data_bus_prepare()
45 if (soc && soc->prepare_data_bus) in brcmnand_soc_data_bus_unprepare()
46 soc->prepare_data_bus(soc, false, is_param); in brcmnand_soc_data_bus_unprepare()
53 * bus endianness (i.e., big-endian CPU + big endian bus ==> native in brcmnand_readl()
54 * endian I/O). in brcmnand_readl()
56 * Other architectures (e.g., ARM) either do not support big endian, or in brcmnand_readl()
57 * else leave I/O in little endian mode. in brcmnand_readl()
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| /Linux-v6.1/tools/lib/traceevent/Documentation/ |
| D | libtraceevent-host_endian.txt | 5 ----
6 tep_is_bigendian, tep_is_local_bigendian, tep_set_local_bigendian - Get / set
10 --------
12 --
13 *#include <event-parse.h>*
23 --
26 -----------
40 --
41 _TEP_LITTLE_ENDIAN_ - the machine is little endian,
42 _TEP_BIG_ENDIAN_ - the machine is big endian.
[all …]
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| /Linux-v6.1/include/crypto/ |
| D | gf128mul.h | 1 /* gf128mul.h - GF(2^128) multiplication functions
16 ---------------------------------------------------------------------------
43 ---------------------------------------------------------------------------
59 * http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-revised-spec.pdf
61 * The elements of GF(2^128) := GF(2)[X]/(X^128-X^7-X^2-X^1-1) can
73 * in every byte in little-endian order and the bytes themselves also in
74 * little endian order. I will call this lle (little-little-endian).
81 * bytes also. This is bbe (big-big-endian). Now the buffer above
86 * Both of the above formats are easy to implement on big-endian
90 * format (bits are stored in big endian order and the bytes in little
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| /Linux-v6.1/Documentation/devicetree/bindings/rtc/ |
| D | rtc-fsl-ftm-alarm.txt | 4 - compatible : Should be "fsl,<chip>-ftm-alarm", the
6 "fsl,ls1012a-ftm-alarm"
7 "fsl,ls1021a-ftm-alarm"
8 "fsl,ls1028a-ftm-alarm"
9 "fsl,ls1043a-ftm-alarm"
10 "fsl,ls1046a-ftm-alarm"
11 "fsl,ls1088a-ftm-alarm"
12 "fsl,ls208xa-ftm-alarm"
13 "fsl,lx2160a-ftm-alarm"
14 - reg : Specifies base physical address and size of the register sets for the
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
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