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/Linux-v5.10/drivers/i2c/busses/
DMakefile3 # Makefile for the i2c bus drivers.
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
11 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
12 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
13 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
14 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
15 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
16 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
17 obj-$(CONFIG_I2C_I801) += i2c-i801.o
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Di2c-pxa.c5 * I2C adapter for the PXA I2C bus access.
24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
37 /* I2C register field definitions */
111 * 8 ITEIE 1 (Enables the I2C unit to interrupt when transmit buffer empty)
112 * 7 GCD 1 (Disables i2c unit response to general call messages as a slave)
114 * 5 SCLE 1 (Enables the i2c clock output for master mode (drives SCL)
123 /* I2C status register init values
154 /* I2C register layout definitions */
206 { .compatible = "mrvl,pxa-i2c", .data = (void *)REGS_PXA2XX },
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Di2c-digicolor.c3 * I2C bus driver for Conexant Digicolor SoCs
13 #include <linux/i2c.h>
71 static void dc_i2c_cmd(struct dc_i2c *i2c, u8 cmd) in dc_i2c_cmd() argument
73 writeb_relaxed(cmd | II_COMMAND_GO, i2c->regs + II_COMMAND); in dc_i2c_cmd()
86 static void dc_i2c_data(struct dc_i2c *i2c, u8 data) in dc_i2c_data() argument
88 writeb_relaxed(data, i2c->regs + II_DATA); in dc_i2c_data()
91 static void dc_i2c_write_byte(struct dc_i2c *i2c, u8 byte) in dc_i2c_write_byte() argument
93 dc_i2c_data(i2c, byte); in dc_i2c_write_byte()
94 dc_i2c_cmd(i2c, II_CMD_SEND_ACK); in dc_i2c_write_byte()
97 static void dc_i2c_write_buf(struct dc_i2c *i2c) in dc_i2c_write_buf() argument
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Di2c-ocores.c3 * i2c-ocores.c: I2C bus driver for OpenCores I2C controller
4 * (https://opencores.org/project/i2c/overview)
19 #include <linux/i2c.h>
22 #include <linux/platform_data/i2c-ocores.h>
49 void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value);
50 u8 (*getreg)(struct ocores_i2c *i2c, int reg);
90 static void oc_setreg_8(struct ocores_i2c *i2c, int reg, u8 value) in oc_setreg_8() argument
92 iowrite8(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_8()
95 static void oc_setreg_16(struct ocores_i2c *i2c, int reg, u8 value) in oc_setreg_16() argument
97 iowrite16(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16()
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Di2c-zx2967.c10 #include <linux/i2c.h>
53 #define DEV(i2c) ((i2c)->adap.dev.parent) argument
69 static void zx2967_i2c_writel(struct zx2967_i2c *i2c, in zx2967_i2c_writel() argument
72 writel_relaxed(val, i2c->reg_base + reg); in zx2967_i2c_writel()
75 static u32 zx2967_i2c_readl(struct zx2967_i2c *i2c, unsigned long reg) in zx2967_i2c_readl() argument
77 return readl_relaxed(i2c->reg_base + reg); in zx2967_i2c_readl()
80 static void zx2967_i2c_writesb(struct zx2967_i2c *i2c, in zx2967_i2c_writesb() argument
83 writesb(i2c->reg_base + reg, data, len); in zx2967_i2c_writesb()
86 static void zx2967_i2c_readsb(struct zx2967_i2c *i2c, in zx2967_i2c_readsb() argument
89 readsb(i2c->reg_base + reg, data, len); in zx2967_i2c_readsb()
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Di2c-jz4780.c3 * Ingenic JZ4780 I2C bus driver
15 #include <linux/i2c.h>
171 static inline unsigned short jz4780_i2c_readw(struct jz4780_i2c *i2c, in jz4780_i2c_readw() argument
174 return readw(i2c->iomem + offset); in jz4780_i2c_readw()
177 static inline void jz4780_i2c_writew(struct jz4780_i2c *i2c, in jz4780_i2c_writew() argument
180 writew(val, i2c->iomem + offset); in jz4780_i2c_writew()
183 static int jz4780_i2c_disable(struct jz4780_i2c *i2c) in jz4780_i2c_disable() argument
188 jz4780_i2c_writew(i2c, JZ4780_I2C_ENB, 0); in jz4780_i2c_disable()
191 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); in jz4780_i2c_disable()
198 dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval); in jz4780_i2c_disable()
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Di2c-s3c2410.c2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
7 * S3C2410 I2C Controller
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
86 /* i2c controller state */
127 .name = "s3c2410-i2c",
130 .name = "s3c2440-i2c",
133 .name = "s3c2440-hdmiphy-i2c",
139 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
143 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
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Di2c-xiic.c3 * i2c-xiic.c
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
48 * struct xiic_i2c - Internal representation of the XIIC I2C bus
170 #define xiic_tx_space(i2c) ((i2c)->tx_msg->len - (i2c)->tx_pos) argument
171 #define xiic_rx_space(i2c) ((i2c)->rx_msg->len - (i2c)->rx_pos) argument
173 static int xiic_start_xfer(struct xiic_i2c *i2c);
174 static void __xiic_start_xfer(struct xiic_i2c *i2c);
184 static inline void xiic_setreg8(struct xiic_i2c *i2c, int reg, u8 value) in xiic_setreg8() argument
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Di2c-meson.c3 * I2C bus driver for Amlogic Meson SoCs
11 #include <linux/i2c.h>
22 /* Meson I2C register map */
70 * struct meson_i2c - Meson I2C device private data
72 * @adap: I2C adapter instance
76 * @msg: Pointer to the current I2C message
109 static void meson_i2c_set_mask(struct meson_i2c *i2c, int reg, u32 mask, in meson_i2c_set_mask() argument
114 data = readl(i2c->regs + reg); in meson_i2c_set_mask()
117 writel(data, i2c->regs + reg); in meson_i2c_set_mask()
120 static void meson_i2c_reset_tokens(struct meson_i2c *i2c) in meson_i2c_reset_tokens() argument
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Di2c-lpc2k.c5 * Code portions referenced from the i2x-pxa and i2c-pnx drivers
17 #include <linux/i2c.h>
47 /* I2C SCL clock has different duty cycle depending on mode */
53 * 26 possible I2C status codes, but codes applicable only
84 static void i2c_lpc2k_reset(struct lpc2k_i2c *i2c) in i2c_lpc2k_reset() argument
87 writel(LPC24XX_CLEAR_ALL, i2c->base + LPC24XX_I2CONCLR); in i2c_lpc2k_reset()
88 writel(0, i2c->base + LPC24XX_I2ADDR); in i2c_lpc2k_reset()
89 writel(LPC24XX_I2EN, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_reset()
92 static int i2c_lpc2k_clear_arb(struct lpc2k_i2c *i2c) in i2c_lpc2k_clear_arb() argument
100 writel(LPC24XX_STO, i2c->base + LPC24XX_I2CONSET); in i2c_lpc2k_clear_arb()
[all …]
Di2c-img-scb.c3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
30 * specified, and the hardware takes care of the I2C state machine,
31 * using a FIFO to send/receive bytes of data to an I2C slave. The
36 * with control of repeated start bits between I2C messages.
40 * no wasted time between I2C symbols or I2C messages.
[all …]
Di2c-synquacer.c12 #include <linux/i2c.h>
25 /* I2C register address definitions */
35 /* I2C register bit definitions */
113 /* min I2C clock frequency 14M */
115 /* max I2C clock frequency 200M */
117 /* I2C clock frequency 18M */
149 static inline int is_lastmsg(struct synquacer_i2c *i2c) in is_lastmsg() argument
151 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
154 static inline int is_msglast(struct synquacer_i2c *i2c) in is_msglast() argument
156 return i2c->msg_ptr == (i2c->msg->len - 1); in is_msglast()
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Di2c-mt65xx.c14 #include <linux/i2c.h>
77 #define I2C_DRV_NAME "i2c-mt65xx"
227 struct i2c_adapter adap; /* i2c host adapter */
231 /* set in i2c probe */
232 void __iomem *base; /* i2c base addr */
234 struct clk *clk_main; /* main clock for i2c bus */
235 struct clk *clk_dma; /* DMA clock for i2c via DMA */
236 struct clk *clk_pmic; /* PMIC clock for i2c from PMIC */
237 struct clk *clk_arb; /* Arbitrator clock for i2c */
238 bool have_pmic; /* can use i2c pins from PMIC */
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Di2c-exynos5.c3 * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
11 #include <linux/i2c.h>
200 /* Version of HS-I2C Hardware */
207 * @hw: the hardware variant of Exynos I2C controller
250 static void exynos5_i2c_clr_pend_irq(struct exynos5_i2c *i2c) in exynos5_i2c_clr_pend_irq() argument
252 writel(readl(i2c->regs + HSI2C_INT_STATUS), in exynos5_i2c_clr_pend_irq()
253 i2c->regs + HSI2C_INT_STATUS); in exynos5_i2c_clr_pend_irq()
266 static int exynos5_i2c_set_timing(struct exynos5_i2c *i2c, bool hs_timings) in exynos5_i2c_set_timing() argument
278 unsigned int clkin = clk_get_rate(i2c->clk); in exynos5_i2c_set_timing()
279 unsigned int op_clk = hs_timings ? i2c->op_clock : in exynos5_i2c_set_timing()
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Di2c-thunderx-pcidrv.c2 * Cavium ThunderX i2c driver.
16 #include <linux/i2c.h>
17 #include <linux/i2c-smbus.h>
24 #include "i2c-octeon-core.h"
26 #define DRV_NAME "i2c-thunderx"
40 static void thunder_i2c_int_enable(struct octeon_i2c *i2c) in thunder_i2c_int_enable() argument
43 i2c->twsi_base + TWSI_INT_ENA_W1S); in thunder_i2c_int_enable()
49 static void thunder_i2c_int_disable(struct octeon_i2c *i2c) in thunder_i2c_int_disable() argument
52 i2c->twsi_base + TWSI_INT_ENA_W1C); in thunder_i2c_int_disable()
55 static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c) in thunder_i2c_hlc_int_enable() argument
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Di2c-pca-platform.c5 * Platform driver for the PCA9564 I2C controller.
17 #include <linux/i2c.h>
20 #include <linux/i2c-algo-pca.h>
21 #include <linux/platform_data/i2c-pca-platform.h>
44 struct i2c_pca_pf_data *i2c = pd; in i2c_pca_pf_readbyte8() local
45 return ioread8(i2c->reg_base + reg); in i2c_pca_pf_readbyte8()
50 struct i2c_pca_pf_data *i2c = pd; in i2c_pca_pf_readbyte16() local
51 return ioread8(i2c->reg_base + reg * 2); in i2c_pca_pf_readbyte16()
56 struct i2c_pca_pf_data *i2c = pd; in i2c_pca_pf_readbyte32() local
57 return ioread8(i2c->reg_base + reg * 4); in i2c_pca_pf_readbyte32()
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DKconfig6 menu "I2C Hardware Bus support"
22 will be called i2c-ali1535.
34 will be called i2c-ali1563.
41 Acer Labs Inc. (ALI) M1514 and M1543 motherboard I2C interfaces.
44 will be called i2c-ali15x3.
51 756/766/768 mainboard I2C interfaces. The driver also includes
52 support for the first (SMBus 1.0) I2C interface of the AMD 8111 and
53 the nVidia nForce I2C interface.
56 will be called i2c-amd756.
69 will be called i2c-amd756-s4882.
[all …]
Di2c-octeon-platdrv.c7 * This is a driver for the i2c adapter in Cavium Networks' OCTEON processors.
16 #include <linux/i2c.h>
27 #include "i2c-octeon-core.h"
29 #define DRV_NAME "i2c-octeon"
33 * @i2c: The struct octeon_i2c
38 static void octeon_i2c_int_enable(struct octeon_i2c *i2c) in octeon_i2c_int_enable() argument
40 octeon_i2c_write_int(i2c, TWSI_INT_CORE_EN); in octeon_i2c_int_enable()
44 static void octeon_i2c_int_disable(struct octeon_i2c *i2c) in octeon_i2c_int_disable() argument
47 octeon_i2c_write_int(i2c, 0); in octeon_i2c_int_disable()
52 * @i2c: The struct octeon_i2c
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Di2c-octeon-core.c7 * This file contains the shared part of the driver for the i2c adapter in
16 #include <linux/i2c.h>
21 #include "i2c-octeon-core.h"
26 struct octeon_i2c *i2c = dev_id; in octeon_i2c_isr() local
28 i2c->int_disable(i2c); in octeon_i2c_isr()
29 wake_up(&i2c->queue); in octeon_i2c_isr()
34 static bool octeon_i2c_test_iflg(struct octeon_i2c *i2c) in octeon_i2c_test_iflg() argument
36 return (octeon_i2c_ctl_read(i2c) & TWSI_CTL_IFLG); in octeon_i2c_test_iflg()
41 * @i2c: The struct octeon_i2c
45 static int octeon_i2c_wait(struct octeon_i2c *i2c) in octeon_i2c_wait() argument
[all …]
Di2c-rk3x.c3 * Driver for I2C adapter in Rockchip RK3xxx SoC
11 #include <linux/i2c.h>
163 * @grf_offset: offset inside the grf regmap for setting the i2c type
164 * @calc_timings: Callback function for i2c timing information calculated
174 * @adap: corresponding I2C adapter
180 * @clk_rate_nb: i2c clk rate change notify
181 * @t: I2C known timing information
182 * @lock: spinlock for the i2c bus
183 * @wait: the waitqueue to wait for i2c transfer
185 * @msg: current i2c message
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Di2c-mt7621.c3 * drivers/i2c/busses/i2c-mt7621.c
9 * Improve driver for i2cdetect from i2c-tools to detect i2c devices on the bus.
15 #include <linux/i2c.h>
56 /* timeout waiting for I2C devices to respond */
69 static int mtk_i2c_wait_idle(struct mtk_i2c *i2c) in mtk_i2c_wait_idle() argument
74 ret = readl_relaxed_poll_timeout(i2c->base + REG_SM0CTL1_REG, in mtk_i2c_wait_idle()
78 dev_dbg(i2c->dev, "idle err(%d)\n", ret); in mtk_i2c_wait_idle()
83 static void mtk_i2c_reset(struct mtk_i2c *i2c) in mtk_i2c_reset() argument
87 ret = device_reset(i2c->adap.dev.parent); in mtk_i2c_reset()
89 dev_err(i2c->dev, "I2C reset failed!\n"); in mtk_i2c_reset()
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/Linux-v5.10/drivers/media/pci/netup_unidvb/
Dnetup_unidvb_i2c.c5 * Internal I2C bus driver for NetUP Universal Dual DVB-CI
65 irqreturn_t netup_i2c_interrupt(struct netup_i2c *i2c) in netup_i2c_interrupt() argument
71 spin_lock_irqsave(&i2c->lock, flags); in netup_i2c_interrupt()
72 reg = readw(&i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
73 writew(reg & ~TWI_IRQEN, &i2c->regs->twi_ctrl0_stat); in netup_i2c_interrupt()
74 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
77 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
79 i2c->state = STATE_DONE; in netup_i2c_interrupt()
83 dev_dbg(i2c->adap.dev.parent, in netup_i2c_interrupt()
85 i2c->state = STATE_ERROR; in netup_i2c_interrupt()
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/Linux-v5.10/drivers/i2c/
DKconfig3 # I2C subsystem configuration
6 menu "I2C support"
8 config I2C config
9 tristate "I2C support"
13 I2C (pronounce: I-squared-C) is a slow serial bus protocol used in
15 or System Management Bus is a subset of the I2C protocol. More
16 information is contained in the directory <file:Documentation/i2c/>,
19 Both I2C and SMBus are supported here. You will need this for
22 If you want I2C support, you should say Y here and also to the
25 This I2C support can also be built as a module. If so, the module
[all …]
/Linux-v5.10/sound/soc/codecs/
DKconfig2 # Helper to resolve issues with configs that have SPI enabled but I2C
3 # modular, meaning we can't build the codec driver in with I2C support.
8 default m if I2C=m
9 default y if I2C=y
352 depends on I2C
368 depends on I2C
373 depends on I2C
386 tristate "Analog Devices AU1761 CODEC - I2C"
387 depends on I2C
403 depends on I2C
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/Linux-v5.10/Documentation/devicetree/bindings/i2c/
Dnvidia,tegra20-i2c.txt1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
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