Lines Matching full:i2c
14 #include <linux/i2c.h>
77 #define I2C_DRV_NAME "i2c-mt65xx"
227 struct i2c_adapter adap; /* i2c host adapter */
231 /* set in i2c probe */
232 void __iomem *base; /* i2c base addr */
234 struct clk *clk_main; /* main clock for i2c bus */
235 struct clk *clk_dma; /* DMA clock for i2c via DMA */
236 struct clk *clk_pmic; /* PMIC clock for i2c from PMIC */
237 struct clk *clk_arb; /* Arbitrator clock for i2c */
238 bool have_pmic; /* can use i2c pins from PMIC */
403 { .compatible = "mediatek,mt2712-i2c", .data = &mt2712_compat },
404 { .compatible = "mediatek,mt6577-i2c", .data = &mt6577_compat },
405 { .compatible = "mediatek,mt6589-i2c", .data = &mt6589_compat },
406 { .compatible = "mediatek,mt7622-i2c", .data = &mt7622_compat },
407 { .compatible = "mediatek,mt8173-i2c", .data = &mt8173_compat },
408 { .compatible = "mediatek,mt8183-i2c", .data = &mt8183_compat },
409 { .compatible = "mediatek,mt8192-i2c", .data = &mt8192_compat },
414 static u16 mtk_i2c_readw(struct mtk_i2c *i2c, enum I2C_REGS_OFFSET reg) in mtk_i2c_readw() argument
416 return readw(i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_readw()
419 static void mtk_i2c_writew(struct mtk_i2c *i2c, u16 val, in mtk_i2c_writew() argument
422 writew(val, i2c->base + i2c->dev_comp->regs[reg]); in mtk_i2c_writew()
425 static int mtk_i2c_clock_enable(struct mtk_i2c *i2c) in mtk_i2c_clock_enable() argument
429 ret = clk_prepare_enable(i2c->clk_dma); in mtk_i2c_clock_enable()
433 ret = clk_prepare_enable(i2c->clk_main); in mtk_i2c_clock_enable()
437 if (i2c->have_pmic) { in mtk_i2c_clock_enable()
438 ret = clk_prepare_enable(i2c->clk_pmic); in mtk_i2c_clock_enable()
443 if (i2c->clk_arb) { in mtk_i2c_clock_enable()
444 ret = clk_prepare_enable(i2c->clk_arb); in mtk_i2c_clock_enable()
452 if (i2c->have_pmic) in mtk_i2c_clock_enable()
453 clk_disable_unprepare(i2c->clk_pmic); in mtk_i2c_clock_enable()
455 clk_disable_unprepare(i2c->clk_main); in mtk_i2c_clock_enable()
457 clk_disable_unprepare(i2c->clk_dma); in mtk_i2c_clock_enable()
462 static void mtk_i2c_clock_disable(struct mtk_i2c *i2c) in mtk_i2c_clock_disable() argument
464 if (i2c->clk_arb) in mtk_i2c_clock_disable()
465 clk_disable_unprepare(i2c->clk_arb); in mtk_i2c_clock_disable()
467 if (i2c->have_pmic) in mtk_i2c_clock_disable()
468 clk_disable_unprepare(i2c->clk_pmic); in mtk_i2c_clock_disable()
470 clk_disable_unprepare(i2c->clk_main); in mtk_i2c_clock_disable()
471 clk_disable_unprepare(i2c->clk_dma); in mtk_i2c_clock_disable()
474 static void mtk_i2c_init_hw(struct mtk_i2c *i2c) in mtk_i2c_init_hw() argument
478 writel(I2C_DMA_HARD_RST, i2c->pdmabase + OFFSET_RST); in mtk_i2c_init_hw()
480 writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_RST); in mtk_i2c_init_hw()
482 mtk_i2c_writew(i2c, I2C_SOFT_RST, OFFSET_SOFTRESET); in mtk_i2c_init_hw()
485 if (i2c->use_push_pull) in mtk_i2c_init_hw()
486 mtk_i2c_writew(i2c, I2C_IO_CONFIG_PUSH_PULL, OFFSET_IO_CONFIG); in mtk_i2c_init_hw()
488 mtk_i2c_writew(i2c, I2C_IO_CONFIG_OPEN_DRAIN, OFFSET_IO_CONFIG); in mtk_i2c_init_hw()
490 if (i2c->dev_comp->dcm) in mtk_i2c_init_hw()
491 mtk_i2c_writew(i2c, I2C_DCM_DISABLE, OFFSET_DCM_EN); in mtk_i2c_init_hw()
493 mtk_i2c_writew(i2c, i2c->timing_reg, OFFSET_TIMING); in mtk_i2c_init_hw()
494 mtk_i2c_writew(i2c, i2c->high_speed_reg, OFFSET_HS); in mtk_i2c_init_hw()
495 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_init_hw()
496 mtk_i2c_writew(i2c, i2c->ltiming_reg, OFFSET_LTIMING); in mtk_i2c_init_hw()
498 if (i2c->dev_comp->timing_adjust) { in mtk_i2c_init_hw()
499 mtk_i2c_writew(i2c, i2c->ac_timing.ext, OFFSET_EXT_CONF); in mtk_i2c_init_hw()
500 mtk_i2c_writew(i2c, i2c->ac_timing.inter_clk_div, in mtk_i2c_init_hw()
502 mtk_i2c_writew(i2c, I2C_SCL_MIS_COMP_VALUE, in mtk_i2c_init_hw()
504 mtk_i2c_writew(i2c, i2c->ac_timing.sda_timing, in mtk_i2c_init_hw()
507 if (i2c->dev_comp->ltiming_adjust) { in mtk_i2c_init_hw()
508 mtk_i2c_writew(i2c, i2c->ac_timing.htiming, in mtk_i2c_init_hw()
510 mtk_i2c_writew(i2c, i2c->ac_timing.hs, OFFSET_HS); in mtk_i2c_init_hw()
511 mtk_i2c_writew(i2c, i2c->ac_timing.ltiming, in mtk_i2c_init_hw()
514 mtk_i2c_writew(i2c, i2c->ac_timing.scl_hl_ratio, in mtk_i2c_init_hw()
516 mtk_i2c_writew(i2c, i2c->ac_timing.hs_scl_hl_ratio, in mtk_i2c_init_hw()
518 mtk_i2c_writew(i2c, i2c->ac_timing.sta_stop, in mtk_i2c_init_hw()
520 mtk_i2c_writew(i2c, i2c->ac_timing.hs_sta_stop, in mtk_i2c_init_hw()
525 /* If use i2c pin from PMIC mt6397 side, need set PATH_DIR first */ in mtk_i2c_init_hw()
526 if (i2c->have_pmic) in mtk_i2c_init_hw()
527 mtk_i2c_writew(i2c, I2C_CONTROL_WRAPPER, OFFSET_PATH_DIR); in mtk_i2c_init_hw()
531 if (i2c->dev_comp->dma_sync) in mtk_i2c_init_hw()
534 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_init_hw()
535 mtk_i2c_writew(i2c, I2C_DELAY_LEN, OFFSET_DELAY_LEN); in mtk_i2c_init_hw()
557 * Check and Calculate i2c ac-timing
568 static int mtk_i2c_check_ac_timing(struct mtk_i2c *i2c, in mtk_i2c_check_ac_timing() argument
580 if (!i2c->dev_comp->timing_adjust) in mtk_i2c_check_ac_timing()
583 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_check_ac_timing()
588 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_check_ac_timing()
622 if (i2c->dev_comp->ltiming_adjust) { in mtk_i2c_check_ac_timing()
623 i2c->ac_timing.hs = I2C_TIME_DEFAULT_VALUE | in mtk_i2c_check_ac_timing()
625 i2c->ac_timing.ltiming &= ~GENMASK(15, 9); in mtk_i2c_check_ac_timing()
626 i2c->ac_timing.ltiming |= (sample_cnt << 12) | in mtk_i2c_check_ac_timing()
628 i2c->ac_timing.ext &= ~GENMASK(7, 1); in mtk_i2c_check_ac_timing()
629 i2c->ac_timing.ext |= (su_sta_cnt << 1) | (1 << 0); in mtk_i2c_check_ac_timing()
631 i2c->ac_timing.hs_scl_hl_ratio = (1 << 12) | in mtk_i2c_check_ac_timing()
633 i2c->ac_timing.hs_sta_stop = (su_sta_cnt << 8) | in mtk_i2c_check_ac_timing()
636 i2c->ac_timing.sda_timing &= ~GENMASK(11, 6); in mtk_i2c_check_ac_timing()
637 i2c->ac_timing.sda_timing |= (1 << 12) | in mtk_i2c_check_ac_timing()
640 if (i2c->dev_comp->ltiming_adjust) { in mtk_i2c_check_ac_timing()
641 i2c->ac_timing.htiming = (sample_cnt << 8) | (high_cnt); in mtk_i2c_check_ac_timing()
642 i2c->ac_timing.ltiming = (sample_cnt << 6) | (low_cnt); in mtk_i2c_check_ac_timing()
643 i2c->ac_timing.ext = (su_sta_cnt << 8) | (1 << 0); in mtk_i2c_check_ac_timing()
645 i2c->ac_timing.scl_hl_ratio = (1 << 12) | in mtk_i2c_check_ac_timing()
647 i2c->ac_timing.sta_stop = (su_sta_cnt << 8) | in mtk_i2c_check_ac_timing()
651 i2c->ac_timing.sda_timing = (1 << 12) | in mtk_i2c_check_ac_timing()
659 * Calculate i2c port speed
666 * less than or equal to i2c->speed_hz. The calculation try to get
669 static int mtk_i2c_calculate_speed(struct mtk_i2c *i2c, unsigned int clk_src, in mtk_i2c_calculate_speed() argument
706 ret = mtk_i2c_check_ac_timing(i2c, clk_src, in mtk_i2c_calculate_speed()
729 dev_dbg(i2c->dev, "Unsupported speed (%uhz)\n", target_speed); in mtk_i2c_calculate_speed()
739 static int mtk_i2c_set_speed(struct mtk_i2c *i2c, unsigned int parent_clk) in mtk_i2c_set_speed() argument
751 target_speed = i2c->speed_hz; in mtk_i2c_set_speed()
752 parent_clk /= i2c->clk_src_div; in mtk_i2c_set_speed()
754 if (i2c->dev_comp->timing_adjust) in mtk_i2c_set_speed()
764 ret = mtk_i2c_calculate_speed(i2c, clk_src, in mtk_i2c_set_speed()
771 i2c->timing_reg = (l_sample_cnt << 8) | l_step_cnt; in mtk_i2c_set_speed()
774 ret = mtk_i2c_calculate_speed(i2c, clk_src, in mtk_i2c_set_speed()
780 i2c->high_speed_reg = I2C_TIME_DEFAULT_VALUE | in mtk_i2c_set_speed()
783 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_set_speed()
784 i2c->ltiming_reg = in mtk_i2c_set_speed()
788 ret = mtk_i2c_calculate_speed(i2c, clk_src, in mtk_i2c_set_speed()
794 i2c->timing_reg = (l_sample_cnt << 8) | l_step_cnt; in mtk_i2c_set_speed()
797 i2c->high_speed_reg = I2C_TIME_CLR_VALUE; in mtk_i2c_set_speed()
799 if (i2c->dev_comp->ltiming_adjust) in mtk_i2c_set_speed()
800 i2c->ltiming_reg = in mtk_i2c_set_speed()
807 i2c->ac_timing.inter_clk_div = clk_div - 1; in mtk_i2c_set_speed()
812 static int mtk_i2c_do_transfer(struct mtk_i2c *i2c, struct i2c_msg *msgs, in mtk_i2c_do_transfer() argument
827 i2c->irq_stat = 0; in mtk_i2c_do_transfer()
829 if (i2c->auto_restart) in mtk_i2c_do_transfer()
832 reinit_completion(&i2c->msg_complete); in mtk_i2c_do_transfer()
834 control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) & in mtk_i2c_do_transfer()
836 if ((i2c->speed_hz > I2C_MAX_FAST_MODE_FREQ) || (left_num >= 1)) in mtk_i2c_do_transfer()
839 if (i2c->op == I2C_MASTER_WRRD) in mtk_i2c_do_transfer()
842 mtk_i2c_writew(i2c, control_reg, OFFSET_CONTROL); in mtk_i2c_do_transfer()
845 mtk_i2c_writew(i2c, addr_reg, OFFSET_SLAVE_ADDR); in mtk_i2c_do_transfer()
848 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
851 mtk_i2c_writew(i2c, I2C_FIFO_ADDR_CLR, OFFSET_FIFO_ADDR_CLR); in mtk_i2c_do_transfer()
854 mtk_i2c_writew(i2c, restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
858 if (i2c->op == I2C_MASTER_WRRD) { in mtk_i2c_do_transfer()
859 if (i2c->dev_comp->aux_len_reg) { in mtk_i2c_do_transfer()
860 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN); in mtk_i2c_do_transfer()
861 mtk_i2c_writew(i2c, (msgs + 1)->len, in mtk_i2c_do_transfer()
864 mtk_i2c_writew(i2c, msgs->len | ((msgs + 1)->len) << 8, in mtk_i2c_do_transfer()
867 mtk_i2c_writew(i2c, I2C_WRRD_TRANAC_VALUE, OFFSET_TRANSAC_LEN); in mtk_i2c_do_transfer()
869 mtk_i2c_writew(i2c, msgs->len, OFFSET_TRANSFER_LEN); in mtk_i2c_do_transfer()
870 mtk_i2c_writew(i2c, num, OFFSET_TRANSAC_LEN); in mtk_i2c_do_transfer()
873 if (i2c->dev_comp->apdma_sync) { in mtk_i2c_do_transfer()
875 if (i2c->op == I2C_MASTER_WRRD) in mtk_i2c_do_transfer()
880 if (i2c->op == I2C_MASTER_RD) { in mtk_i2c_do_transfer()
881 writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
882 writel(I2C_DMA_CON_RX | dma_sync, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
888 rpaddr = dma_map_single(i2c->dev, dma_rd_buf, in mtk_i2c_do_transfer()
890 if (dma_mapping_error(i2c->dev, rpaddr)) { in mtk_i2c_do_transfer()
896 if (i2c->dev_comp->max_dma_support > 32) { in mtk_i2c_do_transfer()
898 writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE); in mtk_i2c_do_transfer()
901 writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR); in mtk_i2c_do_transfer()
902 writel(msgs->len, i2c->pdmabase + OFFSET_RX_LEN); in mtk_i2c_do_transfer()
903 } else if (i2c->op == I2C_MASTER_WR) { in mtk_i2c_do_transfer()
904 writel(I2C_DMA_INT_FLAG_NONE, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
905 writel(I2C_DMA_CON_TX | dma_sync, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
911 wpaddr = dma_map_single(i2c->dev, dma_wr_buf, in mtk_i2c_do_transfer()
913 if (dma_mapping_error(i2c->dev, wpaddr)) { in mtk_i2c_do_transfer()
919 if (i2c->dev_comp->max_dma_support > 32) { in mtk_i2c_do_transfer()
921 writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE); in mtk_i2c_do_transfer()
924 writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR); in mtk_i2c_do_transfer()
925 writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN); in mtk_i2c_do_transfer()
927 writel(I2C_DMA_CLR_FLAG, i2c->pdmabase + OFFSET_INT_FLAG); in mtk_i2c_do_transfer()
928 writel(I2C_DMA_CLR_FLAG | dma_sync, i2c->pdmabase + OFFSET_CON); in mtk_i2c_do_transfer()
934 wpaddr = dma_map_single(i2c->dev, dma_wr_buf, in mtk_i2c_do_transfer()
936 if (dma_mapping_error(i2c->dev, wpaddr)) { in mtk_i2c_do_transfer()
944 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
952 rpaddr = dma_map_single(i2c->dev, dma_rd_buf, in mtk_i2c_do_transfer()
955 if (dma_mapping_error(i2c->dev, rpaddr)) { in mtk_i2c_do_transfer()
956 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
965 if (i2c->dev_comp->max_dma_support > 32) { in mtk_i2c_do_transfer()
967 writel(reg_4g_mode, i2c->pdmabase + OFFSET_TX_4G_MODE); in mtk_i2c_do_transfer()
970 writel(reg_4g_mode, i2c->pdmabase + OFFSET_RX_4G_MODE); in mtk_i2c_do_transfer()
973 writel((u32)wpaddr, i2c->pdmabase + OFFSET_TX_MEM_ADDR); in mtk_i2c_do_transfer()
974 writel((u32)rpaddr, i2c->pdmabase + OFFSET_RX_MEM_ADDR); in mtk_i2c_do_transfer()
975 writel(msgs->len, i2c->pdmabase + OFFSET_TX_LEN); in mtk_i2c_do_transfer()
976 writel((msgs + 1)->len, i2c->pdmabase + OFFSET_RX_LEN); in mtk_i2c_do_transfer()
979 writel(I2C_DMA_START_EN, i2c->pdmabase + OFFSET_EN); in mtk_i2c_do_transfer()
981 if (!i2c->auto_restart) { in mtk_i2c_do_transfer()
988 mtk_i2c_writew(i2c, start_reg, OFFSET_START); in mtk_i2c_do_transfer()
990 ret = wait_for_completion_timeout(&i2c->msg_complete, in mtk_i2c_do_transfer()
991 i2c->adap.timeout); in mtk_i2c_do_transfer()
994 mtk_i2c_writew(i2c, ~(restart_flag | I2C_HS_NACKERR | I2C_ACKERR | in mtk_i2c_do_transfer()
997 if (i2c->op == I2C_MASTER_WR) { in mtk_i2c_do_transfer()
998 dma_unmap_single(i2c->dev, wpaddr, in mtk_i2c_do_transfer()
1002 } else if (i2c->op == I2C_MASTER_RD) { in mtk_i2c_do_transfer()
1003 dma_unmap_single(i2c->dev, rpaddr, in mtk_i2c_do_transfer()
1008 dma_unmap_single(i2c->dev, wpaddr, msgs->len, in mtk_i2c_do_transfer()
1010 dma_unmap_single(i2c->dev, rpaddr, (msgs + 1)->len, in mtk_i2c_do_transfer()
1018 dev_dbg(i2c->dev, "addr: %x, transfer timeout\n", msgs->addr); in mtk_i2c_do_transfer()
1019 mtk_i2c_init_hw(i2c); in mtk_i2c_do_transfer()
1023 if (i2c->irq_stat & (I2C_HS_NACKERR | I2C_ACKERR)) { in mtk_i2c_do_transfer()
1024 dev_dbg(i2c->dev, "addr: %x, transfer ACK error\n", msgs->addr); in mtk_i2c_do_transfer()
1025 mtk_i2c_init_hw(i2c); in mtk_i2c_do_transfer()
1037 struct mtk_i2c *i2c = i2c_get_adapdata(adap); in mtk_i2c_transfer() local
1039 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_transfer()
1043 i2c->auto_restart = i2c->dev_comp->auto_restart; in mtk_i2c_transfer()
1046 if (i2c->auto_restart && num == 2) { in mtk_i2c_transfer()
1049 i2c->auto_restart = 0; in mtk_i2c_transfer()
1053 if (i2c->auto_restart && num >= 2 && i2c->speed_hz > I2C_MAX_FAST_MODE_FREQ) in mtk_i2c_transfer()
1057 i2c->ignore_restart_irq = true; in mtk_i2c_transfer()
1059 i2c->ignore_restart_irq = false; in mtk_i2c_transfer()
1063 dev_dbg(i2c->dev, "data buffer is NULL.\n"); in mtk_i2c_transfer()
1069 i2c->op = I2C_MASTER_RD; in mtk_i2c_transfer()
1071 i2c->op = I2C_MASTER_WR; in mtk_i2c_transfer()
1073 if (!i2c->auto_restart) { in mtk_i2c_transfer()
1076 i2c->op = I2C_MASTER_WRRD; in mtk_i2c_transfer()
1082 ret = mtk_i2c_do_transfer(i2c, msgs, num, left_num); in mtk_i2c_transfer()
1092 mtk_i2c_clock_disable(i2c); in mtk_i2c_transfer()
1098 struct mtk_i2c *i2c = dev_id; in mtk_i2c_irq() local
1102 if (i2c->auto_restart) in mtk_i2c_irq()
1105 intr_stat = mtk_i2c_readw(i2c, OFFSET_INTR_STAT); in mtk_i2c_irq()
1106 mtk_i2c_writew(i2c, intr_stat, OFFSET_INTR_STAT); in mtk_i2c_irq()
1109 * when occurs ack error, i2c controller generate two interrupts in mtk_i2c_irq()
1111 * i2c->irq_stat need keep the two interrupt value. in mtk_i2c_irq()
1113 i2c->irq_stat |= intr_stat; in mtk_i2c_irq()
1115 if (i2c->ignore_restart_irq && (i2c->irq_stat & restart_flag)) { in mtk_i2c_irq()
1116 i2c->ignore_restart_irq = false; in mtk_i2c_irq()
1117 i2c->irq_stat = 0; in mtk_i2c_irq()
1118 mtk_i2c_writew(i2c, I2C_RS_MUL_CNFG | I2C_RS_MUL_TRIG | in mtk_i2c_irq()
1121 if (i2c->irq_stat & (I2C_TRANSAC_COMP | restart_flag)) in mtk_i2c_irq()
1122 complete(&i2c->msg_complete); in mtk_i2c_irq()
1142 static int mtk_i2c_parse_dt(struct device_node *np, struct mtk_i2c *i2c) in mtk_i2c_parse_dt() argument
1146 ret = of_property_read_u32(np, "clock-frequency", &i2c->speed_hz); in mtk_i2c_parse_dt()
1148 i2c->speed_hz = I2C_MAX_STANDARD_MODE_FREQ; in mtk_i2c_parse_dt()
1150 ret = of_property_read_u32(np, "clock-div", &i2c->clk_src_div); in mtk_i2c_parse_dt()
1154 if (i2c->clk_src_div == 0) in mtk_i2c_parse_dt()
1157 i2c->have_pmic = of_property_read_bool(np, "mediatek,have-pmic"); in mtk_i2c_parse_dt()
1158 i2c->use_push_pull = in mtk_i2c_parse_dt()
1167 struct mtk_i2c *i2c; in mtk_i2c_probe() local
1172 i2c = devm_kzalloc(&pdev->dev, sizeof(*i2c), GFP_KERNEL); in mtk_i2c_probe()
1173 if (!i2c) in mtk_i2c_probe()
1177 i2c->base = devm_ioremap_resource(&pdev->dev, res); in mtk_i2c_probe()
1178 if (IS_ERR(i2c->base)) in mtk_i2c_probe()
1179 return PTR_ERR(i2c->base); in mtk_i2c_probe()
1182 i2c->pdmabase = devm_ioremap_resource(&pdev->dev, res); in mtk_i2c_probe()
1183 if (IS_ERR(i2c->pdmabase)) in mtk_i2c_probe()
1184 return PTR_ERR(i2c->pdmabase); in mtk_i2c_probe()
1190 init_completion(&i2c->msg_complete); in mtk_i2c_probe()
1192 i2c->dev_comp = of_device_get_match_data(&pdev->dev); in mtk_i2c_probe()
1193 i2c->adap.dev.of_node = pdev->dev.of_node; in mtk_i2c_probe()
1194 i2c->dev = &pdev->dev; in mtk_i2c_probe()
1195 i2c->adap.dev.parent = &pdev->dev; in mtk_i2c_probe()
1196 i2c->adap.owner = THIS_MODULE; in mtk_i2c_probe()
1197 i2c->adap.algo = &mtk_i2c_algorithm; in mtk_i2c_probe()
1198 i2c->adap.quirks = i2c->dev_comp->quirks; in mtk_i2c_probe()
1199 i2c->adap.timeout = 2 * HZ; in mtk_i2c_probe()
1200 i2c->adap.retries = 1; in mtk_i2c_probe()
1202 ret = mtk_i2c_parse_dt(pdev->dev.of_node, i2c); in mtk_i2c_probe()
1206 if (i2c->have_pmic && !i2c->dev_comp->pmic_i2c) in mtk_i2c_probe()
1209 i2c->clk_main = devm_clk_get(&pdev->dev, "main"); in mtk_i2c_probe()
1210 if (IS_ERR(i2c->clk_main)) { in mtk_i2c_probe()
1212 return PTR_ERR(i2c->clk_main); in mtk_i2c_probe()
1215 i2c->clk_dma = devm_clk_get(&pdev->dev, "dma"); in mtk_i2c_probe()
1216 if (IS_ERR(i2c->clk_dma)) { in mtk_i2c_probe()
1218 return PTR_ERR(i2c->clk_dma); in mtk_i2c_probe()
1221 i2c->clk_arb = devm_clk_get(&pdev->dev, "arb"); in mtk_i2c_probe()
1222 if (IS_ERR(i2c->clk_arb)) in mtk_i2c_probe()
1223 i2c->clk_arb = NULL; in mtk_i2c_probe()
1225 clk = i2c->clk_main; in mtk_i2c_probe()
1226 if (i2c->have_pmic) { in mtk_i2c_probe()
1227 i2c->clk_pmic = devm_clk_get(&pdev->dev, "pmic"); in mtk_i2c_probe()
1228 if (IS_ERR(i2c->clk_pmic)) { in mtk_i2c_probe()
1230 return PTR_ERR(i2c->clk_pmic); in mtk_i2c_probe()
1232 clk = i2c->clk_pmic; in mtk_i2c_probe()
1235 strlcpy(i2c->adap.name, I2C_DRV_NAME, sizeof(i2c->adap.name)); in mtk_i2c_probe()
1237 ret = mtk_i2c_set_speed(i2c, clk_get_rate(clk)); in mtk_i2c_probe()
1243 if (i2c->dev_comp->max_dma_support > 32) { in mtk_i2c_probe()
1245 DMA_BIT_MASK(i2c->dev_comp->max_dma_support)); in mtk_i2c_probe()
1252 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_probe()
1257 mtk_i2c_init_hw(i2c); in mtk_i2c_probe()
1258 mtk_i2c_clock_disable(i2c); in mtk_i2c_probe()
1261 IRQF_TRIGGER_NONE, I2C_DRV_NAME, i2c); in mtk_i2c_probe()
1264 "Request I2C IRQ %d fail\n", irq); in mtk_i2c_probe()
1268 i2c_set_adapdata(&i2c->adap, i2c); in mtk_i2c_probe()
1269 ret = i2c_add_adapter(&i2c->adap); in mtk_i2c_probe()
1273 platform_set_drvdata(pdev, i2c); in mtk_i2c_probe()
1280 struct mtk_i2c *i2c = platform_get_drvdata(pdev); in mtk_i2c_remove() local
1282 i2c_del_adapter(&i2c->adap); in mtk_i2c_remove()
1291 struct mtk_i2c *i2c = dev_get_drvdata(dev); in mtk_i2c_resume() local
1293 ret = mtk_i2c_clock_enable(i2c); in mtk_i2c_resume()
1299 mtk_i2c_init_hw(i2c); in mtk_i2c_resume()
1301 mtk_i2c_clock_disable(i2c); in mtk_i2c_resume()
1324 MODULE_DESCRIPTION("MediaTek I2C Bus Driver");