| /Linux-v5.4/Documentation/devicetree/bindings/ |
| D | unittest.txt | 6 - compatible: must be "unittest"
12 compatible = "unittest";
15 2) OF unittest i2c adapter platform device
20 - compatible: must be unittest-i2c-bus
22 Children nodes contain unittest i2c devices.
25 unittest-i2c-bus {
26 compatible = "unittest-i2c-bus";
29 3) OF unittest i2c device
31 ** I2C unittest device
34 - compatible: must be unittest-i2c-dev
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| /Linux-v5.4/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra20-i2c.txt | 1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
9 Details of compatible are as follows:
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
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| D | i2c-imx.txt | 1 * Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX
4 - compatible :
5 - "fsl,imx1-i2c" for I2C compatible with the one integrated on i.MX1 SoC
6 - "fsl,imx21-i2c" for I2C compatible with the one integrated on i.MX21 SoC
7 - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8 - reg : Should contain I2C/HS-I2C registers location and length
9 - interrupts : Should contain I2C/HS-I2C interrupt
10 - clocks : Should contain the I2C/HS-I2C clock specifier
13 - clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
15 - dmas: A list of two dma specifiers, one for each entry in dma-names.
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| D | marvell,mv64xxx-i2c.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/i2c/marvell,mv64xxx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MV64XXX I2C Controller Device Tree Bindings
10 - Gregory CLEMENT <gregory.clement@bootlin.com>
13 compatible:
15 - const: allwinner,sun4i-a10-i2c
16 - items:
17 - const: allwinner,sun7i-a20-i2c
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| D | renesas,i2c.txt | 1 I2C for R-Car platforms
4 - compatible:
5 "renesas,i2c-r8a7743" if the device is a part of a R8A7743 SoC.
6 "renesas,i2c-r8a7744" if the device is a part of a R8A7744 SoC.
7 "renesas,i2c-r8a7745" if the device is a part of a R8A7745 SoC.
8 "renesas,i2c-r8a77470" if the device is a part of a R8A77470 SoC.
9 "renesas,i2c-r8a774a1" if the device is a part of a R8A774A1 SoC.
10 "renesas,i2c-r8a774c0" if the device is a part of a R8A774C0 SoC.
11 "renesas,i2c-r8a7778" if the device is a part of a R8A7778 SoC.
12 "renesas,i2c-r8a7779" if the device is a part of a R8A7779 SoC.
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| D | i2c-mpc.txt | 1 * I2C
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "fsl,CHIP-i2c" where CHIP is the name of a
7 compatible processor, e.g. mpc8313, mpc8543, mpc8544, mpc5121,
9 "fsl,mpc5121-i2c-ctrl" is required as shown in the example below.
13 - interrupts : <a b> where a is the interrupt number and b is a
18 - fsl,preserve-clocking : boolean; if defined, the clock settings
20 - clock-frequency : desired I2C bus clock frequency in Hz.
21 - fsl,timeout : I2C bus timeout in microseconds.
26 i2c@1740 {
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| D | i2c-at91.txt | 1 I2C for Atmel platforms
4 - compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c",
5 "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c",
6 "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c"
7 - reg: physical base address of the controller and length of memory mapped
9 - interrupts: interrupt number to the cpu.
10 - #address-cells = <1>;
11 - #size-cells = <0>;
12 - clocks: phandles to input clocks.
15 - clock-frequency: Desired I2C bus frequency in Hz, otherwise defaults to 100000
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| D | i2c-pxa.txt | 1 * Marvell MMP I2C controller
5 - reg : Offset and length of the register set for the device
6 - compatible : should be "mrvl,mmp-twsi" where mmp is the name of a
7 compatible processor, e.g. pxa168, pxa910, mmp2, mmp3.
8 For the pxa2xx/pxa3xx, an additional node "mrvl,pxa-i2c" is required
10 For the Armada 3700, the compatible should be "marvell,armada-3700-i2c".
14 - interrupts : the interrupt number
15 - mrvl,i2c-polling : Disable interrupt of i2c controller. Polling
16 status register of i2c controller instead.
17 - mrvl,i2c-fast-mode : Enable fast mode of i2c controller.
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| D | i2c-s3c2410.txt | 1 * Samsung's I2C controller
3 The Samsung's I2C controller is used to interface with I2C devices.
6 - compatible: value should be either of the following.
7 (a) "samsung, s3c2410-i2c", for i2c compatible with s3c2410 i2c.
8 (b) "samsung, s3c2440-i2c", for i2c compatible with s3c2440 i2c.
9 (c) "samsung, s3c2440-hdmiphy-i2c", for s3c2440-like i2c used
11 (d) "samsung, exynos5-sata-phy-i2c", for s3c2440-like i2c used as
13 - reg: physical base address of the controller and length of memory mapped
15 - interrupts: interrupt number to the cpu.
16 - samsung,i2c-sda-delay: Delay (in ns) applied to data line (SDA) edges.
[all …]
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| D | i2c-demux-pinctrl.txt | 1 Pinctrl-based I2C Bus DeMux
3 This binding describes an I2C bus demultiplexer that uses pin multiplexing to
4 route the I2C signals, and represents the pin multiplexing configuration using
5 the pinctrl device tree bindings. This may be used to select one I2C IP core at
6 runtime which may have a better feature set for a given task than another I2C
10 +-------------------------------+
12 | | +-----+ +-----+
13 | +------------+ | | dev | | dev |
14 | |I2C IP Core1|--\ | +-----+ +-----+
15 | +------------+ \-------+ | | |
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| D | i2c-designware.txt | 1 * Synopsys DesignWare I2C
5 - compatible : should be "snps,designware-i2c"
6 or "mscc,ocelot-i2c" with "snps,designware-i2c" for fallback
7 - reg : Offset and length of the register set for the device
8 - interrupts : <IRQ> where IRQ is the interrupt number.
9 - clocks : phandles for the clocks, see the description of clock-names below.
11 clock is optional. If a single clock is specified but no clock-name, it is
16 - clock-frequency : desired I2C bus clock frequency in Hz.
20 - clock-names : Contains the names of the clocks:
21 "ic_clk", for the core clock used to generate the external I2C clock.
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| D | i2c-meson.txt | 1 Amlogic Meson I2C controller
4 - compatible: must be:
5 "amlogic,meson6-i2c" for Meson8 and compatible SoCs
6 "amlogic,meson-gxbb-i2c" for GXBB and compatible SoCs
7 "amlogic,meson-axg-i2c"for AXG and compatible SoCs
9 - reg: physical address and length of the device registers
10 - interrupts: a single interrupt specifier
11 - clocks: clock for the device
12 - #address-cells: should be <1>
13 - #size-cells: should be <0>
[all …]
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | aspeed-bmc-facebook-tiogapass.dts | 1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
17 * Hardcode the bus number of i2c switches' channels to
38 stdout-path = &uart5;
46 iio-hwmon {
47 compatible = "iio-hwmon";
48 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
[all …]
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| D | ibm-power9-dual.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
7 #address-cells = <1>;
8 #size-cells = <1>;
9 chip-id = <0>;
12 compatible = "ibm,fsi2pib";
16 i2c@1800 {
17 compatible = "ibm,fsi-i2c-master";
19 #address-cells = <1>;
20 #size-cells = <0>;
22 cfam0_i2c0: i2c-bus@0 {
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| D | aspeed-bmc-quanta-q71l.dts | 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "aspeed-g4.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
8 compatible = "quanta,q71l-bmc", "aspeed,ast2400";
30 stdout-path = &uart5;
38 reserved-memory {
39 #address-cells = <1>;
40 #size-cells = <1>;
44 no-map;
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| D | r8a7790-lager.dts | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
11 * SSI-AK4643
38 /dts-v1/;
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
45 compatible = "renesas,lager", "renesas,r8a7790";
60 stdout-path = "serial0:115200n8";
74 #address-cells = <1>;
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| D | r8a7794-alt.dts | 1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "renesas,alt", "renesas,r8a7794";
26 stdout-path = "serial0:115200n8";
34 d3_3v: regulator-d3-3v {
35 compatible = "regulator-fixed";
36 regulator-name = "D3.3V";
37 regulator-min-microvolt = <3300000>;
38 regulator-max-microvolt = <3300000>;
[all …]
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| /Linux-v5.4/drivers/mfd/ |
| D | stmpe-i2c.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * ST Microelectronics MFD: stmpe's i2c client specific driver
5 * Copyright (C) ST-Ericsson SA 2010
8 * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
12 #include <linux/i2c.h>
22 struct i2c_client *i2c = stmpe->client; in i2c_reg_read() local
24 return i2c_smbus_read_byte_data(i2c, reg); in i2c_reg_read()
29 struct i2c_client *i2c = stmpe->client; in i2c_reg_write() local
31 return i2c_smbus_write_byte_data(i2c, reg, val); in i2c_reg_write()
36 struct i2c_client *i2c = stmpe->client; in i2c_block_read() local
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| D | axp20x-i2c.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C driver for the X-Powers' Power Management ICs
5 * AXP20x typically comprises an adaptive USB-Compatible PWM charger, BUCK DC-DC
6 * converters, LDOs, multiple 12-bit ADCs of voltage, current and temperature
9 * This driver supports the I2C variants.
18 #include <linux/i2c.h>
25 static int axp20x_i2c_probe(struct i2c_client *i2c, in axp20x_i2c_probe() argument
31 axp20x = devm_kzalloc(&i2c->dev, sizeof(*axp20x), GFP_KERNEL); in axp20x_i2c_probe()
33 return -ENOMEM; in axp20x_i2c_probe()
35 axp20x->dev = &i2c->dev; in axp20x_i2c_probe()
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| /Linux-v5.4/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2017 - 2018, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp";
33 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
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| D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
10 /dts-v1/;
13 #include "zynqmp-clk.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
49 wakeup-source;
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| D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2015 - 2018, Xilinx, Inc.
10 /dts-v1/;
13 #include "zynqmp-clk.dtsi"
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/gpio/gpio.h>
19 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp";
34 stdout-path = "serial0:115200n8";
42 gpio-keys {
43 compatible = "gpio-keys";
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| /Linux-v5.4/drivers/of/unittest-data/ |
| D | tests-overlay.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 testcase-data {
5 overlay-node {
8 unittest_test_bus: test-bus {
9 compatible = "simple-bus";
10 #address-cells = <1>;
11 #size-cells = <0>;
13 unittest100: test-unittest100 {
14 compatible = "unittest";
19 unittest101: test-unittest101 {
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| /Linux-v5.4/arch/arm64/boot/dts/mediatek/ |
| D | mt8183.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "mt8183-pinfunc.h"
14 compatible = "mediatek,mt8183";
15 interrupt-parent = <&sysirq>;
16 #address-cells = <2>;
17 #size-cells = <2>;
35 #address-cells = <1>;
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| /Linux-v5.4/arch/arm64/boot/dts/actions/ |
| D | s900.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/actions,s900-cmu.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/reset/actions,s900-reset.h>
11 compatible = "actions,s900";
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
[all …]
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