1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Device Tree Source for the Alt board
4 *
5 * Copyright (C) 2014 Renesas Electronics Corporation
6 */
7
8/dts-v1/;
9#include "r8a7794.dtsi"
10#include <dt-bindings/gpio/gpio.h>
11
12/ {
13	model = "Alt";
14	compatible = "renesas,alt", "renesas,r8a7794";
15
16	aliases {
17		serial0 = &scif2;
18		i2c9 = &gpioi2c1;
19		i2c10 = &gpioi2c4;
20		i2c11 = &i2chdmi;
21		i2c12 = &i2cexio4;
22	};
23
24	chosen {
25		bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
26		stdout-path = "serial0:115200n8";
27	};
28
29	memory@40000000 {
30		device_type = "memory";
31		reg = <0 0x40000000 0 0x40000000>;
32	};
33
34	d3_3v: regulator-d3-3v {
35		compatible = "regulator-fixed";
36		regulator-name = "D3.3V";
37		regulator-min-microvolt = <3300000>;
38		regulator-max-microvolt = <3300000>;
39		regulator-boot-on;
40		regulator-always-on;
41	};
42
43	vcc_sdhi0: regulator-vcc-sdhi0 {
44		compatible = "regulator-fixed";
45
46		regulator-name = "SDHI0 Vcc";
47		regulator-min-microvolt = <3300000>;
48		regulator-max-microvolt = <3300000>;
49
50		gpio = <&gpio2 26 GPIO_ACTIVE_HIGH>;
51		enable-active-high;
52	};
53
54	vccq_sdhi0: regulator-vccq-sdhi0 {
55		compatible = "regulator-gpio";
56
57		regulator-name = "SDHI0 VccQ";
58		regulator-min-microvolt = <1800000>;
59		regulator-max-microvolt = <3300000>;
60
61		gpios = <&gpio2 29 GPIO_ACTIVE_HIGH>;
62		gpios-states = <1>;
63		states = <3300000 1
64			  1800000 0>;
65	};
66
67	vcc_sdhi1: regulator-vcc-sdhi1 {
68		compatible = "regulator-fixed";
69
70		regulator-name = "SDHI1 Vcc";
71		regulator-min-microvolt = <3300000>;
72		regulator-max-microvolt = <3300000>;
73
74		gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
75		enable-active-high;
76	};
77
78	vccq_sdhi1: regulator-vccq-sdhi1 {
79		compatible = "regulator-gpio";
80
81		regulator-name = "SDHI1 VccQ";
82		regulator-min-microvolt = <1800000>;
83		regulator-max-microvolt = <3300000>;
84
85		gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
86		gpios-states = <1>;
87		states = <3300000 1
88			  1800000 0>;
89	};
90
91	lbsc {
92		#address-cells = <1>;
93		#size-cells = <1>;
94	};
95
96	vga-encoder {
97		compatible = "adi,adv7123";
98
99		ports {
100			#address-cells = <1>;
101			#size-cells = <0>;
102
103			port@0 {
104				reg = <0>;
105				adv7123_in: endpoint {
106					remote-endpoint = <&du_out_rgb1>;
107				};
108			};
109			port@1 {
110				reg = <1>;
111				adv7123_out: endpoint {
112					remote-endpoint = <&vga_in>;
113				};
114			};
115		};
116	};
117
118	vga {
119		compatible = "vga-connector";
120
121		port {
122			vga_in: endpoint {
123				remote-endpoint = <&adv7123_out>;
124			};
125		};
126	};
127
128	x2_clk: x2-clock {
129		compatible = "fixed-clock";
130		#clock-cells = <0>;
131		clock-frequency = <74250000>;
132	};
133
134	x13_clk: x13-clock {
135		compatible = "fixed-clock";
136		#clock-cells = <0>;
137		clock-frequency = <148500000>;
138	};
139
140	gpioi2c1: i2c-9 {
141		#address-cells = <1>;
142		#size-cells = <0>;
143		compatible = "i2c-gpio";
144		status = "disabled";
145		scl-gpios = <&gpio4 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
146		sda-gpios = <&gpio4 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
147	};
148
149	gpioi2c4: i2c-10 {
150		#address-cells = <1>;
151		#size-cells = <0>;
152		compatible = "i2c-gpio";
153		status = "disabled";
154		scl-gpios = <&gpio4 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
155		sda-gpios = <&gpio4 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
156		i2c-gpio,delay-us = <5>;
157	};
158
159	/*
160	 * A fallback to GPIO is provided for I2C1.
161	 */
162	i2chdmi: i2c-11 {
163		compatible = "i2c-demux-pinctrl";
164		i2c-parent = <&i2c1>, <&gpioi2c1>;
165		i2c-bus-name = "i2c-hdmi";
166		#address-cells = <1>;
167		#size-cells = <0>;
168
169		composite-in@20 {
170			compatible = "adi,adv7180";
171			reg = <0x20>;
172			remote = <&vin0>;
173
174			port {
175				adv7180: endpoint {
176					bus-width = <8>;
177					remote-endpoint = <&vin0ep>;
178				};
179			};
180		};
181
182		eeprom@50 {
183			compatible = "renesas,r1ex24002", "atmel,24c02";
184			reg = <0x50>;
185			pagesize = <16>;
186		};
187	};
188
189	/*
190	 * I2C4 is routed to EXIO connector B, pins 73 (SCL) + 74 (SDA).
191	 * A fallback to GPIO is provided.
192	 */
193	i2cexio4: i2c-14 {
194		compatible = "i2c-demux-pinctrl";
195		i2c-parent = <&i2c4>, <&gpioi2c4>;
196		i2c-bus-name = "i2c-exio4";
197		#address-cells = <1>;
198		#size-cells = <0>;
199	};
200};
201
202&pci0 {
203	status = "okay";
204	pinctrl-0 = <&usb0_pins>;
205	pinctrl-names = "default";
206};
207
208&pci1 {
209	status = "okay";
210	pinctrl-0 = <&usb1_pins>;
211	pinctrl-names = "default";
212};
213
214&usbphy {
215	status = "okay";
216};
217
218&du {
219	pinctrl-0 = <&du_pins>;
220	pinctrl-names = "default";
221	status = "okay";
222
223	clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
224		 <&x13_clk>, <&x2_clk>;
225	clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1";
226
227	ports {
228		port@1 {
229			endpoint {
230				remote-endpoint = <&adv7123_in>;
231			};
232		};
233	};
234};
235
236&extal_clk {
237	clock-frequency = <20000000>;
238};
239
240&pfc {
241	pinctrl-0 = <&scif_clk_pins>;
242	pinctrl-names = "default";
243
244	du_pins: du {
245		groups = "du1_rgb666", "du1_sync", "du1_disp", "du1_clk0_out";
246		function = "du1";
247	};
248
249	scif2_pins: scif2 {
250		groups = "scif2_data";
251		function = "scif2";
252	};
253
254	scif_clk_pins: scif_clk {
255		groups = "scif_clk";
256		function = "scif_clk";
257	};
258
259	ether_pins: ether {
260		groups = "eth_link", "eth_mdio", "eth_rmii";
261		function = "eth";
262	};
263
264	phy1_pins: phy1 {
265		groups = "intc_irq8";
266		function = "intc";
267	};
268
269	i2c1_pins: i2c1 {
270		groups = "i2c1";
271		function = "i2c1";
272	};
273
274	i2c4_pins: i2c4 {
275		groups = "i2c4";
276		function = "i2c4";
277	};
278
279	vin0_pins: vin0 {
280		groups = "vin0_data8", "vin0_clk";
281		function = "vin0";
282	};
283
284	mmcif0_pins: mmcif0 {
285		groups = "mmc_data8", "mmc_ctrl";
286		function = "mmc";
287	};
288
289	sdhi0_pins: sd0 {
290		groups = "sdhi0_data4", "sdhi0_ctrl";
291		function = "sdhi0";
292		power-source = <3300>;
293	};
294
295	sdhi0_pins_uhs: sd0_uhs {
296		groups = "sdhi0_data4", "sdhi0_ctrl";
297		function = "sdhi0";
298		power-source = <1800>;
299	};
300
301	sdhi1_pins: sd1 {
302		groups = "sdhi1_data4", "sdhi1_ctrl";
303		function = "sdhi1";
304		power-source = <3300>;
305	};
306
307	sdhi1_pins_uhs: sd1_uhs {
308		groups = "sdhi1_data4", "sdhi1_ctrl";
309		function = "sdhi1";
310		power-source = <1800>;
311	};
312
313	usb0_pins: usb0 {
314		groups = "usb0";
315		function = "usb0";
316	};
317
318	usb1_pins: usb1 {
319		groups = "usb1";
320		function = "usb1";
321	};
322};
323
324&cmt0 {
325	status = "okay";
326};
327
328&pfc {
329	qspi_pins: qspi {
330		groups = "qspi_ctrl", "qspi_data4";
331		function = "qspi";
332	};
333};
334
335&ether {
336	pinctrl-0 = <&ether_pins &phy1_pins>;
337	pinctrl-names = "default";
338
339	phy-handle = <&phy1>;
340	renesas,ether-link-active-low;
341	status = "okay";
342
343	phy1: ethernet-phy@1 {
344		reg = <1>;
345		interrupt-parent = <&irqc0>;
346		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
347		micrel,led-mode = <1>;
348	};
349};
350
351&mmcif0 {
352	pinctrl-0 = <&mmcif0_pins>;
353	pinctrl-names = "default";
354
355	vmmc-supply = <&d3_3v>;
356	vqmmc-supply = <&d3_3v>;
357	bus-width = <8>;
358	non-removable;
359	status = "okay";
360};
361
362&rwdt {
363	timeout-sec = <60>;
364	status = "okay";
365};
366
367&sdhi0 {
368	pinctrl-0 = <&sdhi0_pins>;
369	pinctrl-1 = <&sdhi0_pins_uhs>;
370	pinctrl-names = "default", "state_uhs";
371
372	vmmc-supply = <&vcc_sdhi0>;
373	vqmmc-supply = <&vccq_sdhi0>;
374	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
375	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
376	sd-uhs-sdr50;
377	sd-uhs-sdr104;
378	status = "okay";
379};
380
381&sdhi1 {
382	pinctrl-0 = <&sdhi1_pins>;
383	pinctrl-1 = <&sdhi1_pins_uhs>;
384	pinctrl-names = "default", "state_uhs";
385
386	vmmc-supply = <&vcc_sdhi1>;
387	vqmmc-supply = <&vccq_sdhi1>;
388	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
389	wp-gpios = <&gpio6 15 GPIO_ACTIVE_HIGH>;
390	sd-uhs-sdr50;
391	status = "okay";
392};
393
394&i2c1 {
395	pinctrl-0 = <&i2c1_pins>;
396	pinctrl-names = "i2c-hdmi";
397
398	clock-frequency = <400000>;
399};
400
401&i2c4 {
402	pinctrl-0 = <&i2c4_pins>;
403	pinctrl-names = "i2c-exio4";
404};
405
406&i2c7 {
407	status = "okay";
408	clock-frequency = <100000>;
409
410	pmic@58 {
411		compatible = "dlg,da9063";
412		reg = <0x58>;
413		interrupt-parent = <&gpio3>;
414		interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
415		interrupt-controller;
416
417		rtc {
418			compatible = "dlg,da9063-rtc";
419		};
420
421		wdt {
422			compatible = "dlg,da9063-watchdog";
423		};
424	};
425};
426
427&vin0 {
428	status = "okay";
429	pinctrl-0 = <&vin0_pins>;
430	pinctrl-names = "default";
431
432	port {
433		vin0ep: endpoint {
434			remote-endpoint = <&adv7180>;
435			bus-width = <8>;
436		};
437	};
438};
439
440&scif2 {
441	pinctrl-0 = <&scif2_pins>;
442	pinctrl-names = "default";
443
444	status = "okay";
445};
446
447&scif_clk {
448	clock-frequency = <14745600>;
449};
450
451&qspi {
452	pinctrl-0 = <&qspi_pins>;
453	pinctrl-names = "default";
454
455	status = "okay";
456
457	flash@0 {
458		compatible = "spansion,s25fl512s", "jedec,spi-nor";
459		reg = <0>;
460		spi-max-frequency = <30000000>;
461		spi-tx-bus-width = <4>;
462		spi-rx-bus-width = <4>;
463		spi-cpol;
464		spi-cpha;
465		m25p,fast-read;
466
467		partitions {
468			compatible = "fixed-partitions";
469			#address-cells = <1>;
470			#size-cells = <1>;
471
472			partition@0 {
473				label = "loader";
474				reg = <0x00000000 0x00040000>;
475				read-only;
476			};
477			partition@40000 {
478				label = "system";
479				reg = <0x00040000 0x00040000>;
480				read-only;
481			};
482			partition@80000 {
483				label = "user";
484				reg = <0x00080000 0x03f80000>;
485			};
486		};
487	};
488};
489