| /Linux-v5.10/drivers/gpu/drm/bridge/ |
| D | nwl-dsi.c | 3 * i.MX8 NWL MIPI DSI host driver
32 #include "nwl-dsi.h"
34 #define DRV_NAME "nwl-dsi"
82 * The DSI host controller needs this reset sequence according to NWL:
83 * 1. Deassert pclk reset to get access to DSI regs
84 * 2. Configure DSI Host and DPHY and enable DPHY
86 * 4. Send DSI cmds to configure peripheral (handled by panel drv)
88 * DSI data
90 * TODO: Since panel_bridges do their DSI setup in enable we
99 /* DSI clocks */
[all …]
|
| D | cdns-dsi.c | 507 static int cdns_dsi_mode2cfg(struct cdns_dsi *dsi, in cdns_dsi_mode2cfg() argument
512 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_mode2cfg()
553 static int cdns_dsi_adjust_phy_config(struct cdns_dsi *dsi, in cdns_dsi_adjust_phy_config() argument
559 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_adjust_phy_config()
576 * Make sure DSI htotal is aligned on a lane boundary when calculating in cdns_dsi_adjust_phy_config()
602 static int cdns_dsi_check_conf(struct cdns_dsi *dsi, in cdns_dsi_check_conf() argument
607 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_check_conf()
613 ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); in cdns_dsi_check_conf()
621 ret = cdns_dsi_adjust_phy_config(dsi, dsi_cfg, phy_cfg, mode, mode_valid_check); in cdns_dsi_check_conf()
625 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); in cdns_dsi_check_conf()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/mediatek/ |
| D | mtk_dsi.c | 220 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument
222 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask()
224 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask()
227 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument
230 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000); in mtk_dsi_phy_timconfig()
231 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_phy_timconfig()
259 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig()
260 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig()
261 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig()
262 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
266 struct dw_mipi_dsi *slave; /* dual-dsi slave ptr */
274 static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) in dw_mipi_is_dual_mode() argument
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/tegra/ |
| D | dsi.c | 29 #include "dsi.h"
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs() local
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | dsi.c | 7 #define DSS_SUBSYS_NAME "DSI"
47 /* DSI Protocol Engine */
111 #define REG_GET(dsi, idx, start, end) \ argument
112 FLD_GET(dsi_read_reg(dsi, idx), start, end)
114 #define REG_FLD_MOD(dsi, idx, val, start, end) \ argument
115 dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
207 static int dsi_display_init_dispc(struct dsi_data *dsi);
208 static void dsi_display_uninit_dispc(struct dsi_data *dsi);
210 static int dsi_vc_send_null(struct dsi_data *dsi, int channel);
212 /* DSI PLL HSDIV indices */
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/exynos/ |
| D | exynos_drm_dsi.c | 3 * Samsung SoC MIPI DSI Master driver.
321 static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, in exynos_dsi_write() argument
325 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_write()
328 static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) in exynos_dsi_read() argument
330 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_read()
510 { .compatible = "samsung,exynos3250-mipi-dsi",
512 { .compatible = "samsung,exynos4210-mipi-dsi",
514 { .compatible = "samsung,exynos5410-mipi-dsi",
516 { .compatible = "samsung,exynos5422-mipi-dsi",
518 { .compatible = "samsung,exynos5433-mipi-dsi",
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/ |
| D | drm_mipi_dsi.c | 2 * MIPI DSI Bus
41 * DOC: dsi helpers
43 * These functions contain some common logic and helpers to deal with MIPI DSI
46 * Helpers are provided for a number of standard MIPI DSI command as well as a
52 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local
58 /* compare DSI device and driver names */ in mipi_dsi_device_match()
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
67 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_uevent() local
75 dsi->name); in mipi_dsi_uevent()
92 .name = "mipi-dsi",
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/rockchip/ |
| D | dw-mipi-dsi-rockchip.c | 310 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
312 writel(val, dsi->base + reg); in dsi_write()
315 static inline u32 dsi_read(struct dw_mipi_dsi_rockchip *dsi, u32 reg) in dsi_read() argument
317 return readl(dsi->base + reg); in dsi_read()
320 static inline void dsi_set(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 mask) in dsi_set() argument
322 dsi_write(dsi, reg, dsi_read(dsi, reg) | mask); in dsi_set()
325 static inline void dsi_update_bits(struct dw_mipi_dsi_rockchip *dsi, u32 reg, in dsi_update_bits() argument
328 dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val); in dsi_update_bits()
331 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi_rockchip *dsi, in dw_mipi_dsi_phy_write() argument
340 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 291 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument
293 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort()
297 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument
299 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit()
304 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument
308 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion()
314 static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, in sun6i_dsi_inst_setup() argument
321 regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), in sun6i_dsi_inst_setup()
329 static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, in sun6i_dsi_inst_init() argument
334 sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, in sun6i_dsi_inst_init()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/panel/ |
| D | panel-asus-z00t-tm5p5-n35596.c | 16 struct mipi_dsi_device *dsi; member
27 #define dsi_generic_write_seq(dsi, seq...) do { \ argument
30 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
35 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
38 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
55 struct mipi_dsi_device *dsi = ctx->dsi; in tm5p5_nt35596_on() local
57 dsi_generic_write_seq(dsi, 0xff, 0x05); in tm5p5_nt35596_on()
58 dsi_generic_write_seq(dsi, 0xfb, 0x01); in tm5p5_nt35596_on()
59 dsi_generic_write_seq(dsi, 0xc5, 0x31); in tm5p5_nt35596_on()
60 dsi_generic_write_seq(dsi, 0xff, 0x04); in tm5p5_nt35596_on()
[all …]
|
| D | panel-jdi-lt070me05000.c | 35 struct mipi_dsi_device *dsi; member
57 struct mipi_dsi_device *dsi = jdi->dsi; in jdi_panel_init() local
58 struct device *dev = &jdi->dsi->dev; in jdi_panel_init()
61 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in jdi_panel_init()
63 ret = mipi_dsi_dcs_soft_reset(dsi); in jdi_panel_init()
69 ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT << 4); in jdi_panel_init()
75 ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); in jdi_panel_init()
81 ret = mipi_dsi_dcs_set_page_address(dsi, 0, jdi->mode->vdisplay - 1); in jdi_panel_init()
93 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, in jdi_panel_init()
101 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_POWER_SAVE, in jdi_panel_init()
[all …]
|
| D | panel-elida-kd35t133.c | 3 * Elida kd35t133 5.5" MIPI-DSI panel driver
8 * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
26 /* Manufacturer specific Commands send via DSI */
53 #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ argument
56 ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
63 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in kd35t133_init_sequence() local
70 dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA, in kd35t133_init_sequence()
73 dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA, in kd35t133_init_sequence()
76 dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17); in kd35t133_init_sequence()
77 dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41); in kd35t133_init_sequence()
[all …]
|
| D | panel-samsung-s6e88a0-ams452ef01.c | 18 struct mipi_dsi_device *dsi; member
31 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
34 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
51 struct mipi_dsi_device *dsi = ctx->dsi; in s6e88a0_ams452ef01_on() local
52 struct device *dev = &dsi->dev; in s6e88a0_ams452ef01_on()
55 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in s6e88a0_ams452ef01_on()
57 dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands in s6e88a0_ams452ef01_on()
58 dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity in s6e88a0_ams452ef01_on()
60 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in s6e88a0_ams452ef01_on()
68 dsi_dcs_write_seq(dsi, 0xca, in s6e88a0_ams452ef01_on()
[all …]
|
| D | panel-xinpeng-xpp055c272.c | 3 * Xinpeng xpp055c272 5.5" MIPI-DSI panel driver
8 * Rockteck jh057n00900 5.5" MIPI-DSI panel driver
26 /* Manufacturer specific Commands send via DSI */
63 #define dsi_generic_write_seq(dsi, cmd, seq...) do { \ argument
66 ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
73 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in xpp055c272_init_sequence() local
80 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83); in xpp055c272_init_sequence()
81 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI, in xpp055c272_init_sequence()
86 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25); in xpp055c272_init_sequence()
87 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00); in xpp055c272_init_sequence()
[all …]
|
| D | panel-sharp-ls043t1le01.c | 25 struct mipi_dsi_device *dsi; member
43 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_init() local
46 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in sharp_nt_panel_init()
48 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in sharp_nt_panel_init()
55 ret = mipi_dsi_dcs_write(dsi, 0xae, (u8[]){ 0x03 }, 1); in sharp_nt_panel_init()
60 ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT | in sharp_nt_panel_init()
70 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_on() local
73 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in sharp_nt_panel_on()
75 ret = mipi_dsi_dcs_set_display_on(dsi); in sharp_nt_panel_on()
84 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_off() local
[all …]
|
| D | panel-samsung-s6e63m0-dsi.c | 3 * DSI interface to the Samsung S6E63M0 panel.
21 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in s6e63m0_dsi_dcs_read() local
24 ret = mipi_dsi_dcs_read(dsi, cmd, data, 1); in s6e63m0_dsi_dcs_read()
30 dev_info(dev, "DSI read CMD %02x = %02x\n", cmd, *data); in s6e63m0_dsi_dcs_read()
37 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in s6e63m0_dsi_dcs_write() local
45 dev_info(dev, "DSI writing dcs seq: %*ph\n", (int)len, data); in s6e63m0_dsi_dcs_write()
57 ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk); in s6e63m0_dsi_dcs_write()
69 ret = mipi_dsi_dcs_write(dsi, MCS_GLOBAL_PARAM, &cmdwritten, 1); in s6e63m0_dsi_dcs_write()
75 ret = mipi_dsi_dcs_write(dsi, cmd, seqp, chunk); in s6e63m0_dsi_dcs_write()
90 static int s6e63m0_dsi_probe(struct mipi_dsi_device *dsi) in s6e63m0_dsi_probe() argument
[all …]
|
| D | panel-sitronix-st7703.c | 5 * - Rocktech jh057n00900 5.5" MIPI-DSI panel
28 /* Manufacturer specific Commands send via DSI */
76 #define dsi_generic_write_seq(dsi, seq...) do { \ argument
79 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
86 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in jh057n_init_sequence() local
93 dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC, in jh057n_init_sequence()
95 dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF, in jh057n_init_sequence()
98 dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR, in jh057n_init_sequence()
101 dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); in jh057n_init_sequence()
102 dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); in jh057n_init_sequence()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/stm/ |
| D | dw_mipi_dsi-stm.c | 25 /* DSI digital registers & bit definitions */
29 /* DSI wrapper registers & bit definitions */
32 #define WCFGR_DSIM BIT(0) /* DSI Mode */
36 #define WCR_DSIEN BIT(3) /* DSI ENable */
60 /* dsi color format coding according to the datasheet */
80 struct dw_mipi_dsi *dsi; member
87 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
89 writel(val, dsi->base + reg); in dsi_write()
92 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
94 return readl(dsi->base + reg); in dsi_read()
[all …]
|
| /Linux-v5.10/include/drm/ |
| D | drm_mipi_dsi.h | 3 * MIPI DSI Bus
24 * struct mipi_dsi_msg - read/write DSI buffer
49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
67 * struct mipi_dsi_host_ops - DSI bus operations
68 * @attach: attach DSI device to DSI host
69 * @detach: detach DSI device from DSI host
70 * @transfer: transmit a DSI packet
72 * DSI packets transmitted by .transfer() are passed in as mipi_dsi_msg
80 * Note that typically DSI packet transmission is atomic, so the .transfer()
86 struct mipi_dsi_device *dsi);
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/vc4/ |
| D | vc4_dsi.c | 9 * BCM2835 contains two DSI modules, DSI0 and DSI1. DSI0 is a
10 * single-lane DSI controller, while DSI1 is a more modern 4-lane DSI
496 /* General DSI hardware state. */
515 /* DSI channel for the panel we're connected to. */
522 /* Input clock from CPRMAN to the digital PHY, for the DSI
527 /* Input clock to the analog PHY, used to generate the DSI bit
532 /* HS Clocks generated within the DSI analog PHY. */
551 dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) in dsi_dma_workaround_write() argument
553 struct dma_chan *chan = dsi->reg_dma_chan; in dsi_dma_workaround_write()
560 writel(val, dsi->regs + offset); in dsi_dma_workaround_write()
[all …]
|
| /Linux-v5.10/Documentation/devicetree/bindings/display/ |
| D | mipi-dsi-bus.txt | 1 MIPI DSI (Display Serial Interface) busses
6 define the syntax used to represent a DSI bus in a device tree.
8 This document describes DSI bus-specific properties only or defines existing
9 standard properties in the context of the DSI bus.
11 Each DSI host provides a DSI bus. The DSI host controller's node contains a
15 The following assumes that only a single peripheral is connected to a DSI
18 DSI host
22 a DSI host, the following properties apply to a node representing a DSI host.
26 bus. DSI peripherals are addressed using a 2-bit virtual channel number, so
34 conjunction with another DSI host to drive the same peripheral. Hardware
[all …]
|
| /Linux-v5.10/Documentation/devicetree/bindings/display/msm/ |
| D | dsi.txt | 1 Qualcomm Technologies Inc. adreno/snapdragon DSI output
3 DSI Controller:
6 * "qcom,mdss-dsi-ctrl"
10 - interrupts: The interrupt signal from the DSI block.
27 by a DSI PHY block. See [1] for details on clock bindings.
31 - phys: phandle to DSI PHY device node
34 - ports: Contains 2 DSI controller ports as child nodes. Each port contains
38 - panel@0: Node of panel connected to this DSI controller.
40 - qcom,dual-dsi-mode: Boolean value indicating if the DSI controller is
41 driving a panel which needs 2 DSI links.
[all …]
|
| /Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dsi.c | 3 * linux/drivers/video/omap2/dss/dsi.c
9 #define DSS_SUBSYS_NAME "DSI"
46 /* DSI Protocol Engine */
212 /* DSI PLL HSDIV indices */
434 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_write_reg() local
438 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
439 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
450 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_read_reg() local
454 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
[all …]
|
| /Linux-v5.10/drivers/gpu/drm/bridge/adv7511/ |
| D | adv7533.c | 29 struct mipi_dsi_device *dsi = adv->dsi; in adv7511_dsi_config_timing_gen() local
43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
68 struct mipi_dsi_device *dsi = adv->dsi; in adv7533_dsi_power_on() local
73 /* set number of dsi lanes */ in adv7533_dsi_power_on()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
105 struct mipi_dsi_device *dsi = adv->dsi; in adv7533_mode_set() local
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
117 mipi_dsi_detach(dsi); in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
119 ret = mipi_dsi_attach(dsi); in adv7533_mode_set()
[all …]
|
