Searched full:clk_top_apll12_ck_div0 (Results 1 – 8 of 8) sorted by relevance
| /Linux-v6.1/include/dt-bindings/clock/ |
| D | mt8516-clk.h | 196 #define CLK_TOP_APLL12_CK_DIV0 164 macro
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| D | mediatek,mt8365-clk.h | 122 #define CLK_TOP_APLL12_CK_DIV0 112 macro
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| D | mt8186-clk.h | 150 #define CLK_TOP_APLL12_CK_DIV0 131 macro
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| /Linux-v6.1/Documentation/devicetree/bindings/sound/ |
| D | mt8186-afe-pcm.yaml | 141 <&topckgen 131>, //CLK_TOP_APLL12_CK_DIV0
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| /Linux-v6.1/drivers/clk/mediatek/ |
| D | clk-mt8186-topckgen.c | 675 DIV_GATE(CLK_TOP_APLL12_CK_DIV0, "apll12_div0", "apll_i2s0_mck_sel",
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| D | clk-mt8516.c | 478 DIV_ADJ(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "aud_i2s0_m_sel",
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| D | clk-mt8167.c | 668 DIV_ADJ(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "aud_i2s0_m_sel",
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| D | clk-mt8365.c | 561 DIV_ADJ_F(CLK_TOP_APLL12_CK_DIV0, "apll12_ck_div0", "apll_i2s0_sel",
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