Searched +full:0 +full:x7fef000 (Results 1 – 4 of 4) sorted by relevance
66 const: 0x104c71 - const: 0xb00d73 - const: 0xb00f75 - const: 0xb010111 reg = <0x00 0x02900000 0x00 0x1000>,112 <0x00 0x02907000 0x00 0x400>,113 <0x00 0x0d000000 0x00 0x00800000>,114 <0x00 0x10000000 0x00 0x00001000>;116 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>;125 bus-range = <0x0 0xf>;[all …]
14 #clock-cells = <0>;16 clock-frequency = <0>;20 #clock-cells = <0>;22 clock-frequency = <0>;29 reg = <0x0 0x70000000 0x0 0x800000>;32 ranges = <0x0 0x0 0x70000000 0x800000>;34 atf-sram@0 {35 reg = <0x0 0x20000>;41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */44 ranges = <0x0 0x0 0x00100000 0x1c000>;[all …]
10 #clock-cells = <0>;18 reg = <0x00 0x70000000 0x00 0x100000>;21 ranges = <0x00 0x00 0x70000000 0x100000>;23 atf-sram@0 {24 reg = <0x00 0x20000>;30 reg = <0x00 0x00100000 0x00 0x1c000>;33 ranges = <0x00 0x00 0x00100000 0x1c000>;38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */39 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */45 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */[all …]
13 #clock-cells = <0>;15 clock-frequency = <0>;22 reg = <0x00 0x70000000 0x00 0x200000>;25 ranges = <0x0 0x00 0x70000000 0x200000>;28 reg = <0x1c0000 0x20000>;32 reg = <0x1e0000 0x1c000>;36 reg = <0x1fc000 0x4000>;42 reg = <0x0 0x43000000 0x0 0x20000>;45 ranges = <0x0 0x0 0x43000000 0x20000>;50 mux-reg-masks = <0x4080 0x3>; /* SERDES0 lane0 select */[all …]