Searched +full:0 +full:x54006800 (Results 1 – 9 of 9) sorted by relevance
/Linux-v5.10/Documentation/devicetree/bindings/serial/ |
D | socionext,uniphier-uart.yaml | 45 reg = <0x54006800 0x40>; 46 interrupts = <0 33 4>;
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/Linux-v5.10/arch/arm/boot/dts/ |
D | uniphier-sld8.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 36 #clock-cells = <0>; 41 #clock-cells = <0>; 56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 57 <0x506c0000 0x400>; 58 interrupts = <0 174 4>, <0 175 4>; 69 reg = <0x54006000 0x100>; 71 #size-cells = <0>; [all …]
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D | uniphier-ld4.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 36 #clock-cells = <0>; 41 #clock-cells = <0>; 56 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 57 <0x506c0000 0x400>; 58 interrupts = <0 174 4>, <0 175 4>; 69 reg = <0x54006000 0x100>; 71 #size-cells = <0>; [all …]
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D | uniphier-pro4.dtsi | 17 #size-cells = <0>; 19 cpu@0 { 22 reg = <0>; 44 #clock-cells = <0>; 49 #clock-cells = <0>; 64 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 65 <0x506c0000 0x400>; 66 interrupts = <0 174 4>, <0 175 4>; 77 reg = <0x54006000 0x100>; 79 #size-cells = <0>; [all …]
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D | uniphier-pro5.dtsi | 15 #size-cells = <0>; 17 cpu@0 { 20 reg = <0>; 116 #clock-cells = <0>; 121 #clock-cells = <0>; 136 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, 137 <0x506c0000 0x400>; 138 interrupts = <0 190 4>, <0 191 4>; 149 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>, 150 <0x506c8000 0x400>; [all …]
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D | uniphier-pxs2.dtsi | 18 #size-cells = <0>; 20 cpu0: cpu@0 { 23 reg = <0>; 111 #clock-cells = <0>; 116 #clock-cells = <0>; 162 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, 163 <0x506c0000 0x400>; 164 interrupts = <0 174 4>, <0 175 4>, <0 190 4>, <0 191 4>; 175 reg = <0x54006000 0x100>; 177 #size-cells = <0>; [all …]
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/Linux-v5.10/arch/arm64/boot/dts/socionext/ |
D | uniphier-ld11.dtsi | 19 #size-cells = <0>; 32 cpu0: cpu@0 { 35 reg = <0 0x000>; 44 reg = <0 0x001>; 93 #clock-cells = <0>; 117 reg = <0x0 0x81000000 0x0 0x01000000>; 122 soc@0 { 126 ranges = <0 0 0 0xffffffff>; 131 reg = <0x54006000 0x100>; 133 #size-cells = <0>; [all …]
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D | uniphier-pxs3.dtsi | 20 #size-cells = <0>; 39 cpu0: cpu@0 { 42 reg = <0 0x000>; 52 reg = <0 0x001>; 62 reg = <0 0x002>; 72 reg = <0 0x003>; 126 #clock-cells = <0>; 181 reg = <0x0 0x81000000 0x0 0x01000000>; 186 soc@0 { 190 ranges = <0 0 0 0xffffffff>; [all …]
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D | uniphier-ld20.dtsi | 20 #size-cells = <0>; 42 cpu0: cpu@0 { 45 reg = <0 0x000>; 55 reg = <0 0x001>; 65 reg = <0 0x100>; 75 reg = <0 0x101>; 167 #clock-cells = <0>; 222 reg = <0x0 0x81000000 0x0 0x01000000>; 227 soc@0 { 231 ranges = <0 0 0 0xffffffff>; [all …]
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