Lines Matching +full:0 +full:x54006800
20 #size-cells = <0>;
42 cpu0: cpu@0 {
45 reg = <0 0x000>;
55 reg = <0 0x001>;
65 reg = <0 0x100>;
75 reg = <0 0x101>;
167 #clock-cells = <0>;
222 reg = <0x0 0x81000000 0x0 0x01000000>;
227 soc@0 {
231 ranges = <0 0 0 0xffffffff>;
236 reg = <0x54006000 0x100>;
238 #size-cells = <0>;
239 interrupts = <0 39 4>;
241 pinctrl-0 = <&pinctrl_spi0>;
249 reg = <0x54006100 0x100>;
251 #size-cells = <0>;
252 interrupts = <0 216 4>;
254 pinctrl-0 = <&pinctrl_spi1>;
262 reg = <0x54006200 0x100>;
264 #size-cells = <0>;
265 interrupts = <0 229 4>;
267 pinctrl-0 = <&pinctrl_spi2>;
275 reg = <0x54006300 0x100>;
277 #size-cells = <0>;
278 interrupts = <0 230 4>;
280 pinctrl-0 = <&pinctrl_spi3>;
288 reg = <0x54006800 0x40>;
289 interrupts = <0 33 4>;
291 pinctrl-0 = <&pinctrl_uart0>;
292 clocks = <&peri_clk 0>;
293 resets = <&peri_rst 0>;
299 reg = <0x54006900 0x40>;
300 interrupts = <0 35 4>;
302 pinctrl-0 = <&pinctrl_uart1>;
310 reg = <0x54006a00 0x40>;
311 interrupts = <0 37 4>;
313 pinctrl-0 = <&pinctrl_uart2>;
321 reg = <0x54006b00 0x40>;
322 interrupts = <0 177 4>;
324 pinctrl-0 = <&pinctrl_uart3>;
331 reg = <0x55000000 0x200>;
337 gpio-ranges = <&pinctrl 0 0 0>,
338 <&pinctrl 96 0 0>,
339 <&pinctrl 160 0 0>;
344 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
350 reg = <0x56000000 0x80000>;
351 interrupts = <0 144 4>;
353 pinctrl-0 = <&pinctrl_aout1>,
362 i2s_port0: port@0 {
414 reg = <0x57900000 0x1000>;
418 resets = <&sys_rst 41>, <&sys_rst 42>, <&adamv_rst 0>;
421 port@0 {
437 reg = <0x57920000 0x1000>;
448 reg = <0x58780000 0x80>;
450 #size-cells = <0>;
451 interrupts = <0 41 4>;
453 pinctrl-0 = <&pinctrl_i2c0>;
462 reg = <0x58781000 0x80>;
464 #size-cells = <0>;
465 interrupts = <0 42 4>;
467 pinctrl-0 = <&pinctrl_i2c1>;
475 reg = <0x58782000 0x80>;
477 #size-cells = <0>;
478 interrupts = <0 43 4>;
487 reg = <0x58783000 0x80>;
489 #size-cells = <0>;
490 interrupts = <0 44 4>;
492 pinctrl-0 = <&pinctrl_i2c3>;
501 reg = <0x58784000 0x80>;
503 #size-cells = <0>;
504 interrupts = <0 45 4>;
506 pinctrl-0 = <&pinctrl_i2c4>;
514 reg = <0x58785000 0x80>;
516 #size-cells = <0>;
517 interrupts = <0 25 4>;
526 reg = <0x58c00000 0x400>;
530 pinctrl-0 = <&pinctrl_system_bus>;
535 reg = <0x59801000 0x400>;
541 reg = <0x59810000 0x400>;
557 reg = <0x59820000 0x200>;
572 reg = <0x5a000000 0x400>;
573 interrupts = <0 78 4>;
575 pinctrl-0 = <&pinctrl_emmc>;
592 reg = <0x5a400000 0x800>;
593 interrupts = <0 76 4>;
595 pinctrl-0 = <&pinctrl_sd>;
596 clocks = <&sd_clk 0>;
598 resets = <&sd_rst 0>;
606 reg = <0x5f800000 0x2000>;
618 ranges = <0 0x5f900000 0x2000>;
622 reg = <0x100 0x28>;
627 reg = <0x200 0x68>;
633 reg = <0x54 1>;
637 reg = <0x55 1>;
641 reg = <0x58 1>;
645 reg = <0x59 1>;
648 usb_sel_t0: trim@54,0 {
649 reg = <0x54 1>;
650 bits = <0 4>;
652 usb_sel_t1: trim@55,0 {
653 reg = <0x55 1>;
654 bits = <0 4>;
656 usb_sel_t2: trim@58,0 {
657 reg = <0x58 1>;
658 bits = <0 4>;
660 usb_sel_t3: trim@59,0 {
661 reg = <0x59 1>;
662 bits = <0 4>;
664 usb_hs_i0: trim@56,0 {
665 reg = <0x56 1>;
666 bits = <0 4>;
668 usb_hs_i2: trim@5a,0 {
669 reg = <0x5a 1>;
670 bits = <0 4>;
677 reg = <0x5fc10000 0x5300>;
678 interrupts = <0 188 4>;
685 reg = <0x5fc20000 0x200>;
692 reg = <0x5fe00000 0x10000>, /* GICD */
693 <0x5fe80000 0x80000>; /* GICR */
702 reg = <0x61840000 0x10000>;
720 interrupts = <0 3 4>;
721 #thermal-sensor-cells = <0>;
722 socionext,tmod-calibration = <0x0f22 0x68ee>;
729 reg = <0x65000000 0x8500>;
730 interrupts = <0 66 4>;
732 pinctrl-0 = <&pinctrl_ether_rgmii>;
739 socionext,syscon-phy-mode = <&soc_glue 0>;
743 #size-cells = <0>;
750 reg = <0x65a00000 0xcd00>;
752 interrupts = <0 134 4>;
754 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb1>,
770 ranges = <0 0x65b00000 0x400>;
772 usb_rst: reset@0 {
774 reg = <0x0 0x4>;
784 reg = <0x100 0x10>;
793 reg = <0x110 0x10>;
802 reg = <0x120 0x10>;
811 reg = <0x130 0x10>;
820 reg = <0x200 0x10>;
821 #phy-cells = <0>;
834 reg = <0x210 0x10>;
835 #phy-cells = <0>;
848 reg = <0x220 0x10>;
849 #phy-cells = <0>;
862 reg = <0x230 0x10>;
863 #phy-cells = <0>;
876 reg = <0x300 0x10>;
877 #phy-cells = <0>;
887 reg = <0x310 0x10>;
888 #phy-cells = <0>;
901 reg = <0x66000000 0x1000>, <0x66010000 0x10000>,
902 <0x2fff0000 0x10000>;
909 bus-range = <0x0 0xff>;
913 <0x81000000 0 0x00000000 0x2ffe0000 0 0x00010000>,
915 <0x82000000 0 0x20000000 0x20000000 0 0x0ffe0000>;
918 interrupts = <0 224 4>, <0 225 4>;
919 interrupt-map-mask = <0 0 0 7>;
920 interrupt-map = <0 0 0 1 &pcie_intc 0>, /* INTA */
921 <0 0 0 2 &pcie_intc 1>, /* INTB */
922 <0 0 0 3 &pcie_intc 2>, /* INTC */
923 <0 0 0 4 &pcie_intc 3>; /* INTD */
931 interrupts = <0 226 4>;
937 reg = <0x66038000 0x4000>;
938 #phy-cells = <0>;
950 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
952 #size-cells = <0>;
953 interrupts = <0 65 4>;
955 pinctrl-0 = <&pinctrl_nand>;