/Linux-v5.15/Documentation/devicetree/bindings/pci/ |
D | faraday,ftpci100.yaml | 18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday 19 Technology) and product ID 0x4321. 34 interrupt-map-mask = <0xf800 0 0 7>; 36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */ 37 <0x4800 0 0 2 &pci_intc 1>, 38 <0x4800 0 0 3 &pci_intc 2>, 39 <0x4800 0 0 4 &pci_intc 3>, 40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */ 41 <0x5000 0 0 2 &pci_intc 2>, 42 <0x5000 0 0 3 &pci_intc 3>, [all …]
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D | v3-v360epc-pci.txt | 18 each be exactly 256MB (0x10000000) in size. 38 reg = <0x62000000 0x10000>, <0x61000000 0x01000000>; 42 bus-range = <0x00 0xff>; 43 ranges = 0x01000000 0 0x00000000 /* I/O space @00000000 */ 44 0x60000000 0 0x01000000 /* 16 MiB @ LB 60000000 */ 45 0x02000000 0 0x40000000 /* non-prefectable memory @40000000 */ 46 0x40000000 0 0x10000000 /* 256 MiB @ LB 40000000 1:1 */ 47 0x42000000 0 0x50000000 /* prefetchable memory @50000000 */ 48 0x50000000 0 0x10000000>; /* 256 MiB @ LB 50000000 1:1 */ 49 dma-ranges = <0x02000000 0 0x20000000 /* EBI memory space */ [all …]
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/Linux-v5.15/drivers/media/i2c/ |
D | sony-btf-mpx.c | 21 MODULE_PARM_DESC(debug, "debug level 0=off(default) 1=on"); 29 * IF/MPX address: 0x42/0x40 0x43/0x44 52 buffer[0] = dev; in mpx_write() 54 buffer[2] = addr & 0xff; in mpx_write() 56 buffer[4] = val & 0xff; in mpx_write() 58 msg.flags = 0; in mpx_write() 62 return 0; in mpx_write() 97 * For Asia, replace the 0x26XX in FM_PRESCALE with 0x14XX. 102 * 0x01 MAIN SUB 103 * 0x03 MAIN MAIN [all …]
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/Linux-v5.15/arch/arm/boot/dts/ |
D | gemini-wbd111.dts | 17 memory@0 { 20 reg = <0x00000000 0x8000000>; 76 #size-cells = <0>; 88 reg = <0x30000000 0x00800000>; 90 partition@0 { 92 reg = <0x00000000 0x00020000>; 97 reg = <0x00020000 0x00100000>; 101 reg = <0x00120000 0x006a0000>; 105 reg = <0x007c0000 0x00010000>; 110 reg = <0x007d0000 0x00010000>; [all …]
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D | gemini-wbd222.dts | 17 memory@0 { /* 128 MB */ 19 reg = <0x00000000 0x8000000>; 75 #size-cells = <0>; 92 reg = <0x30000000 0x00800000>; 94 partition@0 { 96 reg = <0x00000000 0x00020000>; 101 reg = <0x00020000 0x00100000>; 105 reg = <0x00120000 0x006a0000>; 109 reg = <0x007c0000 0x00010000>; 114 reg = <0x007d0000 0x00010000>; [all …]
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D | gemini-sq201.dts | 17 memory@0 { /* 128 MB */ 19 reg = <0x00000000 0x8000000>; 62 #size-cells = <0>; 73 #size-cells = <0>; 81 switch@0 { 83 reg = <0>; 91 #size-cells = <0>; 93 port@0 { 94 reg = <0>; 129 pinctrl-0 = <&pflash_default_pins>; [all …]
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D | gemini-sl93512r.dts | 20 memory@0 { 23 reg = <0x00000000 0x4000000>; 40 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 77 #size-cells = <0>; 88 #size-cells = <0>; 96 switch@0 { 98 reg = <0>; 106 #size-cells = <0>; 108 port@0 { 109 reg = <0>; [all …]
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D | integratorap.dts | 17 #size-cells = <0>; 19 cpu@0 { 28 reg = <0>; 37 operating-points = <71000 0 38 66000 0 39 60000 0 40 48000 0 41 36000 0 42 24000 0 43 12000 0>; [all …]
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D | gemini-dlink-dir-685.dts | 16 memory@0 { 19 reg = <0x00000000 0x8000000>; 35 /* Collides with LPC_LAD[0], UART DCD, SSP 97RST */ 61 #size-cells = <0>; 70 panel: display@0 { 72 reg = <0>; 130 gpio-fan,speed-map = <0 0>, <10000 1>; 178 #size-cells = <0>; 182 reg = <0x26>; 203 #address-cells = <0>; [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/security/tpm/ |
D | tpm_tis_mmio.txt | 15 - reg: The location of the MMIO registers, should be at least 0x5000 bytes 22 reg = <0x90000 0x5000>;
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/Linux-v5.15/Documentation/devicetree/bindings/powerpc/fsl/ |
D | pamu.txt | 12 "fsl,pamu-v1.0". The second is "fsl,pamu". 18 PAMU v1.0, on an SOC that has five PAMU devices, the size 19 is 0x5000. 56 For PAMU v1.0, this size is 0x1000. 95 compatible = "fsl,pamu-v1.0", "fsl,pamu"; 96 reg = <0x20000 0x5000>; 97 ranges = <0 0x20000 0x5000>; 98 fsl,portid-mapping = <0xf80000>; 102 24 2 0 0 105 pamu0: pamu@0 { [all …]
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/Linux-v5.15/drivers/of/unittest-data/ |
D | tests-interrupts.dtsi | 25 #address-cells = <0>; 34 interrupt-map = <0x5000 1 2 &test_intc0 15>; 48 reg = <0x5000 0x100>;
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/Linux-v5.15/include/linux/mdio/ |
D | mdio-xgene.h | 11 #define BLOCK_XG_MDIO_CSR_OFFSET 0x5000 12 #define BLOCK_DIAG_CSR_OFFSET 0xd000 13 #define XGENET_CONFIG_REG_ADDR 0x20 15 #define MAC_ADDR_REG_OFFSET 0x00 16 #define MAC_COMMAND_REG_OFFSET 0x04 17 #define MAC_WRITE_REG_OFFSET 0x08 18 #define MAC_READ_REG_OFFSET 0x0c 19 #define MAC_COMMAND_DONE_REG_OFFSET 0x10 21 #define CLKEN_OFFSET 0x08 22 #define SRST_OFFSET 0x00 [all …]
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/Linux-v5.15/drivers/net/ethernet/dec/tulip/ |
D | 21142.c | 21 static u16 t21142_csr13[] = { 0x0001, 0x0009, 0x0009, 0x0000, 0x0001, }; 22 u16 t21142_csr14[] = { 0xFFFF, 0x0705, 0x0705, 0x0000, 0x7F3D, }; 23 static u16 t21142_csr15[] = { 0x0008, 0x0006, 0x000E, 0x0008, 0x0008, }; 36 int new_csr6 = 0; in t21142_media_task() 40 if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000) in t21142_media_task() 46 if (tulip_check_duplex(dev) < 0) { in t21142_media_task() 70 } else if ((csr12 & 0x7000) != 0x5000) { in t21142_media_task() 77 new_csr6 = 0x82420000; in t21142_media_task() 78 dev->if_port = 0; in t21142_media_task() 79 iowrite32(0, ioaddr + CSR13); in t21142_media_task() [all …]
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/Linux-v5.15/arch/powerpc/platforms/52xx/ |
D | mpc52xx_sleep.S | 14 ori r7, r7, 0x8000 /* EE */ 18 li r10, 0 /* flag that irq handler sets */ 21 lwz r8, 0x14(r6) /* intr->main_mask */ 22 ori r8, r8, 0x1 23 xori r8, r8, 0x1 24 stw r8, 0x14(r6) 28 li r8, 0x1 29 stw r8, 0x40(r6) /* intr->main_emulate */ 39 ori r10, r10, 0x2000 55 ori r10, r10, 0x2000 [all …]
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/Linux-v5.15/drivers/net/dsa/mv88e6xxx/ |
D | global1.h | 16 /* Offset 0x00: Switch Global Status Register */ 17 #define MV88E6XXX_G1_STS 0x00 18 #define MV88E6352_G1_STS_PPU_STATE 0x8000 19 #define MV88E6185_G1_STS_PPU_STATE_MASK 0xc000 20 #define MV88E6185_G1_STS_PPU_STATE_DISABLED_RST 0x0000 21 #define MV88E6185_G1_STS_PPU_STATE_INITIALIZING 0x4000 22 #define MV88E6185_G1_STS_PPU_STATE_DISABLED 0x8000 23 #define MV88E6185_G1_STS_PPU_STATE_POLLING 0xc000 24 #define MV88E6XXX_G1_STS_INIT_READY 0x0800 34 #define MV88E6XXX_G1_STS_IRQ_EEPROM_DONE 0 [all …]
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/Linux-v5.15/arch/arm/mach-ux500/ |
D | db8500-regs.h | 10 #define U8500_ESRAM_BASE 0x40000000 11 #define U8500_ESRAM_BANK_SIZE 0x00020000 21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 28 #define U8500_PER3_BASE 0x80000000 29 #define U8500_STM_BASE 0x80100000 30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 31 #define U8500_PER2_BASE 0x80110000 32 #define U8500_PER1_BASE 0x80120000 33 #define U8500_B2R2_BASE 0x80130000 34 #define U8500_HSEM_BASE 0x80140000 [all …]
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/Linux-v5.15/Documentation/devicetree/bindings/ata/ |
D | marvell.txt | 11 - phy-names : Should be "0", "1", etc, one number per phandle 17 reg = <0x80000 0x5000>; 20 phy-names = "0", "1";
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/Linux-v5.15/include/linux/qed/ |
D | iwarp_common.h | 16 #define IWARP_ACTIVE_MODE 0 19 #define IWARP_SHARED_QUEUE_PAGE_SIZE (0x8000) 20 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_OFFSET (0x4000) 21 #define IWARP_SHARED_QUEUE_PAGE_RQ_PBL_MAX_SIZE (0x1000) 22 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_OFFSET (0x5000) 23 #define IWARP_SHARED_QUEUE_PAGE_SQ_PBL_MAX_SIZE (0x3000)
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/Linux-v5.15/Documentation/devicetree/bindings/arm/ |
D | cci.txt | 141 #size-cells = <0>; 144 CPU0: cpu@0 { 148 reg = <0x0>; 155 reg = <0x1>; 162 reg = <0x100>; 169 reg = <0x101>; 177 reg = <0x0 0x3000000 0x0 0x1000>; 188 reg = <0x0 0x2c090000 0 0x1000>; 189 ranges = <0x0 0x0 0x2c090000 0x10000>; 194 reg = <0x1000 0x1000>; [all …]
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/Linux-v5.15/include/uapi/linux/ |
D | bpqether.h | 11 #define SIOCSBPQETHOPT (SIOCDEVPRIVATE+0) /* reserved */ 25 #define SIOCGBPQETHPARAM 0x5000 /* get Level 1 parameters */ 26 #define SIOCSBPQETHPARAM 0x5001 /* set */
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/Linux-v5.15/Documentation/devicetree/bindings/remoteproc/ |
D | mtk,scp.txt | 31 reg = <0 0x10500000 0 0x80000>, 32 <0 0x105c0000 0 0x5000>;
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/Linux-v5.15/drivers/bus/ |
D | omap_l3_smx.h | 14 #define L3_COMPONENT 0x000 15 #define L3_CORE 0x018 16 #define L3_AGENT_CONTROL 0x020 17 #define L3_AGENT_STATUS 0x028 18 #define L3_ERROR_LOG 0x058 23 #define L3_ERROR_LOG_ADDR 0x060 26 #define L3_SI_CONTROL 0x020 27 #define L3_SI_FLAG_STATUS_0 0x510 31 #define L3_STATUS_0_MPUIA_BRST (shift << 0) 95 #define L3_SI_FLAG_STATUS_1 0x530 [all …]
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/Linux-v5.15/arch/arc/boot/dts/ |
D | vdk_axc003.dtsi | 22 ranges = <0x00000000 0xf0000000 0x10000000>; 25 #clock-cells = <0>; 38 reg = <0x5000 0x100>; 52 reg = < 0xe0012000 0x200 >; 61 ranges = <0x00000000 0x80000000 0x40000000>; 63 reg = <0x80000000 0x20000000>; /* 512MiB */
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/Linux-v5.15/arch/arm/mach-ixp4xx/include/mach/ |
D | ixp4xx-regs.h | 23 * 0x00000000 0x10000000(max) PAGE_OFFSET System RAM 25 * 0x48000000 0x04000000 ioremap'd PCI Memory Space 27 * 0x50000000 0x10000000 ioremap'd EXP BUS 29 * 0xC8000000 0x00013000 0xFEF00000 On-Chip Peripherals 31 * 0xC0000000 0x00001000 0xFEF13000 PCI CFG 33 * 0xC4000000 0x00001000 0xFEF14000 EXP CFG 35 * 0x60000000 0x00004000 0xFEF15000 QMgr 41 #define IXP4XX_QMGR_BASE_PHYS 0x60000000 47 #define IXP4XX_PERIPHERAL_BASE_PHYS 0xC8000000 48 #define IXP4XX_PERIPHERAL_BASE_VIRT IOMEM(0xFEC00000) [all …]
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