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/Linux-v6.1/drivers/gpu/drm/i915/
Dvlv_suspend.c117 /* GAM 0x4000-0x4770 */ in vlv_save_gunit_s0ix_state()
124 for (i = 0; i < ARRAY_SIZE(s->lra_limits); i++) in vlv_save_gunit_s0ix_state()
137 /* MBC 0x9024-0x91D0, 0x8500 */ in vlv_save_gunit_s0ix_state()
142 /* GCP 0x9400-0x9424, 0x8100-0x810C */ in vlv_save_gunit_s0ix_state()
150 /* GPM 0xA000-0xAA84, 0x8000-0x80FC */ in vlv_save_gunit_s0ix_state()
162 /* Display CZ domain, 0x4400C-0x4402C, 0x4F000-0x4F11F */ in vlv_save_gunit_s0ix_state()
168 for (i = 0; i < ARRAY_SIZE(s->gt_scratch); i++) in vlv_save_gunit_s0ix_state()
171 /* GT SA CZ domain, 0x100000-0x138124 */ in vlv_save_gunit_s0ix_state()
178 /* Gunit-Display CZ domain, 0x182028-0x1821CF */ in vlv_save_gunit_s0ix_state()
186 * DFT, 0x9800-0x9EC0 in vlv_save_gunit_s0ix_state()
[all …]
Dintel_gvt_mmio_table.c24 } while (0)
35 } while (0)
54 #define RING_REG(base) _MMIO((base) + 0x28) in iterate_generic_mmio()
58 #define RING_REG(base) _MMIO((base) + 0x134) in iterate_generic_mmio()
62 #define RING_REG(base) _MMIO((base) + 0x6c) in iterate_generic_mmio()
65 MMIO_D(_MMIO(0x2148)); in iterate_generic_mmio()
67 MMIO_D(_MMIO(0x12198)); in iterate_generic_mmio()
76 #define RING_REG(base) _MMIO((base) + 0x29c) in iterate_generic_mmio()
88 MMIO_D(_MMIO(0x2124)); in iterate_generic_mmio()
89 MMIO_D(_MMIO(0x20dc)); in iterate_generic_mmio()
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Di915_reg.h105 * #define _FOO_A 0xf000
106 * #define _FOO_B 0xf001
110 * #define FOO_MODE_BAR REG_FIELD_PREP(FOO_MODE_MASK, 0)
114 * #define BAR _MMIO(0xb000)
115 * #define GEN8_BAR _MMIO(0xb888)
122 * numbers, pick the 0-based __index'th value.
129 * Given the arbitrary numbers in varargs, pick the 0-based __index'th number.
177 BUILD_BUG_ON_MSG(((mask) & 0xffff0000), "Incorrect mask"); \
179 BUILD_BUG_ON_MSG((value) & 0xffff0000, "Incorrect value"); \
185 #define _MASKED_BIT_DISABLE(a) (_MASKED_FIELD((a), 0))
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/Linux-v6.1/Documentation/devicetree/bindings/firmware/
Dnvidia,tegra186-bpmp.yaml134 reg = <0x03c00000 0xa0000>;
142 reg = <0x30000000 0x50000>;
145 ranges = <0x0 0x30000000 0x50000>;
148 reg = <0x4e000 0x1000>;
154 reg = <0x4f000 0x1000>;
179 #size-cells = <0>;
/Linux-v6.1/drivers/soc/tegra/cbb/
Dtegra234-cbb.c8 * Error types supported by CBB2.0 are:
31 #define FABRIC_EN_CFG_INTERRUPT_ENABLE_0_0 0x0
32 #define FABRIC_EN_CFG_STATUS_0_0 0x40
33 #define FABRIC_EN_CFG_ADDR_INDEX_0_0 0x60
34 #define FABRIC_EN_CFG_ADDR_LOW_0 0x80
35 #define FABRIC_EN_CFG_ADDR_HI_0 0x84
37 #define FABRIC_MN_MASTER_ERR_EN_0 0x200
38 #define FABRIC_MN_MASTER_ERR_FORCE_0 0x204
39 #define FABRIC_MN_MASTER_ERR_STATUS_0 0x208
40 #define FABRIC_MN_MASTER_ERR_OVERFLOW_STATUS_0 0x20c
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/Linux-v6.1/drivers/clk/qcom/
Dgcc-qcm2290.c46 { 500000000, 1250000000, 0 },
58 .offset = 0x0,
61 .enable_reg = 0x79000,
62 .enable_mask = BIT(0),
75 { 0x1, 2 },
80 .offset = 0x0,
95 .offset = 0x1000,
98 .enable_reg = 0x79000,
113 .l = 0x3c,
114 .alpha = 0x0,
[all …]
Dgcc-sm6115.c49 { 500000000, 1250000000, 0 },
57 .offset = 0x0,
62 .enable_reg = 0x79000,
63 .enable_mask = BIT(0),
76 { 0x1, 2 },
81 .offset = 0x0,
96 { 0x0, 1 },
101 .offset = 0x0,
117 .l = 0x3c,
118 .vco_val = 0x1 << 20,
[all …]
Dgcc-sm6375.c53 { 249600000, 2000000000, 0 },
57 { 595200000, 3600000000UL, 0 },
61 .offset = 0x0,
64 .enable_reg = 0x79000,
65 .enable_mask = BIT(0),
78 { 0x1, 2 },
83 .offset = 0x0,
100 { 0x3, 3 },
105 .offset = 0x0,
122 .offset = 0x1000,
[all …]
Dgcc-sm6125.c43 .offset = 0x0,
46 .enable_reg = 0x79000,
47 .enable_mask = BIT(0),
86 .offset = 0x3000,
89 .enable_reg = 0x79000,
103 .offset = 0x4000,
106 .enable_reg = 0x79000,
120 .offset = 0x5000,
123 .enable_reg = 0x79000,
137 .offset = 0x6000,
[all …]
Dgcc-msm8998.c29 { 250000000, 2000000000, 0 },
34 .offset = 0x0,
39 .enable_reg = 0x52000,
40 .enable_mask = BIT(0),
53 .offset = 0x0,
66 .offset = 0x0,
79 .offset = 0x0,
92 .offset = 0x0,
105 .offset = 0x1000,
110 .enable_reg = 0x52000,
[all …]
Dgcc-msm8916.c46 .l_reg = 0x21004,
47 .m_reg = 0x21008,
48 .n_reg = 0x2100c,
49 .config_reg = 0x21010,
50 .mode_reg = 0x21000,
51 .status_reg = 0x2101c,
64 .enable_reg = 0x45000,
65 .enable_mask = BIT(0),
77 .l_reg = 0x20004,
78 .m_reg = 0x20008,
[all …]
Dgcc-msm8996.c50 .offset = 0x00000,
53 .enable_reg = 0x52000,
54 .enable_mask = BIT(0),
80 .offset = 0x00000,
95 .enable_reg = 0x5200c,
96 .enable_mask = BIT(0),
112 .enable_reg = 0x5200c,
127 .offset = 0x77000,
130 .enable_reg = 0x52000,
144 .offset = 0x77000,
[all …]
Dgcc-msm8976.c56 .l_reg = 0x21004,
57 .m_reg = 0x21008,
58 .n_reg = 0x2100c,
59 .config_reg = 0x21014,
60 .mode_reg = 0x21000,
61 .status_reg = 0x2101c,
74 .enable_reg = 0x45000,
75 .enable_mask = BIT(0),
89 .l_reg = 0x4a004,
90 .m_reg = 0x4a008,
[all …]
Dgcc-msm8939.c54 .l_reg = 0x21004,
55 .m_reg = 0x21008,
56 .n_reg = 0x2100c,
57 .config_reg = 0x21010,
58 .mode_reg = 0x21000,
59 .status_reg = 0x2101c,
72 .enable_reg = 0x45000,
73 .enable_mask = BIT(0),
85 .l_reg = 0x20004,
86 .m_reg = 0x20008,
[all …]
Dgcc-msm8953.c41 .offset = 0x21000,
44 .enable_reg = 0x45000,
45 .enable_mask = BIT(0),
71 .offset = 0x21000,
84 .offset = 0x4a000,
87 .enable_reg = 0x45000,
101 .offset = 0x4a000,
114 { 1000000000, 2000000000, 0 },
119 .config_ctl_val = 0x4001055b,
120 .early_output_mask = 0,
[all …]
/Linux-v6.1/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x2200000 0x0 0x10000>,
28 <0x0 0x2210000 0x0 0x10000>;
44 reg = <0x0 0x02490000 0x0 0x10000>;
71 snps,burst-map = <0x7>;
78 reg = <0x0 0x2600000 0x0 0x210000>;
127 ranges = <0x02900000 0x0 0x02900000 0x200000>;
132 reg = <0x02930000 0x20000>;
134 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
[all …]
Dtegra194.dtsi20 bus@0 {
24 ranges = <0x0 0x0 0x0 0x40000000>;
28 reg = <0x00100000 0xf000>,
29 <0x0010f000 0x1000>;
35 reg = <0x2200000 0x10000>,
36 <0x2210000 0x10000>;
93 reg = <0x02300000 0x1000>;
103 reg = <0x2390000 0x1000>,
104 <0x23a0000 0x1000>,
105 <0x23b0000 0x1000>,
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtw88/
Drtw8822c.c21 #define IQK_DONE_8822C 0xaa
44 efuse->country_code[0] = map->country_code[0]; in rtw8822c_read_efuse()
47 efuse->regd = map->rf_board_option & 0x7; in rtw8822c_read_efuse()
52 efuse->power_track_type = (map->tx_pwr_calibrate_rate >> 4) & 0xf; in rtw8822c_read_efuse()
54 for (i = 0; i < 4; i++) in rtw8822c_read_efuse()
66 return 0; in rtw8822c_read_efuse()
96 u32 rf_addr[DACK_RF_8822C] = {0x8f}; in rtw8822c_dac_backup_reg()
97 u32 addrs[DACK_REG_8822C] = {0x180c, 0x1810, 0x410c, 0x4110, in rtw8822c_dac_backup_reg()
98 0x1c3c, 0x1c24, 0x1d70, 0x9b4, in rtw8822c_dac_backup_reg()
99 0x1a00, 0x1a14, 0x1d58, 0x1c38, in rtw8822c_dac_backup_reg()
[all …]
/Linux-v6.1/drivers/net/ethernet/chelsio/cxgb4/
Dt4_hw.c54 * at the time it indicated completion is stored there. Returns 0 if the
66 return 0; in t4_wait_op_done_val()
68 if (--attempts == 0) in t4_wait_op_done_val()
167 /* Reset ENABLE to 0 so reads of PCIE_CFG_SPACE_DATA won't cause a in t4_hw_pci_read_cfg4()
169 * ENABLE is 0 so a simple register write is easier than a in t4_hw_pci_read_cfg4()
172 t4_write_reg(adap, PCIE_CFG_SPACE_REQ_A, 0); in t4_hw_pci_read_cfg4()
247 log->cursor = 0; in t4_record_mbox()
249 for (i = 0; i < size / 8; i++) in t4_record_mbox()
252 entry->cmd[i++] = 0; in t4_record_mbox()
277 * The return value is 0 on success or a negative errno on failure. A
[all …]