Home
last modified time | relevance | path

Searched +full:0 +full:x1b00 (Results 1 – 25 of 59) sorted by relevance

123

/Linux-v5.15/Documentation/devicetree/bindings/arm/omap/
Dprm-inst.txt21 - #power-domain-cells: Should be 0 if the instance is a power domain provider.
28 reg = <0x1b00 0x40>;
29 #power-domain-cells = <0>;
/Linux-v5.15/drivers/net/ethernet/qualcomm/
Dqca_7k.h35 #define QCA7K_SPI_WRITE (0 << 15)
37 #define QCA7K_SPI_EXTERNAL (0 << 14)
41 #define QCASPI_HW_BUF_LEN 0xC5B
44 #define SPI_REG_BFR_SIZE 0x0100
45 #define SPI_REG_WRBUF_SPC_AVA 0x0200
46 #define SPI_REG_RDBUF_BYTE_AVA 0x0300
47 #define SPI_REG_SPI_CONFIG 0x0400
48 #define SPI_REG_SPI_STATUS 0x0500
49 #define SPI_REG_INTR_CAUSE 0x0C00
50 #define SPI_REG_INTR_ENABLE 0x0D00
[all …]
/Linux-v5.15/lib/
Dcrc16.c10 /** CRC table for the CRC-16. The poly is 0x8005 (x^16 + x^15 + x^2 + 1) */
12 0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
13 0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
14 0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
15 0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
16 0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
17 0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
18 0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
19 0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
20 0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml15 controllers on MediaTek SoCs, includes USB2.0, USB3.0, PCIe and SATA.
22 shared 0x0000 SPLLC
23 0x0100 FMREG
24 u2 port0 0x0800 U2PHY_COM
25 u3 port0 0x0900 U3PHYD
26 0x0a00 U3PHYD_BANK2
27 0x0b00 U3PHYA
28 0x0c00 U3PHYA_DA
29 u2 port1 0x1000 U2PHY_COM
30 u3 port1 0x1100 U3PHYD
[all …]
/Linux-v5.15/arch/arm/mach-omap2/
Dprm54xx.h24 #define OMAP54XX_PRM_BASE 0x4ae06000
31 #define OMAP54XX_PRM_OCP_SOCKET_INST 0x0000
32 #define OMAP54XX_PRM_CKGEN_INST 0x0100
33 #define OMAP54XX_PRM_MPU_INST 0x0300
34 #define OMAP54XX_PRM_DSP_INST 0x0400
35 #define OMAP54XX_PRM_ABE_INST 0x0500
36 #define OMAP54XX_PRM_COREAON_INST 0x0600
37 #define OMAP54XX_PRM_CORE_INST 0x0700
38 #define OMAP54XX_PRM_IVA_INST 0x1200
39 #define OMAP54XX_PRM_CAM_INST 0x1300
[all …]
Dprm7xx.h26 #define DRA7XX_PRM_BASE 0x4ae06000
33 #define DRA7XX_PRM_OCP_SOCKET_INST 0x0000
34 #define DRA7XX_PRM_CKGEN_INST 0x0100
35 #define DRA7XX_PRM_MPU_INST 0x0300
36 #define DRA7XX_PRM_DSP1_INST 0x0400
37 #define DRA7XX_PRM_IPU_INST 0x0500
38 #define DRA7XX_PRM_COREAON_INST 0x0628
39 #define DRA7XX_PRM_CORE_INST 0x0700
40 #define DRA7XX_PRM_IVA_INST 0x0f00
41 #define DRA7XX_PRM_CAM_INST 0x1000
[all …]
Dprm44xx.h28 #define OMAP4430_PRM_BASE 0x4a306000
35 #define OMAP4430_PRM_OCP_SOCKET_INST 0x0000
36 #define OMAP4430_PRM_CKGEN_INST 0x0100
37 #define OMAP4430_PRM_MPU_INST 0x0300
38 #define OMAP4430_PRM_TESLA_INST 0x0400
39 #define OMAP4430_PRM_ABE_INST 0x0500
40 #define OMAP4430_PRM_ALWAYS_ON_INST 0x0600
41 #define OMAP4430_PRM_CORE_INST 0x0700
42 #define OMAP4430_PRM_IVAHD_INST 0x0f00
43 #define OMAP4430_PRM_CAM_INST 0x1000
[all …]
/Linux-v5.15/drivers/net/ethernet/qualcomm/emac/
Demac.h17 #define EMAC_DMA_MAS_CTRL 0x1400
18 #define EMAC_IRQ_MOD_TIM_INIT 0x1408
19 #define EMAC_BLK_IDLE_STS 0x140c
20 #define EMAC_PHY_LINK_DELAY 0x141c
21 #define EMAC_SYS_ALIV_CTRL 0x1434
22 #define EMAC_MAC_CTRL 0x1480
23 #define EMAC_MAC_IPGIFG_CTRL 0x1484
24 #define EMAC_MAC_STA_ADDR0 0x1488
25 #define EMAC_MAC_STA_ADDR1 0x148c
26 #define EMAC_HASH_TAB_REG0 0x1490
[all …]
/Linux-v5.15/drivers/net/wireless/realtek/rtw88/
Drtw8822c.h11 u8 res0[0x30]; /* 0x120 */
12 u8 vid[2]; /* 0x150 */
15 u8 mac_addr[ETH_ALEN]; /* 0x157 */
16 u8 res2[0x3d];
20 u8 mac_addr[ETH_ALEN]; /* 0x120 */
28 u8 ltr_cap; /* 0x133 */
33 u8 res0:2; /* 0x144 */
57 u8 res0[0x0e];
62 u8 channel_plan; /* 0xb8 */
66 u8 res2[5]; /* 0xbc */
[all …]
/Linux-v5.15/drivers/mfd/
Dintel_pmc_bxt.c38 #define PLAT_RESOURCE_IPC_INDEX 0
39 #define PLAT_RESOURCE_IPC_SIZE 0x1000
40 #define PLAT_RESOURCE_GCR_OFFSET 0x1000
41 #define PLAT_RESOURCE_GCR_SIZE 0x1000
49 #define PLAT_RESOURCE_ACPI_IO_INDEX 0
57 #define SMI_EN_OFFSET 0x0040
59 #define TCO_BASE_OFFSET 0x0060
62 #define TELEM_PMC_SSRAM_OFFSET 0x1b00
63 #define TELEM_PUNIT_SSRAM_OFFSET 0x1a00
66 #define PMC_NORTHPEAK_CTRL 0xed
[all …]
/Linux-v5.15/drivers/net/wireless/realtek/rtlwifi/
Ddebug.c80 int max = 0xff; in rtl_debug_get_mac_page()
82 for (n = 0; n <= max; ) { in rtl_debug_get_mac_page()
84 for (i = 0; i < 4 && n <= max; i++, n += 4) in rtl_debug_get_mac_page()
89 return 0; in rtl_debug_get_mac_page()
98 RTL_DEBUG_IMPL_MAC_SERIES(0, 0x0000);
99 RTL_DEBUG_IMPL_MAC_SERIES(1, 0x0100);
100 RTL_DEBUG_IMPL_MAC_SERIES(2, 0x0200);
101 RTL_DEBUG_IMPL_MAC_SERIES(3, 0x0300);
102 RTL_DEBUG_IMPL_MAC_SERIES(4, 0x0400);
103 RTL_DEBUG_IMPL_MAC_SERIES(5, 0x0500);
[all …]
/Linux-v5.15/arch/x86/include/asm/
Dperf_event.h15 #define MSR_ARCH_PERFMON_PERFCTR0 0xc1
16 #define MSR_ARCH_PERFMON_PERFCTR1 0xc2
18 #define MSR_ARCH_PERFMON_EVENTSEL0 0x186
19 #define MSR_ARCH_PERFMON_EVENTSEL1 0x187
21 #define ARCH_PERFMON_EVENTSEL_EVENT 0x000000FFULL
22 #define ARCH_PERFMON_EVENTSEL_UMASK 0x0000FF00ULL
31 #define ARCH_PERFMON_EVENTSEL_CMASK 0xFF000000ULL
44 (0xFULL << AMD64_EVENTSEL_INT_CORE_SEL_SHIFT)
47 (ARCH_PERFMON_EVENTSEL_EVENT | (0x0FULL << 32))
53 (0xFULL << AMD64_L3_SLICE_SHIFT)
[all …]
/Linux-v5.15/drivers/net/ethernet/amd/
Dariadne.h17 * Publication #16907, Rev. B, Amendment/0, May 1994
62 #define CSR0 0x0000 /* - PCnet-ISA Controller Status */
63 #define CSR1 0x0100 /* - IADR[15:0] */
64 #define CSR2 0x0200 /* - IADR[23:16] */
65 #define CSR3 0x0300 /* - Interrupt Masks and Deferral Control */
66 #define CSR4 0x0400 /* - Test and Features Control */
67 #define CSR6 0x0600 /* RCV/XMT Descriptor Table Length */
68 #define CSR8 0x0800 /* - Logical Address Filter, LADRF[15:0] */
69 #define CSR9 0x0900 /* - Logical Address Filter, LADRF[31:16] */
70 #define CSR10 0x0a00 /* - Logical Address Filter, LADRF[47:32] */
[all …]
/Linux-v5.15/drivers/media/usb/gspca/
Ddtcs033.c32 if (gspca_dev->usb_err < 0) in reg_rw()
36 usb_rcvctrlpipe(udev, 0), in reg_rw()
42 if (ret < 0) { in reg_rw()
53 int i = 0; in reg_reqs()
56 while ((i < n_reqs) && (gspca_dev->usb_err >= 0)) { in reg_reqs()
63 if (gspca_dev->usb_err < 0) { in reg_reqs()
111 return 0; in sd_config()
117 return 0; in sd_init()
137 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0); in dtcs033_pkt_scan()
141 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0); in dtcs033_pkt_scan()
[all …]
/Linux-v5.15/drivers/media/i2c/
Dvs6624_regs.h12 #define VS6624_MICRO_EN 0xC003 /* power enable for all MCU clock */
13 #define VS6624_DIO_EN 0xC044 /* enable digital I/O */
15 #define VS6624_DEV_ID_MSB 0x0001 /* device id MSB */
16 #define VS6624_DEV_ID_LSB 0x0002 /* device id LSB */
17 #define VS6624_FW_VSN_MAJOR 0x0004 /* firmware version major */
18 #define VS6624_FW_VSN_MINOR 0x0006 /* firmware version minor */
19 #define VS6624_PATCH_VSN_MAJOR 0x0008 /* patch version major */
20 #define VS6624_PATCH_VSN_MINOR 0x000A /* patch version minor */
22 #define VS6624_USER_CMD 0x0180 /* user level control of operating states */
24 #define VS6624_STATE 0x0202 /* current state of the mode manager */
[all …]
/Linux-v5.15/sound/soc/codecs/
Dcs42l42.h17 #define CS42L42_PAGE_REGISTER 0x00 /* Page Select Register */
18 #define CS42L42_WIN_START 0x00
19 #define CS42L42_WIN_LEN 0x100
20 #define CS42L42_RANGE_MIN 0x00
21 #define CS42L42_RANGE_MAX 0x7F
23 #define CS42L42_PAGE_10 0x1000
24 #define CS42L42_PAGE_11 0x1100
25 #define CS42L42_PAGE_12 0x1200
26 #define CS42L42_PAGE_13 0x1300
27 #define CS42L42_PAGE_15 0x1500
[all …]
/Linux-v5.15/drivers/net/ethernet/atheros/alx/
Dreg.h38 #define ALX_DEV_ID_AR8161 0x1091
39 #define ALX_DEV_ID_E2200 0xe091
40 #define ALX_DEV_ID_E2400 0xe0a1
41 #define ALX_DEV_ID_E2500 0xe0b1
42 #define ALX_DEV_ID_AR8162 0x1090
43 #define ALX_DEV_ID_AR8171 0x10A1
44 #define ALX_DEV_ID_AR8172 0x10A0
47 * bit(0): with xD support
52 #define ALX_REV_A0 0
57 #define ALX_DEV_CTRL 0x0060
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Dam33xx.dtsi50 #size-cells = <0>;
51 cpu@0 {
55 reg = <0>;
89 opp-supported-hw = <0x06 0x0010>;
96 opp-supported-hw = <0x01 0x00FF>;
103 opp-supported-hw = <0x06 0x0020>;
110 opp-supported-hw = <0x01 0xFFFF>;
116 opp-supported-hw = <0x06 0x0040>;
122 opp-supported-hw = <0x01 0xFFFF>;
128 opp-supported-hw = <0x06 0x0080>;
[all …]
Ddm814x.dtsi35 #size-cells = <0>;
36 cpu@0 {
39 reg = <0>;
69 reg = <0x47400000 0x1000>;
77 reg = <0x47401300 0x100>;
80 #phy-cells = <0>;
85 reg = <0x47401400 0x400
86 0x47401000 0x200>;
98 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
99 &cppi41dma 2 0 &cppi41dma 3 0
[all …]
Domap4.dtsi40 #size-cells = <0>;
42 cpu@0 {
46 reg = <0x0>;
57 reg = <0x1>;
67 reg = <0x40304000 0xa000>; /* 40k */
74 reg = <0x48241000 0x1000>,
75 <0x48240100 0x0100>;
81 reg = <0x48242000 0x1000>;
89 reg = <0x48240600 0x20>;
98 reg = <0x48281000 0x1000>;
[all …]
/Linux-v5.15/arch/powerpc/kernel/
Dhead_40x.S82 . = 0xc0
108 stw r10,crit_r10@l(0) /* save two registers to work with */
109 stw r11,crit_r11@l(0)
112 stw r10,crit_srr0@l(0)
113 stw r11,crit_srr1@l(0)
116 stw r10,crit_dear@l(0)
117 stw r11,crit_esr@l(0)
127 1: stw r1,crit_r1@l(0)
139 lwz r11,crit_r1@l(0)
141 stw r11,0(r1)
[all …]
/Linux-v5.15/arch/openrisc/kernel/
Dentry.S48 l.addi r2,r1,0 /* move sp to fp */ ;\
51 l.ori r1,r2,0 /* restore sp */ ;\
62 l.addi r2,r1,0 /* move sp to fp */ ;\
65 l.ori r1,r2,0 /* restore sp */ ;\
220 l.addi r3,r1,0 ;\
232 l.sw 0(reg),r0
244 /* ---[ 0x100: RESET exception ]----------------------------------------- */
248 l.andi r0,r0,0
250 /* ---[ 0x200: BUS exception ]------------------------------------------- */
256 l.addi r3,r1,0 /* pt_regs */
[all …]
Dhead.S34 l.movhi gpr,0x0
41 #define UART_BASE_ADD 0x90000000
73 #define EMERGENCY_PRINT_STORE_GPR4 l.sw 0x20(r0),r4
74 #define EMERGENCY_PRINT_LOAD_GPR4 l.lwz r4,0x20(r0)
76 #define EMERGENCY_PRINT_STORE_GPR5 l.sw 0x24(r0),r5
77 #define EMERGENCY_PRINT_LOAD_GPR5 l.lwz r5,0x24(r0)
79 #define EMERGENCY_PRINT_STORE_GPR6 l.sw 0x28(r0),r6
80 #define EMERGENCY_PRINT_LOAD_GPR6 l.lwz r6,0x28(r0)
82 #define EMERGENCY_PRINT_STORE_GPR7 l.sw 0x2c(r0),r7
83 #define EMERGENCY_PRINT_LOAD_GPR7 l.lwz r7,0x2c(r0)
[all …]
/Linux-v5.15/drivers/net/ethernet/hisilicon/hns/
Dhns_dsaf_reg.h10 #define HNS_DEBUG_RING_IRQ_IDX 0
46 #define DSAF_SUB_SC_NT_SRAM_CLK_SEL_REG 0x100
47 #define DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG 0x180
48 #define DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG 0x184
49 #define DSAF_SUB_SC_HILINK3_CRG_CTRL2_REG 0x188
50 #define DSAF_SUB_SC_HILINK3_CRG_CTRL3_REG 0x18C
51 #define DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG 0x190
52 #define DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG 0x194
53 #define DSAF_SUB_SC_DSAF_CLK_EN_REG 0x300
54 #define DSAF_SUB_SC_DSAF_CLK_DIS_REG 0x304
[all …]
/Linux-v5.15/drivers/net/ethernet/mediatek/
Dmtk_eth_soc.h25 #define MTK_TX_DMA_BUF_LEN 0x3fff
31 #define MTK_DMA_DUMMY_DESC 0xffffffff
66 #define MTK_RST_GL 0x04
67 #define RST_GL_PSE BIT(0)
70 #define MTK_INT_STATUS2 0x08
75 #define MTK_PDMA_LRO_ALT_REFRESH_TIMER 0x1c
78 #define MTK_FE_INT_GRP 0x20
81 #define MTK_CDMQ_IG_CTRL 0x1400
82 #define MTK_CDMQ_STAG_EN BIT(0)
85 #define MTK_CDMP_EG_CTRL 0x404
[all …]

123