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/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dintel,lgm-ebunand.yaml46 const: 0
53 minimum: 0
79 reg = <0xe0f00000 0x100>,
80 <0xe1000000 0x300>,
81 <0xe1400000 0x8000>,
82 <0xe1c00000 0x1000>,
83 <0x17400000 0x4>,
84 <0x17c00000 0x4>;
91 #size-cells = <0>;
93 nand@0 {
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dsamsung,exynosautov9-clock.yaml250 reg = <0x17c00000 0x8000>;
/Linux-v6.1/arch/hexagon/kernel/
Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/Linux-v6.1/arch/arm64/boot/dts/exynos/
Dexynosautov9.dtsi47 #size-cells = <0>;
81 cpu0: cpu@0 {
84 reg = <0x0>;
91 reg = <0x100>;
98 reg = <0x200>;
105 reg = <0x300>;
112 reg = <0x10000>;
119 reg = <0x10100>;
126 reg = <0x10200>;
133 reg = <0x10300>;
[all …]
/Linux-v6.1/drivers/clk/samsung/
Dclk-exynosautov9.c23 /* Register Offset definitions for CMU_TOP (0x1b240000) */
24 #define PLL_LOCKTIME_PLL_SHARED0 0x0000
25 #define PLL_LOCKTIME_PLL_SHARED1 0x0004
26 #define PLL_LOCKTIME_PLL_SHARED2 0x0008
27 #define PLL_LOCKTIME_PLL_SHARED3 0x000c
28 #define PLL_LOCKTIME_PLL_SHARED4 0x0010
29 #define PLL_CON0_PLL_SHARED0 0x0100
30 #define PLL_CON3_PLL_SHARED0 0x010c
31 #define PLL_CON0_PLL_SHARED1 0x0140
32 #define PLL_CON3_PLL_SHARED1 0x014c
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc7180.dtsi61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]
Dsm8150.dtsi29 #clock-cells = <0>;
36 #clock-cells = <0>;
44 #size-cells = <0>;
46 CPU0: cpu@0 {
49 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
73 reg = <0x0 0x100>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
95 reg = <0x0 0x200>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]