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/Linux-v5.10/drivers/media/usb/tm6000/
Dtm6000-regs.h11 #define REQ_00_SET_IR_VALUE 0
17 /* Write: RegNum, Value, 0 */
21 /* Write: RegNum, Value, 0 */
31 /* Write: Subaddr, Slave Addr, value, 0 */
34 /* Subaddr, Slave Addr, 0, length */
55 #define TM6000_GPIO_CLK 0x101
56 #define TM6000_GPIO_DATA 0x100
58 #define TM6000_GPIO_1 0x102
59 #define TM6000_GPIO_2 0x103
60 #define TM6000_GPIO_3 0x104
[all …]
/Linux-v5.10/arch/s390/kernel/
Debcdic.c22 0x00, 0x01, 0x02, 0x03, 0x37, 0x2D, 0x2E, 0x2F,
25 0x16, 0x05, 0x15, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
27 0x10, 0x11, 0x12, 0x13, 0x3C, 0x3D, 0x32, 0x26,
30 0x18, 0x19, 0x3F, 0x27, 0x22, 0x1D, 0x1E, 0x1F,
32 0x40, 0x5A, 0x7F, 0x7B, 0x5B, 0x6C, 0x50, 0x7D,
34 0x4D, 0x5D, 0x5C, 0x4E, 0x6B, 0x60, 0x4B, 0x61,
35 /*30 0 1 2 3 4 5 6 7 */
36 0xF0, 0xF1, 0xF2, 0xF3, 0xF4, 0xF5, 0xF6, 0xF7,
38 0xF8, 0xF9, 0x7A, 0x5E, 0x4C, 0x7E, 0x6E, 0x6F,
40 0x7C, 0xC1, 0xC2, 0xC3, 0xC4, 0xC5, 0xC6, 0xC7,
[all …]
/Linux-v5.10/drivers/acpi/pmic/
Dintel_pmic_chtwc.c17 #define CHT_WC_V1P05A_CTRL 0x6e3b
18 #define CHT_WC_V1P15_CTRL 0x6e3c
19 #define CHT_WC_V1P05A_VSEL 0x6e3d
20 #define CHT_WC_V1P15_VSEL 0x6e3e
21 #define CHT_WC_V1P8A_CTRL 0x6e56
22 #define CHT_WC_V1P8SX_CTRL 0x6e57
23 #define CHT_WC_VDDQ_CTRL 0x6e58
24 #define CHT_WC_V1P2A_CTRL 0x6e59
25 #define CHT_WC_V1P2SX_CTRL 0x6e5a
26 #define CHT_WC_V1P8A_VSEL 0x6e5b
[all …]
/Linux-v5.10/include/linux/mfd/
Dpalmas.h25 #define PALMAS_CHIP_OLD_ID 0x0000
26 #define PALMAS_CHIP_ID 0xC035
27 #define PALMAS_CHIP_CHARGER_ID 0xC036
44 #define PALMAS_PMIC_FEATURE_SMPS10_BOOST BIT(0)
140 int ch3_current; /* 0: off; 1: 10uA; 2: 400uA; 3: 800 uA */
142 /* Channel 0 current source can be used for battery detection.
146 int ch0_current; /* 0: off; 1: 5uA; 2: 15uA; 3: 20 uA */
163 * 0: reload default values from OTP on warm reset
174 * 0: i2c selection of voltage
186 * 0: Off
[all …]
/Linux-v5.10/drivers/misc/cardreader/
Drts5261.h14 #define rts5261_vendor_setting_valid(reg) ((reg) & 0x010000)
15 #define rts5261_reg_to_aspm(reg) (((reg) >> 28) ^ 0x03)
16 #define rts5261_reg_check_reverse_socket(reg) ((reg) & 0x04)
17 #define rts5261_reg_to_card_drive_sel(reg) ((((reg) >> 6) & 0x01) << 6)
18 #define rts5261_reg_to_sd30_drive_sel_1v8(reg) (((reg) >> 22) ^ 0x03)
19 #define rts5261_reg_to_sd30_drive_sel_3v3(reg) (((reg) >> 16) ^ 0x03)
22 #define RTS5261_AUTOLOAD_CFG0 0xFF7B
23 #define RTS5261_AUTOLOAD_CFG1 0xFF7C
24 #define RTS5261_AUTOLOAD_CFG2 0xFF7D
25 #define RTS5261_AUTOLOAD_CFG3 0xFF7E
[all …]
Drts5228.h15 #define RTS5228_AUTOLOAD_CFG0 0xFF7B
16 #define RTS5228_AUTOLOAD_CFG1 0xFF7C
17 #define RTS5228_AUTOLOAD_CFG2 0xFF7D
18 #define RTS5228_AUTOLOAD_CFG3 0xFF7E
19 #define RTS5228_AUTOLOAD_CFG4 0xFF7F
21 #define RTS5228_REG_VREF 0xFE97
24 #define RTS5228_PAD_H3L1 0xFF79
27 /* SSC_CTL2 0xFC12 */
28 #define RTS5228_SSC_DEPTH_MASK 0x07
29 #define RTS5228_SSC_DEPTH_DISALBE 0x00
[all …]
Drts5260.h4 #define RTS5260_DVCC_CTRL 0xFF73
5 #define RTS5260_DVCC_OCP_EN (0x01 << 7)
6 #define RTS5260_DVCC_OCP_THD_MASK (0x07 << 4)
7 #define RTS5260_DVCC_POWERON (0x01 << 3)
8 #define RTS5260_DVCC_OCP_CL_EN (0x01 << 2)
10 #define RTS5260_DVIO_CTRL 0xFF75
11 #define RTS5260_DVIO_OCP_EN (0x01 << 7)
12 #define RTS5260_DVIO_OCP_THD_MASK (0x07 << 4)
13 #define RTS5260_DVIO_POWERON (0x01 << 3)
14 #define RTS5260_DVIO_OCP_CL_EN (0x01 << 2)
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dcros-ec-keyboard.dtsi18 MATRIX_KEY(0x00, 0x01, KEY_LEFTMETA)
19 MATRIX_KEY(0x00, 0x02, KEY_F1)
20 MATRIX_KEY(0x00, 0x03, KEY_B)
21 MATRIX_KEY(0x00, 0x04, KEY_F10)
22 MATRIX_KEY(0x00, 0x05, KEY_RO)
23 MATRIX_KEY(0x00, 0x06, KEY_N)
24 MATRIX_KEY(0x00, 0x08, KEY_EQUAL)
25 MATRIX_KEY(0x00, 0x0a, KEY_RIGHTALT)
27 MATRIX_KEY(0x01, 0x01, KEY_ESC)
28 MATRIX_KEY(0x01, 0x02, KEY_F4)
[all …]
Drk3288-veyron-jerry.dts25 pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>;
45 #size-cells = <0>;
52 0x01 0x00 0x06 0x00 0x08 0x02 0x89 0x01
53 0x24 0x00 0x67 0x09 0x14 0x01 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
54 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
55 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01 0x24 0x00 0x67 0x09 0x14 0x02 0x00 0x0f
56 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09
57 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c 0x0d 0x09 0x0e 0x09 0x0f 0x09 0x89 0x01
58 0x24 0x00 0x67 0x09 0x14 0x03 0x00 0x0f 0x01 0x0c 0x02 0x0c 0x03 0x0c 0x04 0x0c
59 0x05 0x0c 0x06 0x0c 0x07 0x09 0x08 0x09 0x09 0x09 0x0a 0x0c 0x0b 0x0c 0x0c 0x0c
[all …]
Domap3-n950.dts27 pinctrl-0 = <&keypad_slide_pins>;
35 OMAP3_CORE1_IOPAD(0x212a, PIN_INPUT | MUX_MODE4) /* cam_d10.gpio_109 */
43 OMAP3_CORE1_IOPAD(0x218c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_clk */
44 OMAP3_CORE1_IOPAD(0x2190, PIN_OUTPUT | MUX_MODE1) /* mcspi4_simo */
45 OMAP3_CORE1_IOPAD(0x2192, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mcspi4_somi */
46 OMAP3_CORE1_IOPAD(0x2196, PIN_OUTPUT | MUX_MODE1) /* mcspi4_cs0 */
54 OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE1) /* dsi_dx0 - data0+ */
55 OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE1) /* dsi_dy0 - data0- */
56 OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE1) /* dsi_dx1 - clk+ */
57 OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE1) /* dsi_dy1 - clk- */
[all …]
/Linux-v5.10/drivers/staging/fbtft/
Dfb_ssd1289.c23 static unsigned int reg11 = 0x6040;
32 gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ in init_display()
34 write_reg(par, 0x00, 0x0001); in init_display()
35 write_reg(par, 0x03, 0xA8A4); in init_display()
36 write_reg(par, 0x0C, 0x0000); in init_display()
37 write_reg(par, 0x0D, 0x080C); in init_display()
38 write_reg(par, 0x0E, 0x2B00); in init_display()
39 write_reg(par, 0x1E, 0x00B7); in init_display()
40 write_reg(par, 0x01, in init_display()
42 write_reg(par, 0x02, 0x0600); in init_display()
[all …]
Dfb_ili9320.c20 #define DEFAULT_GAMMA "07 07 6 0 0 0 5 5 4 0\n" \
21 "07 08 4 7 5 1 2 0 7 7"
26 u8 rxbuf[8] = {0, }; in read_devicecode()
28 write_reg(par, 0x0000); in read_devicecode()
40 fbtft_par_dbg(DEBUG_INIT_DISPLAY, par, "Device code: 0x%04X\n", in init_display()
42 if ((devcode != 0x0000) && (devcode != 0x9320)) in init_display()
44 "Unrecognized Device code: 0x%04X (expected 0x9320)\n", in init_display()
51 write_reg(par, 0x00E5, 0x8000); in init_display()
54 write_reg(par, 0x0000, 0x0001); in init_display()
57 write_reg(par, 0x0001, 0x0100); in init_display()
[all …]
Dfb_ili9325.c23 #define DEFAULT_GAMMA "0F 00 7 2 0 0 6 5 4 1\n" \
30 static unsigned int vc = 0x03; /* Vci1=Vci*0.80 */
34 static unsigned int vrh = 0x0d; /* VREG1OUT=Vci*1.85 */
38 static unsigned int vdv = 0x12; /* VCOMH amplitude=VREG1OUT*0.98 */
42 static unsigned int vcm = 0x0a; /* VCOMH=VREG1OUT*0.735 */
89 gpiod_set_value(par->gpio.cs, 0); /* Activate chip */ in init_display()
91 bt &= 0x07; in init_display()
92 vc &= 0x07; in init_display()
93 vrh &= 0x0f; in init_display()
94 vdv &= 0x1f; in init_display()
[all …]
Dfb_hx8340bn.c27 #define DEFAULT_GAMMA "1 3 0E 5 0 2 09 0 6 1 7 1 0 2 2\n" \
28 "3 3 17 8 4 7 05 7 6 0 3 1 6 0 0 "
45 write_reg(par, 0xC1, 0xFF, 0x83, 0x40); in init_display()
53 write_reg(par, 0x11); in init_display()
57 write_reg(par, 0xCA, 0x70, 0x00, 0xD9); in init_display()
65 write_reg(par, 0xB0, 0x01, 0x11); in init_display()
68 write_reg(par, 0xC9, 0x90, 0x49, 0x10, 0x28, 0x28, 0x10, 0x00, 0x06); in init_display()
78 write_reg(par, 0xB5, 0x35, 0x20, 0x45); in init_display()
82 * VRH[4:0]: Specify the VREG1 voltage adjusting. in init_display()
84 * BT[2:0]: Switch the output factor of step-up circuit 2 in init_display()
[all …]
/Linux-v5.10/drivers/media/dvb-frontends/cxd2880/
Dcxd2880_dvbt2.h28 CXD2880_DVBT2_S1_BASE_SISO = 0x00,
29 CXD2880_DVBT2_S1_BASE_MISO = 0x01,
30 CXD2880_DVBT2_S1_NON_DVBT2 = 0x02,
31 CXD2880_DVBT2_S1_LITE_SISO = 0x03,
32 CXD2880_DVBT2_S1_LITE_MISO = 0x04,
33 CXD2880_DVBT2_S1_RSVD3 = 0x05,
34 CXD2880_DVBT2_S1_RSVD4 = 0x06,
35 CXD2880_DVBT2_S1_RSVD5 = 0x07,
36 CXD2880_DVBT2_S1_UNKNOWN = 0xff
40 CXD2880_DVBT2_BASE_S2_M2K_G_ANY = 0x00,
[all …]
/Linux-v5.10/drivers/isdn/mISDN/
Dl1oip_codec.c52 0xab, 0x2b, 0xe3, 0x63, 0x8b, 0x0b, 0xc9, 0x49,
53 0xba, 0x3a, 0xf6, 0x76, 0x9b, 0x1b, 0xd7, 0x57,
54 0xa3, 0x23, 0xdd, 0x5d, 0x83, 0x03, 0xc1, 0x41,
55 0xb2, 0x32, 0xeb, 0x6b, 0x93, 0x13, 0xcf, 0x4f,
56 0xaf, 0x2f, 0xe7, 0x67, 0x8f, 0x0f, 0xcd, 0x4d,
57 0xbe, 0x3e, 0xfe, 0x7e, 0x9f, 0x1f, 0xdb, 0x5b,
58 0xa7, 0x27, 0xdf, 0x5f, 0x87, 0x07, 0xc5, 0x45,
59 0xb6, 0x36, 0xef, 0x6f, 0x97, 0x17, 0xd3, 0x53,
60 0xa9, 0x29, 0xe1, 0x61, 0x89, 0x09, 0xc7, 0x47,
61 0xb8, 0x38, 0xf2, 0x72, 0x99, 0x19, 0xd5, 0x55,
[all …]
/Linux-v5.10/drivers/regulator/
Dhi6421-regulator.c77 /* LDO 0, 4~7, 9~14, 16~20 have same voltage table. */
91 REGULATOR_LINEAR_RANGE(2800000, 0, 3, 50000),
308 HI6421_LDO(LDO0, hi6421_vout0, ldo_0_voltages, 0x20, 0x07, 0x20, 0x10,
309 10000, 0x20, 8000),
310 HI6421_LDO_LINEAR(LDO1, hi6421_vout1, 1700000, 4, 100000, 0x21, 0x03,
311 0x21, 0x10, 10000, 0x20, 5000),
312 HI6421_LDO_LINEAR(LDO2, hi6421_vout2, 1050000, 8, 50000, 0x22, 0x07,
313 0x22, 0x10, 20000, 0x20, 8000),
314 HI6421_LDO_LINEAR(LDO3, hi6421_vout3, 1050000, 8, 50000, 0x23, 0x07,
315 0x23, 0x10, 20000, 0x20, 8000),
[all …]
Dhi655x-regulator.c74 unsigned int value = 0; in hi655x_is_enabled()
151 HI655X_LDO_LINEAR(LDO2, 0x72, 0x07, 0x29, 0x2a, 0x2b, 0x01,
153 HI655X_LDO(LDO7, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x06, ldo7_voltages),
154 HI655X_LDO(LDO10, 0x78, 0x07, 0x29, 0x2a, 0x2b, 0x01, ldo7_voltages),
155 HI655X_LDO_LINEAR(LDO13, 0x7e, 0x07, 0x2c, 0x2d, 0x2e, 0x04,
157 HI655X_LDO_LINEAR(LDO14, 0x7f, 0x07, 0x2c, 0x2d, 0x2e, 0x05,
159 HI655X_LDO_LINEAR(LDO15, 0x80, 0x07, 0x2c, 0x2d, 0x2e, 0x06,
161 HI655X_LDO_LINEAR(LDO17, 0x82, 0x07, 0x2f, 0x30, 0x31, 0x00,
163 HI655X_LDO(LDO19, 0x84, 0x07, 0x2f, 0x30, 0x31, 0x02, ldo19_voltages),
164 HI655X_LDO_LINEAR(LDO21, 0x86, 0x07, 0x2f, 0x30, 0x31, 0x04,
[all …]
/Linux-v5.10/drivers/media/tuners/
Dmxl301rf.c40 if (ret >= 0 && ret < len) in raw_write()
42 return (ret == len) ? 0 : ret; in raw_write()
54 u8 wbuf[2] = { 0xfb, reg }; in reg_read()
58 if (ret == 0) in reg_read()
60 if (ret >= 0 && ret < 1) in reg_read()
62 return (ret == 1) ? 0 : ret; in reg_read()
79 rssi->stat[0].scale = FE_SCALE_NOT_AVAILABLE; in mxl301rf_get_rf_strength()
80 *out = 0; in mxl301rf_get_rf_strength()
83 ret = reg_write(state, 0x14, 0x01); in mxl301rf_get_rf_strength()
84 if (ret < 0) in mxl301rf_get_rf_strength()
[all …]
/Linux-v5.10/tools/perf/pmu-events/arch/x86/tremontx/
Duncore-other.json4 "Counter": "0,1,2,3",
12 "Counter": "0,1,2,3",
14 "EventCode": "0x35",
16 "Filter": "config1=0x40e33",
18 "UMask": "0xC001FE01",
19 "UMaskExt": "0xC001FE",
24 "Counter": "0,1,2,3",
26 "EventCode": "0x35",
28 "Filter": "config1=0x40040e33",
30 "UMask": "0xC001FE01",
[all …]
/Linux-v5.10/drivers/net/wireless/broadcom/b43/
Dradio_2059.c17 { 0x051, 0x70 }, { 0x05a, 0x03 }, { 0x079, 0x01 }, { 0x082, 0x70 },
18 { 0x083, 0x00 }, { 0x084, 0x70 }, { 0x09a, 0x7f }, { 0x0b6, 0x10 },
19 { 0x188, 0x05 },
61 RADIOREGS(0x48, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x6c,
62 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
63 0x00, 0x00, 0x00, 0xd0, 0x00),
64 PHYREGS(0x03c9, 0x03c5, 0x03c1, 0x043a, 0x043f, 0x0443),
68 RADIOREGS(0x4b, 0x16, 0x30, 0x1b, 0x0a, 0x0a, 0x30, 0x71,
69 0x09, 0x0f, 0x0a, 0x00, 0x0a, 0x00, 0x61, 0x73,
70 0x00, 0x00, 0x00, 0xd0, 0x00),
[all …]
/Linux-v5.10/arch/mips/pic32/pic32mzda/
Dearly_pin.h70 #define IN_RPD2 0x00
71 #define IN_RPG8 0x01
72 #define IN_RPF4 0x02
73 #define IN_RPD10 0x03
74 #define IN_RPF1 0x04
75 #define IN_RPB9 0x05
76 #define IN_RPB10 0x06
77 #define IN_RPC14 0x07
78 #define IN_RPB5 0x08
79 #define IN_RPC1 0x0A
[all …]
/Linux-v5.10/drivers/media/i2c/
Dadv7175.c27 #define I2C_ADV7175 0xd4
28 #define I2C_ADV7176 0x54
32 module_param(debug, int, 0);
33 MODULE_PARM_DESC(debug, "Debug level (0-1)");
86 block_len = 0; in adv7175_write_block()
87 block_data[block_len++] = reg = data[0]; in adv7175_write_block()
93 } while (len >= 2 && data[0] == reg && block_len < 32); in adv7175_write_block()
95 if (ret < 0) in adv7175_write_block()
103 if (ret < 0) in adv7175_write_block()
117 adv7175_write(sd, 0x02, 0x00); in set_subcarrier_freq()
[all …]
/Linux-v5.10/sound/soc/codecs/
Dmax98926.h10 #define MAX98926_CHIP_VERSION 0x40
11 #define MAX98926_CHIP_VERSION1 0x50
13 #define MAX98926_VBAT_DATA 0x00
14 #define MAX98926_VBST_DATA 0x01
15 #define MAX98926_LIVE_STATUS0 0x02
16 #define MAX98926_LIVE_STATUS1 0x03
17 #define MAX98926_LIVE_STATUS2 0x04
18 #define MAX98926_STATE0 0x05
19 #define MAX98926_STATE1 0x06
20 #define MAX98926_STATE2 0x07
[all …]
Dmax98925.h11 #define MAX98925_VERSION 0x51
12 #define MAX98925_VERSION1 0x80
13 #define MAX98925_VBAT_DATA 0x00
14 #define MAX98925_VBST_DATA 0x01
15 #define MAX98925_LIVE_STATUS0 0x02
16 #define MAX98925_LIVE_STATUS1 0x03
17 #define MAX98925_LIVE_STATUS2 0x04
18 #define MAX98925_STATE0 0x05
19 #define MAX98925_STATE1 0x06
20 #define MAX98925_STATE2 0x07
[all …]

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