Searched +full:0 +full:x01c25000 (Results 1 – 12 of 12) sorted by relevance
15 const: 018 const: 038 reg = <0x01c25000 0x100>;39 #thermal-sensor-cells = <0>;40 #io-channel-cells = <0>;
15 const: 035 minimum: 043 minimum: 050 0: 4/267 reg = <0x01c25000 0x100>;70 #thermal-sensor-cells = <0>;72 allwinner,tp-sensitive-adjust = <0>;
57 - 094 const: 0131 reg = <0x01f04000 0x100>;132 interrupts = <0 31 0>;141 reg = <0x01c25000 0x400>;142 clocks = <&ccu 0>, <&ccu 1>;145 interrupts = <0 31 0>;148 #thermal-sensor-cells = <0>;154 reg = <0x05070400 0x100>;155 clocks = <&ccu 0>;[all …]
14 #clock-cells = <0>;21 #clock-cells = <0>;44 reg = <0x01c00000 0x30>;51 reg = <0x00010000 0x1000>;54 ranges = <0 0x00010000 0x1000>;56 otg_sram: sram-section@0 {59 reg = <0x0000 0x1000>;67 reg = <0x01c20000 0x400>;76 reg = <0x01c20400 0x400>;83 reg = <0x01c20800 0x400>;[all …]
72 #size-cells = <0>;74 cpu0: cpu@0 {77 reg = <0>;155 reg = <0x01400000 0x20000>;168 reg = <0x01c00000 0x1000>;175 reg = <0x01d00000 0x80000>;178 ranges = <0 0x01d00000 0x80000>;180 ve_sram: sram-section@0 {183 reg = <0x000000 0x80000>;190 reg = <0x01c0e000 0x1000>;[all …]
127 cpu@0 {208 reg = <0x01c0e000 0x1000>;219 reg = <0x01c15000 0x1000>;228 #sound-dai-cells = <0>;230 reg = <0x01c22c00 0x200>;241 #sound-dai-cells = <0>;243 reg = <0x01c22e00 0x400>;252 reg = <0x01c25000 0x100>;253 #thermal-sensor-cells = <0>;254 #io-channel-cells = <0>;[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;97 #clock-cells = <0>;104 #clock-cells = <0>;119 size = <0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;135 reg = <0x01c00000 0x30>;140 sram_a: sram@0 {142 reg = <0x00000000 0xc000>;[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;167 #clock-cells = <0>;174 #clock-cells = <0>;200 size = <0x6000000>;201 alloc-ranges = <0x40000000 0x10000000>;215 reg = <0x01c00000 0x30>;220 sram_a: sram@0 {222 reg = <0x00000000 0xc000>;[all …]
100 #size-cells = <0>;102 cpu0: cpu@0 {105 reg = <0>;216 #clock-cells = <0>;224 #clock-cells = <0>;241 #clock-cells = <0>;248 #clock-cells = <0>;255 #clock-cells = <0>;257 reg = <0x01c200d0 0x4>;277 reg = <0x01c02000 0x1000>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;183 size = <0x6000000>;184 alloc-ranges = <0x40000000 0x10000000>;210 #clock-cells = <0>;217 #clock-cells = <0>;233 #clock-cells = <0>;240 #clock-cells = <0>;247 #clock-cells = <0>;[all …]
11 #size-cells = <0>;13 cpu0: cpu@0 {16 reg = <0>;84 reg = <0x01c00000 0x1000>;91 reg = <0x00018000 0x1c000>;94 ranges = <0 0x00018000 0x1c000>;96 ve_sram: sram-section@0 {99 reg = <0x000000 0x1c000>;106 reg = <0x01c0e000 0x1000>;117 reg = <0x01c15000 0x1000>;[all …]
46 #size-cells = <0>;48 cpu0: cpu@0 {51 reg = <0>;106 #clock-cells = <0>;113 #clock-cells = <0>;174 polling-delay-passive = <0>;175 polling-delay = <0>;176 thermal-sensors = <&ths 0>;221 polling-delay-passive = <0>;222 polling-delay = <0>;[all …]
