Lines Matching +full:0 +full:x01c25000
111 #size-cells = <0>;
112 cpu0: cpu@0 {
115 reg = <0x0>;
167 #clock-cells = <0>;
174 #clock-cells = <0>;
200 size = <0x6000000>;
201 alloc-ranges = <0x40000000 0x10000000>;
215 reg = <0x01c00000 0x30>;
220 sram_a: sram@0 {
222 reg = <0x00000000 0xc000>;
225 ranges = <0 0x00000000 0xc000>;
229 reg = <0x8000 0x4000>;
236 reg = <0x00010000 0x1000>;
239 ranges = <0 0x00010000 0x1000>;
241 otg_sram: sram-section@0 {
243 reg = <0x0000 0x1000>;
250 reg = <0x01d00000 0xd0000>;
253 ranges = <0 0x01d00000 0xd0000>;
255 ve_sram: sram-section@0 {
257 reg = <0x000000 0x80000>;
264 reg = <0x01c02000 0x1000>;
272 reg = <0x01c03000 0x1000>;
280 #size-cells = <0>;
285 reg = <0x01c05000 0x1000>;
294 #size-cells = <0>;
299 reg = <0x01c06000 0x1000>;
307 pinctrl-0 = <&spi1_pins>, <&spi1_cs0_pin>;
310 #size-cells = <0>;
315 reg = <0x01c0b000 0x1000>;
320 pinctrl-0 = <&emac_pins>;
326 reg = <0x01c0b080 0x14>;
329 #size-cells = <0>;
334 reg = <0x01c0c000 0x1000>;
345 #clock-cells = <0>;
350 #size-cells = <0>;
352 tcon0_in: port@0 {
354 #size-cells = <0>;
355 reg = <0>;
357 tcon0_in_be0: endpoint@0 {
358 reg = <0>;
370 #size-cells = <0>;
384 reg = <0x01c0d000 0x1000>;
395 #clock-cells = <0>;
400 #size-cells = <0>;
402 tcon1_in: port@0 {
404 #size-cells = <0>;
405 reg = <0>;
407 tcon1_in_be0: endpoint@0 {
408 reg = <0>;
420 #size-cells = <0>;
434 reg = <0x01c0e000 0x1000>;
445 reg = <0x01c0f000 0x1000>;
450 pinctrl-0 = <&mmc0_pins>;
453 #size-cells = <0>;
458 reg = <0x01c10000 0x1000>;
464 #size-cells = <0>;
469 reg = <0x01c11000 0x1000>;
475 #size-cells = <0>;
480 reg = <0x01c12000 0x1000>;
486 #size-cells = <0>;
491 reg = <0x01c13000 0x0400>;
495 phys = <&usbphy 0>;
497 extcon = <&usbphy 0>;
506 reg = <0x01c13400 0x10>, <0x01c14800 0x4>, <0x01c1c800 0x4>;
519 reg = <0x01c14000 0x100>;
529 reg = <0x01c14400 0x100>;
539 reg = <0x01c15000 0x1000>;
547 reg = <0x01c16000 0x1000>;
552 clock-names = "ahb", "mod", "pll-0", "pll-1";
561 #size-cells = <0>;
563 hdmi_in: port@0 {
565 #size-cells = <0>;
566 reg = <0>;
568 hdmi_in_tcon0: endpoint@0 {
569 reg = <0>;
587 reg = <0x01c17000 0x1000>;
596 #size-cells = <0>;
601 reg = <0x01c18000 0x1000>;
609 reg = <0x01c1c000 0x100>;
619 reg = <0x01c1c400 0x100>;
629 reg = <0x01c1d000 0x1000>;
639 reg = <0x01c1f000 0x1000>;
648 #size-cells = <0>;
653 reg = <0x01c20000 0x400>;
662 reg = <0x01c20400 0x400>;
669 reg = <0x01c20800 0x400>;
844 reg = <0x01c20c00 0x90>;
856 reg = <0x01c20c90 0x10>;
863 reg = <0x01c20d00 0x20>;
869 reg = <0x01c20e00 0xc>;
876 #sound-dai-cells = <0>;
878 reg = <0x01c21000 0x400>;
893 reg = <0x01c21800 0x40>;
902 reg = <0x01c21c00 0x40>;
907 #sound-dai-cells = <0>;
909 reg = <0x01c22400 0x400>;
921 reg = <0x01c22800 0x100>;
927 #sound-dai-cells = <0>;
929 reg = <0x01c22c00 0x40>;
941 reg = <0x01c23800 0x10>;
946 reg = <0x01c25000 0x100>;
948 #thermal-sensor-cells = <0>;
953 reg = <0x01c28000 0x400>;
963 reg = <0x01c28400 0x400>;
973 reg = <0x01c28800 0x400>;
983 reg = <0x01c28c00 0x400>;
993 reg = <0x01c29000 0x400>;
1003 reg = <0x01c29400 0x400>;
1013 reg = <0x01c29800 0x400>;
1023 reg = <0x01c29c00 0x400>;
1033 reg = <0x01c2a000 0x400>;
1041 reg = <0x01c2a400 0x400>;
1049 reg = <0x01c2ac00 0x400>;
1053 pinctrl-0 = <&i2c0_pins>;
1056 #size-cells = <0>;
1061 reg = <0x01c2b000 0x400>;
1065 pinctrl-0 = <&i2c1_pins>;
1068 #size-cells = <0>;
1073 reg = <0x01c2b400 0x400>;
1077 pinctrl-0 = <&i2c2_pins>;
1080 #size-cells = <0>;
1085 reg = <0x01c2bc00 0x400>;
1093 reg = <0x01c40000 0x10000>;
1114 reg = <0x01e00000 0x20000>;
1124 #size-cells = <0>;
1128 #size-cells = <0>;
1131 fe0_out_be0: endpoint@0 {
1132 reg = <0>;
1146 reg = <0x01e20000 0x20000>;
1156 #size-cells = <0>;
1160 #size-cells = <0>;
1163 fe1_out_be0: endpoint@0 {
1164 reg = <0>;
1178 reg = <0x01e40000 0x10000>;
1188 #size-cells = <0>;
1190 be1_in: port@0 {
1192 #size-cells = <0>;
1193 reg = <0>;
1195 be1_in_fe0: endpoint@0 {
1196 reg = <0>;
1208 #size-cells = <0>;
1211 be1_out_tcon0: endpoint@0 {
1212 reg = <0>;
1226 reg = <0x01e60000 0x10000>;
1236 #size-cells = <0>;
1238 be0_in: port@0 {
1240 #size-cells = <0>;
1241 reg = <0>;
1243 be0_in_fe0: endpoint@0 {
1244 reg = <0>;
1256 #size-cells = <0>;
1259 be0_out_tcon0: endpoint@0 {
1260 reg = <0>;