Home
last modified time | relevance | path

Searched +full:0 +full:x008c0000 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/Documentation/devicetree/bindings/soc/qcom/
Dqcom,geni-se.yaml67 "^.*@[0-9a-f]+$":
100 "spi@[0-9a-f]+$":
120 const: 0
128 "i2c@[0-9a-f]+$":
145 const: 0
157 "serial@[0-9a-f]+$":
191 reg = <0 0x008c0000 0 0x6000>;
201 reg = <0 0xa94000 0 0x4000>;
206 pinctrl-0 = <&qup_1_i2c_5_active>;
209 #size-cells = <0>;
[all …]
/Linux-v5.15/drivers/media/platform/exynos4-is/
Dfimc-is.h42 #define FIMC_IS_CPU_MEM_SIZE (0xa00000)
44 #define FIMC_IS_REGION_SIZE 0x5000
46 #define FIMC_IS_DEBUG_REGION_OFFSET 0x0084b000
47 #define FIMC_IS_SHARED_REGION_OFFSET 0x008c0000
55 FIMC_IS_EXTRA_SETFILE_SIZE + 0x1000)
56 #define FIMC_IS_EXTRA_FW_SIZE 0x180000
57 #define FIMC_IS_EXTRA_SETFILE_SIZE 0x4b000
112 FIMC_IS_AF_IDLE = 0,
121 FIMC_IS_AF_UNLOCKED = 0,
126 FIMC_IS_AE_UNLOCKED = 0,
[all …]
/Linux-v5.15/crypto/
Daes_generic.c67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
/Linux-v5.15/arch/arm64/boot/dts/qcom/
Dmsm8996.dtsi24 #clock-cells = <0>;
31 #clock-cells = <0>;
39 #size-cells = <0>;
41 CPU0: cpu@0 {
44 reg = <0x0 0x0>;
48 clocks = <&kryocc 0>;
61 reg = <0x0 0x1>;
65 clocks = <&kryocc 0>;
74 reg = <0x0 0x100>;
91 reg = <0x0 0x101>;
[all …]
Dsm8150.dtsi30 #clock-cells = <0>;
37 #clock-cells = <0>;
45 #size-cells = <0>;
47 CPU0: cpu@0 {
50 reg = <0x0 0x0>;
55 qcom,freq-domain = <&cpufreq_hw 0>;
74 reg = <0x0 0x100>;
79 qcom,freq-domain = <&cpufreq_hw 0>;
96 reg = <0x0 0x200>;
101 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi62 #clock-cells = <0>;
68 #clock-cells = <0>;
78 reg = <0x0 0x80000000 0x0 0x600000>;
83 reg = <0x0 0x80600000 0x0 0x200000>;
88 reg = <0x0 0x80800000 0x0 0x20000>;
93 reg = <0x0 0x80820000 0x0 0x20000>;
99 reg = <0x0 0x808ff000 0x0 0x1000>;
104 reg = <0x0 0x80900000 0x0 0x200000>;
109 reg = <0x0 0x80b00000 0x0 0x3900000>;
114 reg = <0 0x8b700000 0 0x10000>;
[all …]
Dsm8250.dtsi78 #clock-cells = <0>;
86 #clock-cells = <0>;
92 #size-cells = <0>;
94 CPU0: cpu@0 {
97 reg = <0x0 0x0>;
102 qcom,freq-domain = <&cpufreq_hw 0>;
116 reg = <0x0 0x100>;
121 qcom,freq-domain = <&cpufreq_hw 0>;
132 reg = <0x0 0x200>;
137 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]