Home
last modified time | relevance | path

Searched +full:0 +full:x004 (Results 1 – 25 of 448) sorted by relevance

12345678910>>...18

/Linux-v5.15/arch/arm/boot/dts/
Dimx27-pinfunc.h15 * function: 0 - Primary function
18 * direction: 0 - Input
20 * gpio_oconf: 0 - A_IN
24 * gpio_iconfa/b: 0 - GPIO_IN
26 * 2 - 0
29 * 'pin' is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
31 * number on the specific port (between 0 and 31).
34 #define MX27_PAD_USBH2_CLK__USBH2_CLK 0x00 0x000
35 #define MX27_PAD_USBH2_CLK__GPIO1_0 0x00 0x032
36 #define MX27_PAD_USBH2_DIR__USBH2_DIR 0x01 0x000
[all …]
Dimx1-pinfunc.h15 * function: 0 - Primary function
18 * direction: 0 - Input
20 * gpio_oconf: 0 - A_IN
24 * gpio_iconfa/b: 0 - GPIO_IN
26 * 2 - 0
29 * 'pin' is an integer between 0 and 0xbf. i.MX1 has 4 ports with 32 configurable
31 * number on the specific port (between 0 and 31).
34 #define MX1_PAD_A24__A24 0x00 0x004
35 #define MX1_PAD_A24__GPIO1_0 0x00 0x032
36 #define MX1_PAD_A24__SPI2_CLK 0x00 0x006
[all …]
/Linux-v5.15/sound/pci/oxygen/
Dwm8776.h14 #define WM8776_HPLVOL 0x00
15 #define WM8776_HPRVOL 0x01
16 #define WM8776_HPMASTER 0x02
17 #define WM8776_DACLVOL 0x03
18 #define WM8776_DACRVOL 0x04
19 #define WM8776_DACMASTER 0x05
20 #define WM8776_PHASESWAP 0x06
21 #define WM8776_DACCTRL1 0x07
22 #define WM8776_DACMUTE 0x08
23 #define WM8776_DACCTRL2 0x09
[all …]
Dwm8785.h5 #define WM8785_R0 0
11 #define WM8785_MCR_MASK 0x007
12 #define WM8785_MCR_SLAVE 0x000
13 #define WM8785_MCR_MASTER_128 0x001
14 #define WM8785_MCR_MASTER_192 0x002
15 #define WM8785_MCR_MASTER_256 0x003
16 #define WM8785_MCR_MASTER_384 0x004
17 #define WM8785_MCR_MASTER_512 0x005
18 #define WM8785_MCR_MASTER_768 0x006
19 #define WM8785_OSR_MASK 0x018
[all …]
Dwm8766.h5 #define WM8766_LDA1 0x00
6 #define WM8766_RDA1 0x01
7 #define WM8766_DAC_CTRL 0x02
8 #define WM8766_INT_CTRL 0x03
9 #define WM8766_LDA2 0x04
10 #define WM8766_RDA2 0x05
11 #define WM8766_LDA3 0x06
12 #define WM8766_RDA3 0x07
13 #define WM8766_MASTDA 0x08
14 #define WM8766_DAC_CTRL2 0x09
[all …]
/Linux-v5.15/drivers/clk/mediatek/
Dclk-mt6779.c640 0x20, 0x24, 0x28, 0, 2, 7,
641 0x004, 0, CLK_IS_CRITICAL),
643 0x20, 0x24, 0x28, 8, 3, 15, 0x004, 1),
645 0x20, 0x24, 0x28, 16, 3, 23, 0x004, 2),
648 0x30, 0x34, 0x38, 0, 3, 7, 0x004, 4),
650 0x30, 0x34, 0x38, 8, 3, 15, 0x004, 5),
652 0x30, 0x34, 0x38, 16, 3, 23, 0x004, 6),
654 0x30, 0x34, 0x38, 24, 4, 31, 0x004, 7),
657 0x40, 0x44, 0x48, 0, 4, 7, 0x004, 8),
659 0x40, 0x44, 0x48, 8, 4, 15, 0x004, 9),
[all …]
Dclk-mt8183.c21 #define INFRA_RST0_SET_OFFSET 0x120
526 axi_parents, 0x40,
527 0x44, 0x48, 0, 2, 7, 0x004, 0, CLK_IS_CRITICAL),
529 mm_parents, 0x40,
530 0x44, 0x48, 8, 3, 15, 0x004, 1),
532 img_parents, 0x40,
533 0x44, 0x48, 16, 3, 23, 0x004, 2),
535 cam_parents, 0x40,
536 0x44, 0x48, 24, 4, 31, 0x004, 3),
539 dsp_parents, 0x50,
[all …]
Dclk-mt8192.c709 axi_parents, 0x010, 0x014, 0x018, 0, 3, 7, 0x004, 0,
712 spm_parents, 0x010, 0x014, 0x018, 8, 2, 15, 0x004, 1,
715 scp_parents, 0x010, 0x014, 0x018, 16, 3, 23, 0x004, 2),
717 bus_aximem_parents, 0x010, 0x014, 0x018, 24, 3, 31, 0x004, 3,
721 disp_parents, 0x020, 0x024, 0x028, 0, 4, 7, 0x004, 4),
723 mdp_parents, 0x020, 0x024, 0x028, 8, 4, 15, 0x004, 5),
725 img1_parents, 0x020, 0x024, 0x028, 16, 4, 23, 0x004, 6),
727 img2_parents, 0x020, 0x024, 0x028, 24, 4, 31, 0x004, 7),
730 ipe_parents, 0x030, 0x034, 0x038, 0, 4, 7, 0x004, 8),
732 dpe_parents, 0x030, 0x034, 0x038, 8, 3, 15, 0x004, 9),
[all …]
/Linux-v5.15/arch/parisc/kernel/
Dhardware.c32 {HPHW_NPROC,0x01,0x4,0x0,"Indigo (840, 930)"},
33 {HPHW_NPROC,0x8,0x4,0x01,"Firefox(825,925)"},
34 {HPHW_NPROC,0xA,0x4,0x01,"Top Gun (835,834,935,635)"},
35 {HPHW_NPROC,0xB,0x4,0x01,"Technical Shogun (845, 645)"},
36 {HPHW_NPROC,0xF,0x4,0x01,"Commercial Shogun (949)"},
37 {HPHW_NPROC,0xC,0x4,0x01,"Cheetah (850, 950)"},
38 {HPHW_NPROC,0x80,0x4,0x01,"Cheetah (950S)"},
39 {HPHW_NPROC,0x81,0x4,0x01,"Jaguar (855, 955)"},
40 {HPHW_NPROC,0x82,0x4,0x01,"Cougar (860, 960)"},
41 {HPHW_NPROC,0x83,0x4,0x13,"Panther (865, 870, 980)"},
[all …]
/Linux-v5.15/include/sound/sof/
Dheader.h23 * 0xGCCCNNNN where
34 #define SOF_GLB_TYPE_MASK (0xfL << SOF_GLB_TYPE_SHIFT)
39 #define SOF_CMD_TYPE_MASK (0xfffL << SOF_CMD_TYPE_SHIFT)
43 #define SOF_IPC_GLB_REPLY SOF_GLB_TYPE(0x1U)
44 #define SOF_IPC_GLB_COMPOUND SOF_GLB_TYPE(0x2U)
45 #define SOF_IPC_GLB_TPLG_MSG SOF_GLB_TYPE(0x3U)
46 #define SOF_IPC_GLB_PM_MSG SOF_GLB_TYPE(0x4U)
47 #define SOF_IPC_GLB_COMP_MSG SOF_GLB_TYPE(0x5U)
48 #define SOF_IPC_GLB_STREAM_MSG SOF_GLB_TYPE(0x6U)
49 #define SOF_IPC_FW_READY SOF_GLB_TYPE(0x7U)
[all …]
/Linux-v5.15/arch/arm64/include/asm/
Dbrk-imm.h11 * 0x004: for installing kprobes
12 * 0x005: for installing uprobes
13 * 0x006: for kprobe software single-step
14 * Allowed values for kgdb are 0x400 - 0x7ff
15 * 0x100: for triggering a fault on purpose (reserved)
16 * 0x400: for dynamic BRK instruction
17 * 0x401: for compile time BRK instruction
18 * 0x800: kernel-mode BUG() and WARN() traps
19 * 0x9xx: tag-based KASAN trap (allowed values 0x900 - 0x9ff)
21 #define KPROBES_BRK_IMM 0x004
[all …]
/Linux-v5.15/drivers/net/wireless/ath/carl9170/
Dhw.h43 #define AR9170_UART_REG_BASE 0x1c0000
46 #define AR9170_UART_REG_RX_BUFFER (AR9170_UART_REG_BASE + 0x000)
47 #define AR9170_UART_REG_TX_HOLDING (AR9170_UART_REG_BASE + 0x004)
48 #define AR9170_UART_REG_FIFO_CONTROL (AR9170_UART_REG_BASE + 0x010)
49 #define AR9170_UART_FIFO_CTRL_RESET_RX_FIFO 0x02
50 #define AR9170_UART_FIFO_CTRL_RESET_TX_FIFO 0x04
52 #define AR9170_UART_REG_LINE_CONTROL (AR9170_UART_REG_BASE + 0x014)
53 #define AR9170_UART_REG_MODEM_CONTROL (AR9170_UART_REG_BASE + 0x018)
54 #define AR9170_UART_MODEM_CTRL_DTR_BIT 0x01
55 #define AR9170_UART_MODEM_CTRL_RTS_BIT 0x02
[all …]
/Linux-v5.15/drivers/net/ethernet/seeq/
Dsgiseeq.h35 #define SEEQ_RSTAT_OVERF 0x001 /* Overflow */
36 #define SEEQ_RSTAT_CERROR 0x002 /* CRC error */
37 #define SEEQ_RSTAT_DERROR 0x004 /* Dribble error */
38 #define SEEQ_RSTAT_SFRAME 0x008 /* Short frame */
39 #define SEEQ_RSTAT_REOF 0x010 /* Received end of frame */
40 #define SEEQ_RSTAT_FIG 0x020 /* Frame is good */
41 #define SEEQ_RSTAT_TIMEO 0x040 /* Timeout, or late receive */
42 #define SEEQ_RSTAT_WHICH 0x080 /* Which status, 1=old 0=new */
43 #define SEEQ_RSTAT_LITTLE 0x100 /* DMA is done in little endian format */
44 #define SEEQ_RSTAT_SDMA 0x200 /* DMA has started */
[all …]
/Linux-v5.15/arch/mips/include/asm/
Dhpet.h9 #define HPET_ID 0x000
10 #define HPET_PERIOD 0x004
11 #define HPET_CFG 0x010
12 #define HPET_STATUS 0x020
13 #define HPET_COUNTER 0x0f0
15 #define HPET_Tn_CFG(n) (0x100 + 0x20 * n)
16 #define HPET_Tn_CMP(n) (0x108 + 0x20 * n)
17 #define HPET_Tn_ROUTE(n) (0x110 + 0x20 * n)
19 #define HPET_T0_IRS 0x001
20 #define HPET_T1_IRS 0x002
[all …]
/Linux-v5.15/drivers/staging/rtl8192e/rtl8192e/
Dr8192E_hwimg.c9 u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE] = {0x0,};
12 0x800, 0x00000000,
13 0x804, 0x00000001,
14 0x808, 0x0000fc00,
15 0x80c, 0x0000001c,
16 0x810, 0x801010aa,
17 0x814, 0x008514d0,
18 0x818, 0x00000040,
19 0x81c, 0x00000000,
20 0x820, 0x00000004,
[all …]
/Linux-v5.15/drivers/staging/rtl8192u/
Dr819xU_firmware_img.c7 0x0, };
10 0x800, 0x00000000,
11 0x804, 0x00000001,
12 0x808, 0x0000fc00,
13 0x80c, 0x0000001c,
14 0x810, 0x801010aa,
15 0x814, 0x008514d0,
16 0x818, 0x00000040,
17 0x81c, 0x00000000,
18 0x820, 0x00000004,
[all …]
/Linux-v5.15/drivers/video/fbdev/via/
Daccel.h14 #define MMIO_VGABASE 0x8000
15 #define MMIO_CR_READ (MMIO_VGABASE + 0x3D4)
16 #define MMIO_CR_WRITE (MMIO_VGABASE + 0x3D5)
17 #define MMIO_SR_READ (MMIO_VGABASE + 0x3C4)
18 #define MMIO_SR_WRITE (MMIO_VGABASE + 0x3C5)
21 #define HW_Cursor_ON 0
27 #define VIA_MMIO_BLTBASE 0x200000
28 #define VIA_MMIO_BLTSIZE 0x200000
31 #define VIA_REG_GECMD 0x000
32 #define VIA_REG_GEMODE 0x004
[all …]
/Linux-v5.15/drivers/clk/meson/
Daxg-audio.h16 #define AUDIO_CLK_GATE_EN 0x000
17 #define AUDIO_MCLK_A_CTRL 0x004
18 #define AUDIO_MCLK_B_CTRL 0x008
19 #define AUDIO_MCLK_C_CTRL 0x00C
20 #define AUDIO_MCLK_D_CTRL 0x010
21 #define AUDIO_MCLK_E_CTRL 0x014
22 #define AUDIO_MCLK_F_CTRL 0x018
23 #define AUDIO_MST_PAD_CTRL0 0x01c
24 #define AUDIO_MST_PAD_CTRL1 0x020
25 #define AUDIO_SW_RESET 0x024
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx27-pinctrl.txt12 PIN is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
14 number on the specific port (between 0 and 31).
21 0 - Primary function
28 0 - Input
37 0 - A_IN
46 0 - GPIO_IN
52 CONFIG can be 0 or 1, meaning Pullup disable/enable.
64 reg = <0x10015000 0x600>;
78 0x8c 0x004 0x0 /* UART1_TXD__UART1_TXD */
79 0x8d 0x000 0x0 /* UART1_RXD__UART1_RXD */
[all …]
/Linux-v5.15/drivers/gpu/drm/vc4/
Dvc4_hdmi_regs.h6 #define VC4_HDMI_PACKET_STRIDE 0x24
9 VC4_INVALID = 0,
151 VC4_HD_REG(HDMI_M_CTL, 0x000c),
152 VC4_HD_REG(HDMI_MAI_CTL, 0x0014),
153 VC4_HD_REG(HDMI_MAI_THR, 0x0018),
154 VC4_HD_REG(HDMI_MAI_FMT, 0x001c),
155 VC4_HD_REG(HDMI_MAI_DATA, 0x0020),
156 VC4_HD_REG(HDMI_MAI_SMP, 0x002c),
157 VC4_HD_REG(HDMI_VID_CTL, 0x0038),
158 VC4_HD_REG(HDMI_CSC_CTL, 0x0040),
[all …]
/Linux-v5.15/arch/arm64/boot/dts/hisilicon/
Dhikey960-pinctrl.dtsi18 reg = <0x0 0xe896c000 0x0 0x1f0>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
25 &range 0 7 0
26 &range 8 116 0>;
30 0x008 MUX_M1 /* PMU1_SSI */
31 0x00c MUX_M1 /* PMU2_SSI */
32 0x010 MUX_M1 /* PMU_CLKOUT */
33 0x100 MUX_M1 /* PMU_HKADC_SSI */
[all …]
/Linux-v5.15/drivers/media/i2c/
Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/Linux-v5.15/arch/arm/include/asm/hardware/
Diomd.h27 #define IOMD_CONTROL (0x000)
28 #define IOMD_KARTTX (0x004)
29 #define IOMD_KARTRX (0x004)
30 #define IOMD_KCTRL (0x008)
32 #define IOMD_IRQSTATA (0x010)
33 #define IOMD_IRQREQA (0x014)
34 #define IOMD_IRQCLRA (0x014)
35 #define IOMD_IRQMASKA (0x018)
37 #define IOMD_IRQSTATB (0x020)
38 #define IOMD_IRQREQB (0x024)
[all …]
/Linux-v5.15/drivers/pinctrl/tegra/
Dpinctrl-tegra-xusb.c22 #define XUSB_PADCTL_ELPG_PROGRAM 0x01c
27 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1 0x040
29 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL1_REFCLK_SEL_MASK (0xf << 12)
32 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2 0x044
37 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1 0x138
42 #define XUSB_PADCTL_IOPHY_PLL_S0_CTL1_PLL_IDDQ (1 << 0)
44 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1 0x148
46 #define XUSB_PADCTL_IOPHY_MISC_PAD_S0_CTL1_IDDQ (1 << 0)
132 return 0; in tegra_xusb_padctl_get_group_pins()
148 #define TEGRA_XUSB_PADCTL_UNPACK_VALUE(config) ((config) & 0xffff)
[all …]
/Linux-v5.15/drivers/gpu/drm/nouveau/nvkm/engine/
Dfalcon.c33 int c = 0; in nvkm_falcon_oclass_get()
65 u32 dest = nvkm_rd32(device, base + 0x01c); in nvkm_falcon_intr()
66 u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16); in nvkm_falcon_intr()
67 u32 inst = nvkm_rd32(device, base + 0x050) & 0x3fffffff; in nvkm_falcon_intr()
73 if (intr & 0x00000040) { in nvkm_falcon_intr()
76 nvkm_wr32(device, base + 0x004, 0x00000040); in nvkm_falcon_intr()
77 intr &= ~0x00000040; in nvkm_falcon_intr()
81 if (intr & 0x00000010) { in nvkm_falcon_intr()
83 nvkm_wr32(device, base + 0x004, 0x00000010); in nvkm_falcon_intr()
84 intr &= ~0x00000010; in nvkm_falcon_intr()
[all …]

12345678910>>...18