Lines Matching +full:0 +full:x004
21 #define INFRA_RST0_SET_OFFSET 0x120
526 axi_parents, 0x40,
527 0x44, 0x48, 0, 2, 7, 0x004, 0, CLK_IS_CRITICAL),
529 mm_parents, 0x40,
530 0x44, 0x48, 8, 3, 15, 0x004, 1),
532 img_parents, 0x40,
533 0x44, 0x48, 16, 3, 23, 0x004, 2),
535 cam_parents, 0x40,
536 0x44, 0x48, 24, 4, 31, 0x004, 3),
539 dsp_parents, 0x50,
540 0x54, 0x58, 0, 4, 7, 0x004, 4),
542 dsp1_parents, 0x50,
543 0x54, 0x58, 8, 4, 15, 0x004, 5),
545 dsp2_parents, 0x50,
546 0x54, 0x58, 16, 4, 23, 0x004, 6),
548 ipu_if_parents, 0x50,
549 0x54, 0x58, 24, 4, 31, 0x004, 7),
552 mfg_parents, 0x60,
553 0x64, 0x68, 0, 2, 7, 0x004, 8),
555 f52m_mfg_parents, 0x60,
556 0x64, 0x68, 8, 2, 15, 0x004, 9),
558 camtg_parents, 0x60,
559 0x64, 0x68, 16, 3, 23, 0x004, 10),
561 camtg2_parents, 0x60,
562 0x64, 0x68, 24, 3, 31, 0x004, 11),
565 camtg3_parents, 0x70,
566 0x74, 0x78, 0, 3, 7, 0x004, 12),
568 camtg4_parents, 0x70,
569 0x74, 0x78, 8, 3, 15, 0x004, 13),
571 uart_parents, 0x70,
572 0x74, 0x78, 16, 1, 23, 0x004, 14),
574 spi_parents, 0x70,
575 0x74, 0x78, 24, 2, 31, 0x004, 15),
578 msdc50_hclk_parents, 0x80,
579 0x84, 0x88, 0, 2, 7, 0x004, 16),
581 msdc50_0_parents, 0x80,
582 0x84, 0x88, 8, 3, 15, 0x004, 17),
584 msdc30_1_parents, 0x80,
585 0x84, 0x88, 16, 3, 23, 0x004, 18),
587 msdc30_2_parents, 0x80,
588 0x84, 0x88, 24, 3, 31, 0x004, 19),
591 audio_parents, 0x90,
592 0x94, 0x98, 0, 2, 7, 0x004, 20),
594 aud_intbus_parents, 0x90,
595 0x94, 0x98, 8, 2, 15, 0x004, 21),
597 pmicspi_parents, 0x90,
598 0x94, 0x98, 16, 2, 23, 0x004, 22),
600 fpwrap_ulposc_parents, 0x90,
601 0x94, 0x98, 24, 2, 31, 0x004, 23),
604 atb_parents, 0xa0,
605 0xa4, 0xa8, 0, 2, 7, 0x004, 24),
607 dpi0_parents, 0xa0,
608 0xa4, 0xa8, 16, 4, 23, 0x004, 26),
610 scam_parents, 0xa0,
611 0xa4, 0xa8, 24, 1, 31, 0x004, 27),
614 disppwm_parents, 0xb0,
615 0xb4, 0xb8, 0, 3, 7, 0x004, 28),
617 usb_top_parents, 0xb0,
618 0xb4, 0xb8, 8, 2, 15, 0x004, 29),
620 ssusb_top_xhci_parents, 0xb0,
621 0xb4, 0xb8, 16, 2, 23, 0x004, 30),
623 spm_parents, 0xb0,
624 0xb4, 0xb8, 24, 1, 31, 0x008, 0, CLK_IS_CRITICAL),
627 i2c_parents, 0xc0,
628 0xc4, 0xc8, 0, 2, 7, 0x008, 1),
630 scp_parents, 0xc0,
631 0xc4, 0xc8, 8, 3, 15, 0x008, 2),
633 seninf_parents, 0xc0,
634 0xc4, 0xc8, 16, 2, 23, 0x008, 3),
636 dxcc_parents, 0xc0,
637 0xc4, 0xc8, 24, 2, 31, 0x008, 4),
640 aud_engen1_parents, 0xd0,
641 0xd4, 0xd8, 0, 2, 7, 0x008, 5),
643 aud_engen2_parents, 0xd0,
644 0xd4, 0xd8, 8, 2, 15, 0x008, 6),
646 faes_ufsfde_parents, 0xd0,
647 0xd4, 0xd8, 16, 3, 23, 0x008, 7),
649 fufs_parents, 0xd0,
650 0xd4, 0xd8, 24, 2, 31, 0x008, 8),
653 aud_1_parents, 0xe0,
654 0xe4, 0xe8, 0, 1, 7, 0x008, 9),
656 aud_2_parents, 0xe0,
657 0xe4, 0xe8, 8, 1, 15, 0x008, 10),
692 0x320, 8, 1),
694 0x320, 9, 1),
696 0x320, 10, 1),
698 0x320, 11, 1),
700 0x320, 12, 1),
702 0x328, 20, 1),
728 MUX(CLK_MCU_MP0_SEL, "mcu_mp0_sel", mcu_mp0_parents, 0x7A0, 9, 2),
730 MUX(CLK_MCU_MP2_SEL, "mcu_mp2_sel", mcu_mp2_parents, 0x7A8, 9, 2),
732 MUX(CLK_MCU_BUS_SEL, "mcu_bus_sel", mcu_bus_parents, 0x7C0, 9, 2),
737 0x320, 2, 0x324, 8, 0),
739 0x320, 3, 0x324, 8, 8),
741 0x320, 4, 0x324, 8, 16),
743 0x320, 5, 0x324, 8, 24),
745 0x320, 6, 0x328, 8, 0),
747 0x320, 7, 0x328, 8, 8),
751 .set_ofs = 0x104,
752 .clr_ofs = 0x104,
753 .sta_ofs = 0x104,
767 .set_ofs = 0x80,
768 .clr_ofs = 0x84,
769 .sta_ofs = 0x90,
773 .set_ofs = 0x88,
774 .clr_ofs = 0x8c,
775 .sta_ofs = 0x94,
779 .set_ofs = 0xa4,
780 .clr_ofs = 0xa8,
781 .sta_ofs = 0xac,
785 .set_ofs = 0xc0,
786 .clr_ofs = 0xc4,
787 .sta_ofs = 0xc8,
809 "axi_sel", 0),
917 "f_f26m_ck", 0),
974 "msdc50_0_sel", 0),
1008 .set_ofs = 0x20c,
1009 .clr_ofs = 0x20c,
1010 .sta_ofs = 0x20c,
1022 .set_ofs = 0x20,
1023 .clr_ofs = 0x20,
1024 .sta_ofs = 0x20,
1032 GATE_APMIXED_FLAGS(_id, _name, _parent, _shift, 0)
1106 { .div = 0, .freq = MT8183_PLL_FMAX },
1115 { .div = 0, .freq = MT8183_PLL_FMAX },
1124 PLL_B(CLK_APMIXED_ARMPLL_LL, "armpll_ll", 0x0200, 0x020C, 0x00000001,
1125 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0204, 24, 0x0, 0x0, 0,
1126 0x0204, 0, 0, armpll_div_table),
1127 PLL_B(CLK_APMIXED_ARMPLL_L, "armpll_l", 0x0210, 0x021C, 0x00000001,
1128 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0214, 24, 0x0, 0x0, 0,
1129 0x0214, 0, 0, armpll_div_table),
1130 PLL(CLK_APMIXED_CCIPLL, "ccipll", 0x0290, 0x029C, 0x00000001,
1131 HAVE_RST_BAR | PLL_AO, BIT(24), 22, 8, 0x0294, 24, 0x0, 0x0, 0,
1132 0x0294, 0, 0),
1133 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0220, 0x022C, 0x00000001,
1134 HAVE_RST_BAR, BIT(24), 22, 8, 0x0224, 24, 0x0, 0x0, 0,
1135 0x0224, 0, 0),
1136 PLL(CLK_APMIXED_UNIV2PLL, "univ2pll", 0x0230, 0x023C, 0x00000001,
1137 HAVE_RST_BAR, BIT(24), 22, 8, 0x0234, 24, 0x0, 0x0, 0,
1138 0x0234, 0, 0),
1139 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0x00000001,
1140 0, 0, 22, 8, 0x0244, 24, 0x0, 0x0, 0, 0x0244, 0, 0,
1142 PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0250, 0x025C, 0x00000001,
1143 0, 0, 22, 8, 0x0254, 24, 0x0, 0x0, 0, 0x0254, 0, 0),
1144 PLL(CLK_APMIXED_TVDPLL, "tvdpll", 0x0260, 0x026C, 0x00000001,
1145 0, 0, 22, 8, 0x0264, 24, 0x0, 0x0, 0, 0x0264, 0, 0),
1146 PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0270, 0x027C, 0x00000001,
1147 HAVE_RST_BAR, BIT(23), 22, 8, 0x0274, 24, 0x0, 0x0, 0,
1148 0x0274, 0, 0),
1149 PLL(CLK_APMIXED_APLL1, "apll1", 0x02A0, 0x02B0, 0x00000001,
1150 0, 0, 32, 8, 0x02A0, 1, 0x02A8, 0x0014, 0, 0x02A4, 0, 0x02A0),
1151 PLL(CLK_APMIXED_APLL2, "apll2", 0x02b4, 0x02c4, 0x00000001,
1152 0, 0, 32, 8, 0x02B4, 1, 0x02BC, 0x0014, 1, 0x02B8, 0, 0x02B4),
1178 for (i = 0; i < CLK_TOP_NR_CLK; i++) in clk_mt8183_top_init_early()
1195 base = devm_platform_ioremap_resource(pdev, 0); in clk_mt8183_top_probe()
1265 base = devm_platform_ioremap_resource(pdev, 0); in clk_mt8183_mcu_probe()