33 	int c = 0;  in nvkm_falcon_oclass_get()
65 	u32 dest = nvkm_rd32(device, base + 0x01c);  in nvkm_falcon_intr()
66 	u32 intr = nvkm_rd32(device, base + 0x008) & dest & ~(dest >> 16);  in nvkm_falcon_intr()
67 	u32 inst = nvkm_rd32(device, base + 0x050) & 0x3fffffff;  in nvkm_falcon_intr()
73 	if (intr & 0x00000040) {  in nvkm_falcon_intr()
76 			nvkm_wr32(device, base + 0x004, 0x00000040);  in nvkm_falcon_intr()
77 			intr &= ~0x00000040;  in nvkm_falcon_intr()
81 	if (intr & 0x00000010) {  in nvkm_falcon_intr()
83 		nvkm_wr32(device, base + 0x004, 0x00000010);  in nvkm_falcon_intr()
84 		intr &= ~0x00000010;  in nvkm_falcon_intr()
89 		nvkm_wr32(device, base + 0x004, intr);  in nvkm_falcon_intr()
112 		nvkm_mask(device, base + 0x048, 0x00000003, 0x00000000);  in nvkm_falcon_fini()
113 		nvkm_wr32(device, base + 0x014, 0xffffffff);  in nvkm_falcon_fini()
115 	return 0;  in nvkm_falcon_fini()
138 	if (device->chipset <  0xa3 ||  in nvkm_falcon_oneinit()
139 	    device->chipset == 0xaa || device->chipset == 0xac) {  in nvkm_falcon_oneinit()
140 		falcon->version = 0;  in nvkm_falcon_oneinit()
141 		falcon->secret  = (falcon->addr == 0x087000) ? 1 : 0;  in nvkm_falcon_oneinit()
143 		caps = nvkm_rd32(device, base + 0x12c);  in nvkm_falcon_oneinit()
144 		falcon->version = (caps & 0x0000000f);  in nvkm_falcon_oneinit()
145 		falcon->secret  = (caps & 0x00000030) >> 4;  in nvkm_falcon_oneinit()
148 	caps = nvkm_rd32(device, base + 0x108);  in nvkm_falcon_oneinit()
149 	falcon->code.limit = (caps & 0x000001ff) << 8;  in nvkm_falcon_oneinit()
150 	falcon->data.limit = (caps & 0x0003fe00) >> 1;  in nvkm_falcon_oneinit()
156 	return 0;  in nvkm_falcon_oneinit()
174 				if (nvkm_rd32(device, base + 0x008) & 0x00000010)  in nvkm_falcon_init()
179 				if (!(nvkm_rd32(device, base + 0x180) & 0x80000000))  in nvkm_falcon_init()
183 		nvkm_wr32(device, base + 0x004, 0x00000010);  in nvkm_falcon_init()
187 	nvkm_wr32(device, base + 0x014, 0xffffffff);  in nvkm_falcon_init()
197 		if (ret == 0) {  in nvkm_falcon_init()
201 			falcon->data.size = 0;  in nvkm_falcon_init()
257 		for (i = 0; i < falcon->code.size; i += 4)  in nvkm_falcon_init()
266 			nvkm_wr32(device, base + 0x618, 0x04000000);  in nvkm_falcon_init()
268 			nvkm_wr32(device, base + 0x618, 0x00000114);  in nvkm_falcon_init()
269 		nvkm_wr32(device, base + 0x11c, 0);  in nvkm_falcon_init()
270 		nvkm_wr32(device, base + 0x110, addr >> 8);  in nvkm_falcon_init()
271 		nvkm_wr32(device, base + 0x114, 0);  in nvkm_falcon_init()
272 		nvkm_wr32(device, base + 0x118, 0x00006610);  in nvkm_falcon_init()
281 			nvkm_wr32(device, base + 0xff8, 0x00100000);  in nvkm_falcon_init()
282 			for (i = 0; i < falcon->code.size / 4; i++)  in nvkm_falcon_init()
283 				nvkm_wr32(device, base + 0xff4, falcon->code.data[i]);  in nvkm_falcon_init()
285 			nvkm_wr32(device, base + 0x180, 0x01000000);  in nvkm_falcon_init()
286 			for (i = 0; i < falcon->code.size / 4; i++) {  in nvkm_falcon_init()
287 				if ((i & 0x3f) == 0)  in nvkm_falcon_init()
288 					nvkm_wr32(device, base + 0x188, i >> 6);  in nvkm_falcon_init()
289 				nvkm_wr32(device, base + 0x184, falcon->code.data[i]);  in nvkm_falcon_init()
296 		nvkm_wr32(device, base + 0xff8, 0x00000000);  in nvkm_falcon_init()
297 		for (i = 0; !falcon->core && i < falcon->data.size / 4; i++)  in nvkm_falcon_init()
298 			nvkm_wr32(device, base + 0xff4, falcon->data.data[i]);  in nvkm_falcon_init()
300 			nvkm_wr32(device, base + 0xff4, 0x00000000);  in nvkm_falcon_init()
302 		nvkm_wr32(device, base + 0x1c0, 0x01000000);  in nvkm_falcon_init()
303 		for (i = 0; !falcon->core && i < falcon->data.size / 4; i++)  in nvkm_falcon_init()
304 			nvkm_wr32(device, base + 0x1c4, falcon->data.data[i]);  in nvkm_falcon_init()
306 			nvkm_wr32(device, base + 0x1c4, 0x00000000);  in nvkm_falcon_init()
310 	nvkm_wr32(device, base + 0x10c, 0x00000001); /* BLOCK_ON_FIFO */  in nvkm_falcon_init()
311 	nvkm_wr32(device, base + 0x104, 0x00000000); /* ENTRY */  in nvkm_falcon_init()
312 	nvkm_wr32(device, base + 0x100, 0x00000002); /* TRIGGER */  in nvkm_falcon_init()
313 	nvkm_wr32(device, base + 0x048, 0x00000003); /* FIFO | CHSW */  in nvkm_falcon_init()
317 	return 0;  in nvkm_falcon_init()