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/Linux-v5.10/drivers/cpufreq/
Dcpufreq-dt-platdev.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include "cpufreq-dt.h"
16 * platforms using "operating-points" (V1) property.
19 { .compatible = "allwinner,sun4i-a10", },
20 { .compatible = "allwinner,sun5i-a10s", },
21 { .compatible = "allwinner,sun5i-a13", },
22 { .compatible = "allwinner,sun5i-r8", },
23 { .compatible = "allwinner,sun6i-a31", },
24 { .compatible = "allwinner,sun6i-a31s", },
25 { .compatible = "allwinner,sun7i-a20", },
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/arm/omap/
Domap.txt11 to move data from hwmod to device-tree representation.
15 - compatible: Every devices present in OMAP SoC should be in the
17 - ti,hwmods: list of hwmod names (ascii strings), that comes from the OMAP
22 - ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
24 - ti,no-reset-on-init: When present, the module should not be reset at init
25 - ti,no-idle-on-init: When present, the module should not be idled at init
26 - ti,no-idle: When present, the module is never allowed to idle.
31 compatible = "ti,omap4-spinlock";
37 - General Purpose devices
38 compatible = "ti,gp"
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Domap3xxx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <16800000>;
15 #clock-cells = <0>;
16 compatible = "ti,mux-clock";
22 #clock-cells = <0>;
23 compatible = "ti,divider-clock";
25 ti,bit-shift = <6>;
26 ti,max-div = <3>;
[all …]
Ddra7xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "ti,dra7-atl-clock";
15 #clock-cells = <0>;
16 compatible = "ti,dra7-atl-clock";
21 #clock-cells = <0>;
22 compatible = "ti,dra7-atl-clock";
27 #clock-cells = <0>;
28 compatible = "ti,dra7-atl-clock";
33 #clock-cells = <0>;
[all …]
Domap24xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "ti,composite-mux-clock";
12 ti,bit-shift = <2>;
17 #clock-cells = <0>;
18 compatible = "ti,composite-clock";
23 #clock-cells = <0>;
24 compatible = "ti,composite-mux-clock";
26 ti,bit-shift = <6>;
31 #clock-cells = <0>;
[all …]
Domap44xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <59000000>;
15 #clock-cells = <0>;
16 compatible = "fixed-clock";
17 clock-frequency = <12000000>;
21 #clock-cells = <0>;
22 compatible = "ti,gate-clock";
24 ti,bit-shift = <8>;
[all …]
Dam33xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
12 ti,bit-shift = <22>;
17 #clock-cells = <0>;
18 compatible = "fixed-factor-clock";
20 clock-mult = <1>;
21 clock-div = <1>;
25 #clock-cells = <0>;
26 compatible = "fixed-factor-clock";
[all …]
Domap54xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "fixed-clock";
11 clock-frequency = <12000000>;
15 #clock-cells = <0>;
16 compatible = "ti,gate-clock";
18 ti,bit-shift = <8>;
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <32768>;
[all …]
Dam43xx-clocks.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #clock-cells = <0>;
10 compatible = "ti,mux-clock";
12 ti,bit-shift = <31>;
17 #clock-cells = <0>;
18 compatible = "ti,mux-clock";
20 ti,bit-shift = <29>;
25 #clock-cells = <0>;
26 compatible = "ti,mux-clock";
28 ti,bit-shift = <22>;
[all …]
Dtwl4030.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
10 compatible = "ti,twl4030";
11 interrupt-controller;
12 #interrupt-cells = <1>;
15 compatible = "ti,twl4030-rtc";
20 compatible = "ti,twl4030-bci";
22 bci3v1-supply = <&vusb3v1>;
23 io-channels = <&twl_madc 11>;
24 io-channel-names = "vac";
[all …]
Dwm8750.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "wm,wm8750";
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm1176jzf";
40 #address-cells = <1>;
41 #size-cells = <1>;
[all …]
Dbcm11351.dtsi2 * Copyright (C) 2012-2013 Broadcom Corporation
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
17 #include "dt-bindings/clock/bcm281xx.h"
20 #address-cells = <1>;
21 #size-cells = <1>;
23 compatible = "brcm,bcm11351";
24 interrupt-parent = <&gic>;
31 #address-cells = <1>;
32 #size-cells = <0>;
[all …]
Dsocfpga.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/reset/altr,rst-mgr.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
22 #address-cells = <1>;
23 #size-cells = <0>;
24 enable-method = "altr,socfpga-smp";
27 compatible = "arm,cortex-a9";
30 next-level-cache = <&L2>;
33 compatible = "arm,cortex-a9";
[all …]
Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
[all …]
Dwm8850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "wm,wm8850";
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
37 #address-cells = <1>;
38 #size-cells = <1>;
[all …]
Dberlin2cd.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Include file for Marvell Armada 1500-mini (Berlin BG2CD) SoC
11 #include <dt-bindings/clock/berlin2.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 model = "Marvell Armada 1500-mini (BG2CD) SoC";
16 compatible = "marvell,berlin2cd", "marvell,berlin";
17 #address-cells = <1>;
18 #size-cells = <1>;
26 #address-cells = <1>;
27 #size-cells = <0>;
[all …]
Dwm8505.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "wm,wm8505";
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
38 #address-cells = <1>;
39 #size-cells = <1>;
[all …]
Dwm8650.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "wm,wm8650";
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
34 #address-cells = <1>;
35 #size-cells = <1>;
[all …]
Dsocfpga_arria10.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/altr,rst-mgr-a10.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 enable-method = "altr,socfpga-a10-smp";
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
[all …]
Dste-nomadik-stn8815.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
18 L2: cache-controller {
19 compatible = "arm,l210-cache";
21 interrupt-parent = <&vica>;
23 cache-unified;
24 cache-level = <2>;
[all …]
/Linux-v5.10/arch/arm64/boot/dts/cavium/
Dthunder-88xx.dtsi2 * Cavium Thunder DTS file - Thunder SoC description
6 * This file is dual-licensed: you can use it either under the terms
24 * MA 02110-1301 USA
51 compatible = "cavium,thunder-88xx";
52 interrupt-parent = <&gic0>;
53 #address-cells = <2>;
54 #size-cells = <2>;
57 compatible = "arm,psci-0.2";
62 #address-cells = <2>;
63 #size-cells = <0>;
[all …]
/Linux-v5.10/arch/powerpc/boot/dts/fsl/
Dt4240si-post.dtsi4 * Copyright 2012 - 2015 Freescale Semiconductor Inc.
36 compatible = "fsl,bman-fbpr";
37 alloc-ranges = <0 0 0x10000 0>;
41 compatible = "fsl,qman-fqd";
42 alloc-ranges = <0 0 0x10000 0>;
46 compatible = "fsl,qman-pfdr";
47 alloc-ranges = <0 0 0x10000 0>;
51 #address-cells = <2>;
52 #size-cells = <1>;
53 compatible = "fsl,ifc", "simple-bus";
[all …]
/Linux-v5.10/arch/x86/platform/ce4100/
Dfalconfalls.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
10 compatible = "intel,falconfalls";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/serial/
Dmtk-uart.txt4 - compatible should contain:
5 * "mediatek,mt2701-uart" for MT2701 compatible UARTS
6 * "mediatek,mt2712-uart" for MT2712 compatible UARTS
7 * "mediatek,mt6580-uart" for MT6580 compatible UARTS
8 * "mediatek,mt6582-uart" for MT6582 compatible UARTS
9 * "mediatek,mt6589-uart" for MT6589 compatible UARTS
10 * "mediatek,mt6755-uart" for MT6755 compatible UARTS
11 * "mediatek,mt6765-uart" for MT6765 compatible UARTS
12 * "mediatek,mt6779-uart" for MT6779 compatible UARTS
13 * "mediatek,mt6795-uart" for MT6795 compatible UARTS
[all …]
/Linux-v5.10/arch/mips/boot/dts/brcm/
Dbcm7435.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
5 compatible = "brcm,bcm7435";
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <175625000>;
14 compatible = "brcm,bmips5200";
20 compatible = "brcm,bmips5200";
26 compatible = "brcm,bmips5200";
[all …]

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