Lines Matching +full:- +full:compatible
1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
10 compatible = "intel,falconfalls";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "intel,ce4100";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "intel,ce4100-cp";
32 ioapic1: interrupt-controller@fec00000 {
33 #interrupt-cells = <2>;
34 compatible = "intel,ce4100-ioapic";
35 interrupt-controller;
40 compatible = "intel,ce4100-hpet";
44 lapic0: interrupt-controller@fee00000 {
45 compatible = "intel,ce4100-lapic";
50 #address-cells = <3>;
51 #size-cells = <2>;
52 compatible = "intel,ce4100-pci", "pci";
54 bus-range = <0 0>;
59 /* Secondary IO-APIC */
60 ioapic2: interrupt-controller@0,1 {
61 #interrupt-cells = <2>;
62 compatible = "intel,ce4100-ioapic";
63 interrupt-controller;
65 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
69 #address-cells = <3>;
70 #size-cells = <2>;
71 compatible = "intel,ce4100-pci", "pci";
73 bus-range = <1 1>;
77 interrupt-parent = <&ioapic2>;
80 compatible = "pci8086,2e5b.2",
90 compatible = "pci8086,2e5c.2",
100 compatible = "pci8086,2e5d.2",
110 compatible = "pci8086,2e5e.2",
120 compatible = "pci8086,2e5f.2",
130 compatible = "pci8086,2e5f.2",
140 compatible = "pci8086,2e60.2",
150 compatible = "pci8086,2e61.2",
160 compatible = "pci8086,2e62.2",
170 compatible = "pci8086,2e63.2",
179 entertainment-encryption@9,0 {
180 compatible = "pci8086,2e64.2",
190 compatible = "pci8086,2e65.2",
199 compatible = "pci8086,2e66.2",
209 #gpio-cells = <2>;
210 #interrupt-cells = <2>;
211 compatible = "pci8086,2e67.2",
218 interrupt-controller;
219 gpio-controller;
223 i2c-controller@b,2 {
224 #address-cells = <2>;
225 #size-cells = <1>;
226 compatible = "pci8086,2e68.2",
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "intel,ce4100-i2c-controller";
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "intel,ce4100-i2c-controller";
251 #gpio-cells = <2>;
252 compatible = "ti,pcf8575";
254 gpio-controller;
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "intel,ce4100-i2c-controller";
265 #gpio-cells = <2>;
266 compatible = "ti,pcf8575";
268 gpio-controller;
273 smard-card@b,3 {
274 compatible = "pci8086,2e69.2",
283 spi-controller@b,4 {
284 #address-cells = <1>;
285 #size-cells = <0>;
286 compatible =
296 compatible = "ti,pcm1755";
298 spi-max-frequency = <115200>;
302 compatible = "ti,pcm1609a";
304 spi-max-frequency = <115200>;
308 compatible = "atmel,at93c46";
310 spi-max-frequency = <115200>;
315 compatible = "pci8086,2e6d.2",
324 compatible = "pci8086,2e6e.2",
334 compatible = "pci8086,2e6f.2",
344 compatible = "pci8086,2e70.2",
354 compatible = "pci8086,2e70.2",
364 compatible = "pci8086,2e71.0",
374 compatible = "pci8086,701.1",
383 entertainment-encryption@10,0 {
384 compatible = "pci8086,702.1",
392 co-processor@11,0 {
393 compatible = "pci8086,703.1",
403 compatible = "pci8086,704.0",
413 #address-cells = <2>;
414 #size-cells = <1>;
415 compatible = "isa";
420 compatible = "intel,ce4100-rtc", "motorola,mc146818";
422 interrupt-parent = <&ioapic1>;
423 ctrl-reg = <2>;
424 freq-reg = <0x26>;