Searched +full:arm +full:- +full:gcc (Results 1 – 17 of 17) sorted by relevance
| /Kernel-v11.0.1/ |
| D | CMakeLists.txt | 9 # DEPRECATED: FREERTOS_CONFIG_FILE_DIRECTORY - but still supported if no freertos_config defined fo… 31 …message(WARNING " Using deprecated 'FREERTOS_CONFIG_FILE_DIRECTORY' - please update your project C… 44 …message(WARNING " FREERTOS_PORT is not set. Please specify it from top-level CMake file (example):… 47 " -DFREERTOS_PORT=GCC_ARM_CM4F\n" 50 " A_CUSTOM_PORT - Compiler: User Defined Target: User Defined\n" 51 " BCC_16BIT_DOS_FLSH186 - Compiler: BCC Target: 16 bit DOS Flsh186\n" 52 " BCC_16BIT_DOS_PC - Compiler: BCC Target: 16 bit DOS PC\n" 53 " CCS_ARM_CM3 - Compiler: CCS Target: ARM Cortex-M3\n" 54 … " CCS_ARM_CM4F - Compiler: CCS Target: ARM Cortex-M4 with FPU\n" 55 " CCS_ARM_CR4 - Compiler: CCS Target: ARM Cortex-R4\n" [all …]
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| D | History.txt | 35 was last assigned to the task - which due to priority inheritance, may not 42 FreeRTOSConfig.h. We thank @mdnr-g for their contribution. 46 vTaskResume or vTaskResumeFromISR. We thank @Moral-Hao for their 49 FreeRTOS handlers for PendSV and SVCall interrupts on Cortex-M devices. 54 + Add CMake support to allow the application writer to select the RISC-V 58 + Make taskYIELD available to unprivileged tasks for ARMv8-M ports. 59 + Update Cortex-M23 ports to not use PSPLIM_NS. We thank @urutva for their 61 + Update the SysTick setup code for ARMv8-M ports to first configure the clock 66 + Add the port-optimized task selection algorithm optionally available for 67 ARMv7-M ports to the ARMv8-M ports. We thank @jefftenney for their [all …]
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| /Kernel-v11.0.1/portable/ |
| D | CMakeLists.txt | 2 include( GCC/RISC-V/chip_extensions.cmake ) 6 include( IAR/RISC-V/chip_extensions.cmake ) 9 # FreeRTOS internal cmake file. Do not use it in user top-level project 16 # FreeRTOS internal cmake file. Do not use it in user top-level project 23 # 16-Bit DOS ports for BCC 32 # ARMv7-M port for Texas Instruments Code Composer Studio 37 # ARMv7E-M port for Texas Instruments Code Composer Studio 42 # ARMv7-R port for Texas Instruments Code Composer Studio 44 CCS/ARM_Cortex-R4/port.c 45 CCS/ARM_Cortex-R4/portASM.asm> [all …]
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| /Kernel-v11.0.1/.github/workflows/ |
| D | kernel-demos.yml | 1 name: FreeRTOS-Kernel Demos 5 WIN32-MSVC: 7 runs-on: windows-latest 9 - name: Checkout the FreeRTOS/FreeRTOS Repository 15 fetch-depth: 1 18 - name: Checkout Pull Request 23 - name: Add msbuild to PATH 24 uses: microsoft/setup-msbuild@v1.1 26 - name: Build WIN32-MSVC Demo 27 working-directory: FreeRTOS/Demo/WIN32-MSVC [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM_CM7/ |
| D | ReadMe.txt | 1 There are two options for running FreeRTOS on ARM Cortex-M7 microcontrollers. 2 The best option depends on the revision of the ARM Cortex-M7 core in use. The 5 revision of the Cortex-M7 core used in that microcontroller. If in doubt, use 9 The first option is to use the ARM Cortex-M4F port, and the second option is to 10 use the Cortex-M7 r0p1 port - the latter containing a minor errata workaround. 12 If the revision of the ARM Cortex-M7 core is not r0p1 then either option can be 13 used, but it is recommended to use the FreeRTOS ARM Cortex-M4F port located in 14 the /FreeRTOS/Source/portable/GCC/ARM_CM4F directory. 16 If the revision of the ARM Cortex-M7 core is r0p1 then use the FreeRTOS ARM 17 Cortex-M7 r0p1 port located in the /FreeRTOS/Source/portable/GCC/ARM_CM7/r0p1
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| /Kernel-v11.0.1/portable/ThirdParty/GCC/ARM_TFM/ |
| D | README.md | 4 services in Trusted Firmware M(TF-M) through Platform Security Architecture 5 (PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M55 and Cortex-M85 10 …y. See [PSA Resource Page](https://developer.arm.com/architectures/security-architectures/platform… 12 TF-M is an open source project. It provides a reference implementation of PSA 13 for Arm M-profile architecture. Please get the details from this [link](https://git.trustedfirmware… 18 …The implementation of APIs which are defined in ```\ns_interface\os_wrapper\mutex.h``` by tf-m-tes… 19 (tag: TF-Mv1.5.0 & TF-Mv1.6.0). The implementation is based on FreeRTOS mutex type semaphore. 25 * Step 2: build the nonsecure image. Please follow the **Build the Non-Secure Side** for details. 29 ### Get the TF-M source code 31 …firmware.org/TF-M/trusted-firmware-m.git/) to get the source code. This port is supported by TF-M … [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM7_LPC2000/ |
| D | portISR.c | 5 * SPDX-License-Identifier: MIT 30 /*----------------------------------------------------------- 31 * Components that can be compiled to either ARM or THUMB mode are 33 * to ARM mode, are contained in this file. 34 *----------------------------------------------------------*/ 41 + The functions are now also the same for both ARM and THUMB modes. 66 /*-----------------------------------------------------------*/ 72 * The scheduler can only be started from ARM mode, hence the inclusion of this 76 /*-----------------------------------------------------------*/ 81 * called from ARM mode. */ in vPortISRStartFirstTask() [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM7_LPC23xx/ |
| D | portISR.c | 5 * SPDX-License-Identifier: MIT 30 /*----------------------------------------------------------- 31 * Components that can be compiled to either ARM or THUMB mode are 33 * to ARM mode, are contained in this file. 34 *----------------------------------------------------------*/ 48 /*-----------------------------------------------------------*/ 54 * The scheduler can only be started from ARM mode, hence the inclusion of this 58 /*-----------------------------------------------------------*/ 63 * called from ARM mode. */ in vPortISRStartFirstTask() 66 /*-----------------------------------------------------------*/ [all …]
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| D | portmacro.h | 5 * SPDX-License-Identifier: MIT 32 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. 55 /* *INDENT-OFF* */ 59 /* *INDENT-ON* */ 61 /*----------------------------------------------------------- 68 *----------------------------------------------------------- 93 /*-----------------------------------------------------------*/ 96 #define portSTACK_GROWTH ( -1 ) 100 /*-----------------------------------------------------------*/ 107 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM7_AT91FR40008/ |
| D | portISR.c | 5 * SPDX-License-Identifier: MIT 30 /*----------------------------------------------------------- 31 * Components that can be compiled to either ARM or THUMB mode are 33 * to ARM mode, are contained in this file. 34 *----------------------------------------------------------*/ 55 /*-----------------------------------------------------------*/ 61 * The scheduler can only be started from ARM mode, hence the inclusion of this 65 /*-----------------------------------------------------------*/ 70 * called from ARM mode. */ in vPortISRStartFirstTask() 73 /*-----------------------------------------------------------*/ [all …]
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| D | portmacro.h | 5 * SPDX-License-Identifier: MIT 32 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. 55 /* *INDENT-OFF* */ 59 /* *INDENT-ON* */ 61 /*----------------------------------------------------------- 68 *----------------------------------------------------------- 93 /*-----------------------------------------------------------*/ 96 #define portSTACK_GROWTH ( -1 ) 110 /*-----------------------------------------------------------*/ 116 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM7_AT91SAM7S/ |
| D | portISR.c | 5 * SPDX-License-Identifier: MIT 30 /*----------------------------------------------------------- 31 * Components that can be compiled to either ARM or THUMB mode are 33 * to ARM mode, are contained in this file. 34 *----------------------------------------------------------*/ 57 /*-----------------------------------------------------------*/ 63 * The scheduler can only be started from ARM mode, hence the inclusion of this 67 /*-----------------------------------------------------------*/ 72 * called from ARM mode. */ in vPortISRStartFirstTask() 75 /*-----------------------------------------------------------*/ [all …]
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| D | portmacro.h | 5 * SPDX-License-Identifier: MIT 32 + Modified portENTER_SWITCHING_ISR() to allow use with GCC V4.0.1. 55 /* *INDENT-OFF* */ 59 /* *INDENT-ON* */ 61 /*----------------------------------------------------------- 68 *----------------------------------------------------------- 93 /*-----------------------------------------------------------*/ 96 #define portSTACK_GROWTH ( -1 ) 100 /*-----------------------------------------------------------*/ 107 * and portEXIT_SWITCHING_ISR can only be called from ARM mode, but [all …]
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| /Kernel-v11.0.1/include/ |
| D | list.h | 5 * SPDX-License-Identifier: MIT 41 * points to this marker - even though it is at the tail of the list. This 73 * instructions generated by the IAR, ARM and GCC compilers when the respective 97 /* *INDENT-OFF* */ 101 /* *INDENT-ON* */ 128 …#define listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrity… 129 …#define listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ) ( pxItem )->xListItemIntegrity… 130 …#define listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ) ( pxList )->xListIntegrityValu… 131 …#define listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ) ( pxList )->xListIntegrityValu… 135 … configASSERT( ( ( pxItem )->xListItemIntegrityValue1 == pdINTEGRITY_CHECK_VALUE ) &&… [all …]
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| /Kernel-v11.0.1/portable/IAR/ARM_CM4F/ |
| D | port.c | 5 * SPDX-License-Identifier: MIT 29 /*----------------------------------------------------------- 30 * Implementation of functions defined in portable.h for the ARM CM4F port. 31 *----------------------------------------------------------*/ 45 …LL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ 66 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7 102 /* The systick is a 24-bit counter. */ 110 /* For strict compliance with the Cortex-M spec the task start address should 111 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ 158 /*-----------------------------------------------------------*/ [all …]
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| /Kernel-v11.0.1/portable/RVDS/ARM_CM4F/ |
| D | port.c | 5 * SPDX-License-Identifier: MIT 29 /*----------------------------------------------------------- 30 * Implementation of functions defined in portable.h for the ARM CM4F port. 31 *----------------------------------------------------------*/ 42 …LL_INTERRUPT_PRIORITY must not be set to 0. See http: /*www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ 68 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7 99 /* The systick is a 24-bit counter. */ 107 /* For strict compliance with the Cortex-M spec the task start address should 108 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ 152 /*-----------------------------------------------------------*/ [all …]
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| /Kernel-v11.0.1/portable/GCC/ARM_CM4F/ |
| D | port.c | 5 * SPDX-License-Identifier: MIT 29 /*----------------------------------------------------------- 30 * Implementation of functions defined in portable.h for the ARM CM4F port. 31 *----------------------------------------------------------*/ 59 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7 95 /* The systick is a 24-bit counter. */ 98 /* For strict compliance with the Cortex-M spec the task start address should 99 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */ 119 /* Let the user override the pre-loading of the initial LR with the address of 157 /*-----------------------------------------------------------*/ [all …]
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