Lines Matching +full:arm +full:- +full:gcc
35 was last assigned to the task - which due to priority inheritance, may not
42 FreeRTOSConfig.h. We thank @mdnr-g for their contribution.
46 vTaskResume or vTaskResumeFromISR. We thank @Moral-Hao for their
49 FreeRTOS handlers for PendSV and SVCall interrupts on Cortex-M devices.
54 + Add CMake support to allow the application writer to select the RISC-V
58 + Make taskYIELD available to unprivileged tasks for ARMv8-M ports.
59 + Update Cortex-M23 ports to not use PSPLIM_NS. We thank @urutva for their
61 + Update the SysTick setup code for ARMv8-M ports to first configure the clock
66 + Add the port-optimized task selection algorithm optionally available for
67 ARMv7-M ports to the ARMv8-M ports. We thank @jefftenney for their
71 @Moral-Hao for their contribution.
74 @Moral-Hao for their contribution.
75 + Update xTaskNotifyWait and ulTaskNotifyTake to remove the non-deterministic
82 is bigger than the inherited priority. We thank @Moral-Hao for their
89 of the stack. We thank @bebebib-rs for their contribution.
99 - Introduce Access Control List (ACL) feature to allow the application
101 - Update the system call entry mechanism to only require one Supervisor
103 - Wrap parameters for system calls with more than four parameters in a
105 - Fix 2 possible integer overflows.
106 - Convert some asserts to run time parameter checks.
114 - Lan Luo, Zixia Liu of School of Computer Science and Technology,
116 - Xinwen Fu of Department of Computer Science, University of
118 - Xinhui Shao, Yumeng Wei, Huaiyu Yan, Zhen Ling of School of
140 and de-reference it, now verify that the calling task has required
144 - vQueueDelete
145 - xQueueCreateMutex
146 - xQueueCreateMutexStatic
147 - xQueueCreateCountingSemaphore
148 - xQueueCreateCountingSemaphoreStatic
149 - xQueueGenericCreate
150 - xQueueGenericCreateStatic
151 - xQueueCreateSet
152 - xQueueRemoveFromSet
153 - xQueueGenericReset
154 - xTaskCreate
155 - xTaskCreateStatic
156 - vTaskDelete
157 - vTaskPrioritySet
158 - vTaskSuspendAll
159 - xTaskResumeAll
160 - xTaskGetHandle
161 - xTaskCallApplicationTaskHook
162 - vTaskList
163 - vTaskGetRunTimeStats
164 - xTaskCatchUpTicks
165 - xEventGroupCreate
166 - xEventGroupCreateStatic
167 - vEventGroupDelete
168 - xStreamBufferGenericCreate
169 - xStreamBufferGenericCreateStatic
170 - vStreamBufferDelete
171 - xStreamBufferReset
176 - David Reiss of Meta Platforms, Inc.
177 - Lan Luo, Xinhui Shao, Yumeng Wei, Zixia Liu, Huaiyu Yan and Zhen Ling
180 - Xinwen Fu of Department of Computer Science, University of
182 - Yueqi Chen, Zicheng Wang, Minghao Lin, Jiahe Wang of University of
184 + Add Cortex-M35P port. Contributed by @urutva.
185 + Add embedded extension (RV32E) support to the IAR RISC-V port.
190 - xTaskGetStaticBuffers
191 - xQueueGetStaticBuffers
192 - xQueueGenericGetStaticBuffers
193 - xSemaphoreGetStaticBuffer
194 - xEventGroupGetStaticBuffer
195 - xStreamBufferGetStaticBuffers
196 - xMessageBufferGetStaticBuffers
202 by @keith-packard.
212 + Add macros used in FreeRTOS-Plus libraries. Contributed by @Holden.
214 + Add assertions to ARMv8-M ports to detect when FreeRTOS APIs are called from
219 + Add the ability to use Cortex-R5 port on the parts without FPU.
221 + Update interrupt priority asserts for Cortex-M ports so that these do not fire
223 + Update ARMv7-M ports to ensure that kernel interrupts run at the lowest priority.
224 configKERNEL_INTERRUPT_PRIORITY is now obsolete for ARMv7-M ports and brings
225 these ports inline with the newer ARMv8-M ports. Contributed by @chrisnc.
226 + Fix build issue in POSIX GCC port on Windows Subsystem for Linux (WSL). Contributed
237 + ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that
245 + ARMv7-M and ARMv8-M MPU ports: It was possible for an unprivileged task
254 + ARMv7-M and ARMv8-M MPU ports: It was possible for a third party that
264 + ARMv7-M MPU ports: It was possible to configure overlapping memory
270 + Add support for ARM Cortex-M55.
271 + Add support for ARM Cortex-M85. Contributed by @gbrtth.
272 + Add vectored mode interrupt support to the RISC-V port.
273 + Add support for RV32E extension (Embedded Profile) in RISC-V GCC port.
276 - Add a check to heap_2 to track if a memory block is allocated to
280 - Add a new flag configHEAP_CLEAR_MEMORY_ON_FREE to heap_2, heap_4
283 - Add a new API pvPortCalloc to heap_2, heap_4 and heap_5 which has the same
285 - Update the pointer types to portPOINTER_SIZE_TYPE. Contributed by
291 and stream buffers to be used differently - for example, some for inter core
303 is not tied to newlib and can be used with other c-runtime libraries also.
309 + Add support for 16 MPU regions to the GCC Cortex-M33 ports.
310 + Add ARM Cortex-M7 r0p0/r0p1 Errata 837070 workaround to ARM CM4 MPU ports.
312 when using CM4 MPU ports on a Cortex-M7 r0p0/r0p1 core.
313 + Add configSYSTICK_CLOCK_HZ to Cortex-M0 ports. This is needed to support
322 observed when strict-aliasing and link time optimization are enabled.
327 without any warning with -Wmissing-prototypes compiler option.
339 The new function xTimerGetAutoReload() provides the auto-reload state as
350 + Fix a warning in tasks.c when compiled with -Wduplicated-branches
351 GCC option. Contributed by @pierrenoel-bouteville-act.
360 Contributed by @felipe-iar.
361 + Add tick type is atomic flag when tick count is 16-bit to PIC24 port. This
364 + Fix offset-out-of-range errors for GCC CM3/CM4 mpu ports when
366 + Remove #error when RISC-V port is compiled on a 64-bit RISC-V platform.
368 + Fix ullPortInterruptNesting alignment in Cortex-A53 port so that it is
369 8-byte aligned. This fixes the unaligned access exception. Contributed
373 + Change FreeRTOS IRQ Handler for Cortex-A53 SRE port to store and restore
382 + ARMv7-M and ARMv8-M MPU ports – prevent non-kernel code from calling the
392 See https://www.FreeRTOS.org/FreeRTOS-V10.4.5.html
398 + Introduce ulTaskGetIdleRunTimePercent() to complement the pre-existing
399 ulTaskGetIdleRunTimeCounter(). Whereas the pre-existing function returns
405 + ARMv8-M secure-side port: Tasks that call secure functions from the
406 non-secure side of an ARMv8-M MCU (ARM Cortex-M23 and Cortex-M33) have two
407 contexts - one on the non-secure side and one on the secure-side. Previous
408 versions of the FreeRTOS ARMv8-M secure-side ports allocated the structures
409 that reference secure-side contexts at run time. Now the structures are
414 Applications that only use FreeRTOS code on the non-secure side, such as
415 those running third-party code on the secure side, are not affected by
423 post to its own event queue. A consequence of this change is that auto-
435 (configMAX_PRIORITIES - 1) should it be set to a value above that priority.
447 + Update the ESP32 port and TF-M (Trusted Firmware M)code to the latest from
455 Multiprocessing Kernel. https://github.com/FreeRTOS/FreeRTOS-Kernel/tree/smp
459 …V10.4.3 is included in the 202012.00 LTS release. Learn more at https:/freertos.org/lts-libraries…
461 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
466 - xTaskCreateRestricted
467 - xTaskCreateRestrictedStatic
468 - vTaskAllocateMPURegions
473 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
475 + Fix an issue in the ARMv8-M ports that caused BASEPRI to be masked
484 + Re-introduce uxTopUsedPriority to support OpenOCD debugging.
491 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
500 See https://www.FreeRTOS.org/FreeRTOS-V10.4.x.html
509 https://www.freertos.org/RTOS-task-notifications.html for more information.
510 + Kernel ports that support memory protection units (MPUs): The ARMv7-M and
511 ARMv8-M MPU ports now support a privilege access only heap. The ARMv7-M
515 the Flash memory. The ARMv8-M MPU ports now support tickless idle mode.
516 See https://www.freertos.org/FreeRTOS-MPU-memory-protection-unit.html
522 collaborative development in Git. The auto-formated code is not identical
536 see https://github.com/FreeRTOS/FreeRTOS-Kernel/commits/main
541 See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
543 + ./FreeRTOS-Labs directory was removed from this file. The libraries it
548 See https://www.FreeRTOS.org/FreeRTOS-V10.3.x.html
552 + Added RISC-V port for the IAR compiler.
557 + Correct alignment of stack top in RISC-V port when
560 + The RISC-V machine timer compare register can now be for any HART, whereas
562 + Update the sequence used to update the 64-bit machine timer
563 compare register on 32-bit cores to match that suggested in RISC-V
565 + Added tickless low power modes into the ARM, IAR and GCC Cortex-M0 compiler
567 + Updated the behaviour of the ARMv7-M MPU (Memory Protection Unit) ports to
568 match that of the ARMv8-M ports whereby privilege escalations can only
573 + Added contributed port and demo application for a T-Head (formally C-SKY)
591 + Added LPC51U68 Cortex-M0+ demos for GCC (MCUXpresso), Keil and IAR
600 + Added ARM Cortex-M23 port layer to complement the pre-existing ARM
601 Cortex-M33 port layer.
602 + The RISC-V port now automatically switches between 32-bit and 64-bit
604 + Introduced the portMEMORY_BARRIER macro to prevent instruction re-ordering
605 when GCC link time optimisation is used.
606 + Introduced the portDONT_DISCARD macro to the ARMv8-M ports to try and
609 + Introduced the portARCH_NAME to provide additional data to select semi-
611 + Cortex-M33 and Cortex-M23 ports now correctly disable the MPU before
614 + Added Nuvoton NuMaker-PFM-M2351 ARM Cortex-M23 demo.
615 + Added LPC55S69 ARM Cortex-M33 demo.
621 + Added GCC RISC-V MCU port with three separate demo applications.
622 + Included pre-existing ARM Cortex-M33 (ARMv8-M) GCC/ARMclang and IAR ports
627 re-added to a list, so now the timer's active status is stored separately.
661 debugger plug-ins.
677 struct to be renamed - set configENABLE_BACKWARD_COMPATIBILITY to 1 if
680 functionality in a more user friendly way - previously the generic thread
685 + Bug fix in vPortEnableInterrupt() for the GCC Microblaze port to protect
690 configSTACK_DEPTH_TYPE in place of uint16_t - that change should have been
692 16-bit limit on stack size specifications) was introduced.
731 - Improve the formatting of text that displays the available netword
733 - Introduce ipconfigSOCKET_HAS_USER_WAKE_CALLBACK option to enable a user
742 + Stream Buffers - see https://www.FreeRTOS.org/RTOS-stream-buffer-example.html
743 + Message Buffers - see https://www.FreeRTOS.org//RTOS-message-buffer-example.html
757 + Cortex-M ports push additional register prior to calling
758 vTaskSwitchContext to ensure 8-byte alignment is maintained. Only
760 requires 8-byte alignment.
762 Cortex-M devices.
765 + Updated GCC TriCore port to build with later compiler versions.
767 + The uxNumberOfItems member of List_t is now volatile - solving an issue
784 even called - previously it was only possible to abort from within the
797 checking, or high water mark checking/viewing, is in use - removing the
808 + Priority dis-inheritance behaviour has been enhanced in the case where a
820 testing purposes - although setting configUSE_16_BIT_TICKS to 1 can also
822 + Ensure the Cortex-M SysTick count is cleared to zero before starting the
824 + Add configASSERT() into ARM Cortex-M ports to check the number of priority
826 + Clear the 'control' register before starting ARM Cortex-M4F ports in case
845 See https://www.FreeRTOS.org/FreeRTOS-V9.html
855 + GCC ARM Cortex-A port: Introduced the configUSE_TASK_FPU_SUPPORT
858 + GCC ARM Cortex-A port: It is now possible to automatically save and
862 + All ARM Cortex-M3/4F/7 ports: Clear the least significant bit of the task
864 strict compliance with the ARM Cortex-M3/4/7 architecture documentation
866 + Added GCC and Keil ARM Cortex-M4F MPU ports - previously the MPU was only
867 supported on ARM Cortex-M3.
868 + ARM Cortex-M3/4F MPU ports: Update to fully support the FreeRTOS V9.0.0
872 + All ARM Cortex-M3/4F/7 ports: Add additional barrier instructions to the
874 + All ARM Cortex-M0 ports: Prevent an item being left on the stack of the
878 + Add an ARM Cortex-M4F port for the MikroC compiler. Ensure to read the
882 + IAR32 GCC port: Correct vPortExitCritical() when
894 + Move the Xilinx UltraScale Cortex-R5 demo into the main distribution.
896 + Add Microchip CEC1302 (ARM Cortex-M4F) demos for GCC, Keil and MikroC
903 NOTE - See https://www.FreeRTOS.org/FreeRTOS-V9.html for details
911 /FreeRTOS/demo/WIN32-MSVC-Static-Allocation-Only directory is provided as
913 + Minor run-time optimisations.
923 + Major new feature - tasks, semaphores, queues, timers and event groups can
926 + Major new features - Added the xTaskAbortDelay() API function which allows
930 + Updates necessary to allow FreeRTOS to run on 64-bit architectures.
939 later re-use.
953 the array that will be used as the FreeRTOS heap, and in-so-doing, place
962 + Replicate previous Cortex-M4F and Cortex-M7 optimisations in some
963 Cortex-M3 port layers.
971 + Added ARM Cortex-A53 64-bit port.
972 + Added a port and demo for the ARM Cortex-A53 64-bit cores on the Xilinx
974 + Added Cortex-M7 SAME70 GCC demo.
987 + New IAR and GCC Cortex-R ports for microprocessors that do not use an ARM
1008 WolfSSL's re-branding.
1015 + Add demo applications for Renesas RZ/T (Cortex-R), PIC32MZ EF (PIC32 with
1024 + Added Intel IA32/x86 32-bit port.
1030 + Remove the restriction that prevented tick-less idle implementations
1045 + Update heap_4 and heap_5 to allow use on 64-bit processors.
1047 + General improved tick-less idle behaviour.
1059 + Added Atmel Studio / GCC project for the SAMV71 (ARM Cortex-M7)
1084 + Some updates to the Xilinx Microblaze GCC port.
1085 + Added ARM Cortex-M4F port for Texas Instruments Code Composer Studio.
1086 + Added ARM Cortex-M7 r0p1 port layer for IAR, GCC and Keil which contains a
1087 minor errata work around. All other ARM Cortex-M7 core revisions should
1088 use the ARM Cortex-M4F port.
1090 + Change some data types from uint32_t to size_t in preparation for 64-bit
1099 + Added demo application for TI's ARM Cortex-M4F based MSP432
1101 + Added demo application for STM32F ARM Cortex-M7 based microcontroller
1103 + Added demo application for Atmel SAMV71 ARM Cortex-M7 based
1116 details: https://www.FreeRTOS.org/RTOS-task-notifications.html
1133 + GCC, IAR and Keil Cortex-M4F ports now use more inlining (performance
1139 tick count to be read atomically (performance benefits - especially when
1142 application writer to provide their own heap array - and in so doing
1148 + configASSERT()s in all Cortex-M ports used to test the lowest 5 bits of
1154 + Cortex-A5 GIC-less port no longer passes the address of the interrupting
1156 + Fix an issue in FreeRTOS-MPU where an attempt was made to free the stack
1167 + Added port and demo application for Atmel SAMA5D4 Cortex-A5 MPU.
1168 + Added demo application for Altera Cyclone V Cortex-A9 MPU.
1192 By popular requests - a minor patch to V8.1.0 to re-instate the ability to
1203 span multiple non-contiguous memory regions.
1204 + Updated all Cortex-A9 ports to help trap a couple of common usage errors -
1208 + Update all Cortex-A9 ports to remove obsolete mode switches prior to
1211 + Update all Cortex-M3/4F ports to trap a non interrupt safe API function
1221 alternative to pdTICKS_PER_MS - both of which can be used to convert a
1223 + Fix a bug in the Tasking compiler's Cortex-M port that resulted in an
1229 + Updated the CCS Cortex-R4 port to enable it to be built with the latest
1234 + Two Renesas RX64M ports (RXv2 core) and demos introduced, one for the GCC
1236 + Generic IAR Cortex-A5 port (without any reliance on a GIC) introduced.
1249 + Update the IAR and DS-5/ARM RZ demos to target the official RZ RSK
1264 + Minor fixes to FreeRTOS+FAT SL - namely seeking beyond the end of a file
1266 + Ensure Cortex-A9 system registers are only ever accessed as 32-bit values,
1280 https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html
1282 FreeRTOS V8.x.x is a drop-in compatible replacement for FreeRTOS V7.x.x,
1287 See https://www.FreeRTOS.org/upgrading-to-FreeRTOS-V8.html for full
1292 + Event groups - see https://www.FreeRTOS.org/FreeRTOS-Event-Groups.html
1293 + Centralised deferred interrupt processing - see
1304 microcontroller - see
1305 https://www.FreeRTOS.org/STM32L-discovery-low-power-tickless-RTOS-demo.html
1311 + Update the GCC/Eclipse Win32 simulator demo to make better use of Eclipse
1317 + Add Cortex-A9 GCC port layer.
1323 V7.6.0 changes some behaviour when the co-operative scheduler is used (when
1325 behaviour of the pre-emptive scheduler is unchanged - the following
1338 set to 0, so the normal pre-emptive scheduler is being used, then task B
1344 + Update the PIC32MX port layer to re-introduce some ehb instructions that
1353 + Slight improvement to the Cortex-M4F port layers where previously one
1359 + Update the Cortex-M0 port layers to allow the scheduler to be started
1365 correctly with the updated co-operative scheduling behaviour.
1378 same tick interrupt - revert to that original behaviour.
1380 + Introduced the prvTaskExitError() function to Cortex-M0, Cortex-M3/4
1381 and Cortex-M4F ports. prvTaskExitError() is used to trap tasks that
1384 + The Cortex-M0 version of portSET_INTERRUPT_MASK_FROM_ISR and
1386 + Improved behaviour and robustness of the default Cortex-M tickless idle
1389 all Cortex-M4F ports.
1390 + Add Cortex-M0 port for Keil.
1397 + Update FreeRTOS+UDP to V1.0.1 - including direct integration of the
1411 + Added demo for the Atmel SAMD20 Cortex-M0+. The demo includes
1413 + Added a demo for the Infineon Cortex-M0 that can be built with the IAR
1414 Keil and GCC tools.
1415 + Updated the Infineon XMC4000 demos for IAR, Keil, GCC and Tasking tools,
1424 V7.5.2 makes the new Cortex-M vPortCheckInterruptPriority() function
1450 + Core kernel files now pass PC-Lint V8 static checking without outputting
1463 + ARM Cortex-A9 IAR
1464 + ARM Cortex-A9 ARM compiler
1497 + Fix build error when R4 port is build in co-operative mode.
1512 the yield macros of Cortex-M and Cortex-R port layers. For efficiency
1513 the Cortex-M port layer "yield" and "yield" from ISR are now implemented
1535 https://www.FreeRTOS.org/Pend-on-multiple-rtos-objects.html
1537 ARM Cortex-M3 port layers.
1547 pre-processor macro for backward compatibility with the previous name.
1551 + Updated the CCS Cortex-R4 port layer to replace the CLZ assembler function
1553 the CCS ARM compiler.
1559 + Minor changes to tasks.c that allow the state viewer plug-ins to display
1576 + Reworked the Cortex-M3 and Cortex-M4F port layers for GCC, Keil and IAR to
1583 macros in the Cortex-M ports. The save macro now returns the previous
1593 + Added SAM3 demos targeting the ATSAM3S-EK2 and ATSAM3X-EK evaluation
1604 + Added a FreeRTOS+ sub-directory. The directory contains some FreeRTOS+
1608 + Added a demo that targets the Atmel SAM4S Cortex-M4 based microcontroller.
1610 GCC compiler.
1622 ensure it compiles with the latest ARM GCC compilers from Linaro.
1626 + Add #error macros into the Keil and IAR Cortex-M ports to ensure they
1629 + Added comments in the FreeRTOSConfig.h files associated with Cortex-M3 and
1630 Cortex-M4 demos stating that the configMAX_SYSCALL_INTERRUPT_PRIORITY
1634 + Added two new list handling macros - for internal use only in upcoming new
1654 + Cortex-M3 Tasking
1658 + Cortex-M0 IAR
1659 + Cortex-M0 GCC
1660 + Cortex-M4F GCC (with full floating point support)
1670 + NXP LPC1114 GCC/LPCXpresso
1672 + Infineon XMC4500 GCC/Atollic
1693 + Correct the alignment given to the initial stack of Cortex-M4F tasks.
1697 the port making use of the traceTASK_DELETE() trace macros - leaving this
1703 V7.1.0 as it broke the IAR plug-in.
1737 + Cortex-M4F IAR port.
1738 + Cortex-M4F Keil/RVDS port.
1739 + TriCore GCC port.
1745 + ST STM32F407 using the IAR Embedded Workbench for ARM, and demonstrated on
1746 the IAR STM32F407ZG-SK starter kit.
1747 + Infineon TriCore TC1782, using the GCC compiler, demonstrated on the
1755 can execute stand alone - without being connected to the debugger.
1759 return parameter sub-strings.
1766 ports - including the new TriCore port where the checked pointer does not
1769 up when a task is deleted - again this is required by the TriCore port.
1777 + The legacy trace mechanism has been completely removed - it has been
1784 - the queue structure includes an additional member to hold the queue
1787 - the queue structure includes an additional member to hold a queue
1790 - the TCB structure includes an additional member to hold a task number
1795 + Added two new trace macros - traceTASK_PRIORITY_INHERIT() and
1849 + All ARM IAR projects have been updated to build with the latest V6.2.x
1850 versions of the IAR Embedded Workbench for ARM tools (EWARM). This was
1854 + The old Virtex-4 Microblaze demo has been marked as deprecated. Please
1855 use the brand new Spartan-6 port and demo in its place.
1877 SoftConsole (GCC/Eclipse) tool chains.
1905 transparent to users and do not effect the pre-existing API.
1936 GCC, Keil, and RVDS build tools, and all use the PSoC Creator IDE.
1942 revisions, and the new J-Link debug interface DLL.
1966 allows them to effectively start in the Suspended state - a feature that
1969 + Added ports for the Renesas RX62N using IAR, GCC and Renesas tool suites.
1992 https://www.FreeRTOS.org/RTOS-contributed-ports.html
2002 + SuperH SH7216 (SH2A-FPU) port and demo application added.
2006 be defined when a memory protection unit (MPU) is being used - and then
2011 + Changed all GCC ARM 7 ports to use 0 as the SWI instruction parameter.
2013 newer GCC releases do not permit this.
2023 + Altered pxPortInitialiseStack() for all Cortex-M3 ports to ensure the
2027 The following minor changes only effect the Cortex-M3 MPU port:
2047 which does not include MPU support, and FreeRTOS-MPU which does.
2049 in support of FreeRTOS-MPU.
2057 + ARM7 GCC demo interrupt service routines wrappers have been modified to
2061 setting up the initial stack of a task - removing the need for
2062 THUMB_INTERWORK to be defined. This also allows THUMB mode and ARM mode
2067 + The linker scripts used with command line GCC demos have been updated to
2077 + Posix simulator has been upgraded - see the corresponding WEB page on the
2127 + Added a new demo application for the Atmel AT91SAM3U Cortex-M3 based
2129 + Added a new demo application for the NXP LPC1766 Cortex-M3 based
2136 statistics gathering feature - and include a served WEB page that
2180 + Added Coldfire MCF52233 WEB server demo using GCC and Eclipse.
2184 + Included FreeRTOS-uIP - a faster uIP. This is not yet complete.
2194 + BUG FIX - set the PIC32 definition of portSTACK_GROWTH to the correct
2195 value of -1.
2207 + Completely re-written port for ColdFire GCC.
2226 (Keil, GCC and IAR) to test the new configMAX_SYSCALL_INTERRUPT_PRIORITY
2237 allows the omit-frame-pointer optimisation to be turned off.
2245 used to allow the use of a floating point co-processor. The
2263 + Added the ST Cortex-M3 drivers into the Demo/Common/Drivers directory to
2287 + Support added for the new Luminary Micro LM3S3768 and LM3S3748 Cortex-M3
2300 + Efficiency improvements to the Cortex-M3 port layer. NOTE: This
2306 M3 port layer (bringing it up to the same standard as the IAR and GCC
2308 + Ports that used the arm-stellaris-eabi-gcc tools have been converted to
2309 use the arm-non-eabi-gcc tools.
2317 + Removed some redundant casting that was generating warnings - but was
2322 + Updated all IAR ARM projects to use V5.11 of the IAR Embedded Workbench
2323 for ARM.
2328 + Updating demos to allow more to run with the co-operative scheduler.
2329 + Fixed co-operative scheduler behaviour upon the occurrence of a tick
2332 + ARM7 GCC ports no longer use the IRQ attribute.
2343 + Added the STM32 primer demo project for the GCC compiler and Ride IDE.
2355 ARM7/9 GCC ports only. The portENTER_SWITCHING_ISR() and
2357 ensure correct behaviour no matter which GCC version is used, with or
2358 without the -fomit-frame-pointer option, and at all optimisation levels.
2365 xQueueSend() function - which is maintained for backward compatibility.
2373 + Updated the GCC port for the Cortex M3 to include the
2376 + Optimised the GCC and IAR port layer code - specifically the context
2386 + Added an lwIP demo for the STR9 - thanks ST for assistance.
2408 + Added STMicroelectronics STM32 Cortex-M3 demo application.
2409 + Updated ustdlib.c for the GCC LM3S6965 demo.
2413 + Introduced configKERNEL_INTERRUPT_PRIORITY to the IAR Cortex-M3, PIC24
2416 + Updated the PIC24 and dsPIC demos to build with V3.0 of the PIC30 GCC
2429 + Added AVR32 AT32UC3A ports for GCC and IAR.
2430 + Added -fomit-frame-pointer option to lwIP SAM7X demo makefile.
2438 + Added Cortex-M3 LM3S811 demos for GCC and IAR tools.
2442 + Added STR750 ARM7 port using the Raisonance RIDE/GCC tools.
2443 + Added -fomit-frame-pointer option to Rowley ARM7 demos as work around
2444 to GCC bug at some optimisation levels.
2447 + CO-ROUTINE BUG FIX: Removed the call to prvIsQueueEmpty from within
2479 + Modified the AVR demo applications to demonstrate the use of co-routines.
2494 + When ending the scheduler - do not try to attempt a context switch when
2510 + Added a port and demo application for the Cortex-M3 target using the IAR
2512 + The ARM Cortex-m3 Rowley projects have been updated to use V1.6 of the
2515 the project will link correctly when using the command line GCC tools
2526 + Port and demo application added for MC9S12 using GCC, thanks to
2550 + Improved the ARM CORTEX M3 ports so they now only have to service
2559 + Added new RTOS port for Luminary Micros ARM CORTEX M3 microcontrollers.
2560 + Added new co-routine functionality.
2575 This is to allow co-routines to run when there are no tasks.
2583 + Changed the WinAVR makefile to make chars signed - needed for the
2584 co-routine code if BaseType_t is set to char.
2585 + Added new demo application file crflash.c. This demonstrates co-routine
2586 functionality including passing data between co-routines.
2587 + Added new demo application file crhook.c. This demonstrates co-routine
2589 a co-routine.
2593 demo co-routines as an example of their use.
2594 + Updated the H8S demo to compile with the latest version of GCC.
2600 some systems when the code is executed using a j-link debugger. The
2601 j-link macro file configures the PLL before the code executes so
2605 + GCC port now contain all assembler code in a single asm block rather than
2607 + GCC LPC2000 code now explicitly uses R0 rather than letting the assembler
2618 + Modified the GCC ARM7 port layer to allow use with GCC V4.0.0 and above.
2630 + Added command line GCC support to the SAM7X lwIP demo. Previously the
2643 Changes between V3.2.1 and V3.2.2 - Released 23 September, 2005
2648 + Updated the J-Link macro file included with the SAM7X uIP demo project
2649 to allow the demo board to be reset over the J-Link.
2651 Changes between V3.2.0 and V3.2.1 - Released 1 September, 2005
2666 Changes between V3.1.1 and V3.2.0 - Released 29 June, 2005
2672 One port just mirrors the existing GCC port. The other port was provided
2686 Changes between V3.1.0 and V3.1.1 - Released 21st June, 2005
2703 Changes between V3.0.0 and V3.1.0 - Released 11th June, 2005
2721 Changes between V3.0.0 and V2.6.1 - Released 23rd April, 2005
2731 - API changes
2741 - New ports
2750 - Directory name changes
2755 + The source/portable/GCC/ARM7 directory has been renamed
2756 source/portable/GCC/ARM7_LPC2000 so it is compatible with the naming
2757 of other GCC ARM7 ports.
2765 - Kernel and miscellaneous changes changes
2776 in each of FreeRTOS/Demo subdirectories - as it's settings relate to
2791 + The GCC AVR port is now build using the standard make utility. The
2817 Changes between V2.6.0 and V2.6.1 - Released Feb 22, 2005
2826 + AVR port - Replaced the inb() and outb() functions with direct memory
2829 + GCC LPC2106 port - removed the 'static' from the definition of
2832 + GCC LPC2106 port - Corrected the optimisation options in the batch files
2834 -o is replaced by an uppercase -O.
2835 + Tasks.c - The strcpy call has been removed when copying across the task
2838 used on ARM architectures.
2844 + SAM7 USB driver - Replaced the duplicated RX_DATA_BK0 in the interrupt
2848 Changes between V2.5.5 and V2.6.0 - Released January 16, 2005
2858 Changes between V2.5.4 and V2.5.5 - Released January 3, 2005
2879 Changes between V2.5.3 and V2.5.4 - Released Dec 1, 2004
2888 Changes between V2.5.2 and V2.5.3 - Released Nov 2, 2004
2890 The critical section handling functions have been changed for the GCC ARM7
2894 tasks context. This allows the GCC ARM7 port to be used at all
2895 optimisation levels - including -Os.
2902 Changes between V2.5.1 and V2.5.2 - Released Oct 26, 2004
2908 Changes between V2.5.0 and V2.5.1 - Released Oct 9, 2004
2911 + Extra comments added to the GCC ARM7 port.c and portISR.c files.
2914 + Within the GCC ARM7 serial drivers an extra check is made to ensure
2921 Changes between V2.4.2 and V2.5.0 - Released Aug 12, 2004
2924 schemes - so you can choose the most appropriate for your application.
2940 Changes between V2.4.1 and V2.4.2 - Released July 14, 2004
2945 Changes between V2.4.0 and V2.4.1 - Released July 2, 2004
2947 + Rationalised the ARM7 port version of portEXIT_CRITICAL() -
2952 Changes between V2.4.0 and V2.3.1 - Released June 30, 2004
2954 + Added the first ARM7 port - thanks to Bill Knight for the assistance
2961 Changes between V2.3.0 and V2.3.1 - Released June 25, 2004
2968 Changes between V2.2.0 and V2.3.0 - Released June 19, 2004
2980 Changes between V2.1.1 and V2.2.0 - Released May 18, 2004
2989 Changes between V2.1.0 and V2.1.1 - Released March 12, 2004
2991 + Bug fix - pxCurrentTCB is now initialised before the call to
2996 Changes between V2.0.0 and V2.1.0 - Released Feb 29, 2004
3032 Changes between V1.2.6 and V2.0.0 - Released Jan 31, 2004
3051 has a higher priority than the calling task - assuming the kernel is
3056 Changes between V1.2.5 and V1.2.6 - Released December 31, 2003
3062 0x18 to 0x08 - where it should have always been. The incorrect address
3118 The zip file also contains a pre-release version of the PIC18 port. This
3158 at improving the context switch time - with is now approximately 10% faster.