Lines Matching +full:arm +full:- +full:gcc
5 * SPDX-License-Identifier: MIT
29 /*-----------------------------------------------------------
30 * Implementation of functions defined in portable.h for the ARM CM4F port.
31 *----------------------------------------------------------*/
59 /* Constants used to detect a Cortex-M7 r0p1 core, which should use the ARM_CM7
95 /* The systick is a 24-bit counter. */
98 /* For strict compliance with the Cortex-M spec the task start address should
99 * have bit-0 clear, as it is loaded into the PC on exit from an ISR. */
119 /* Let the user override the pre-loading of the initial LR with the address of
157 /*-----------------------------------------------------------*/
197 /*-----------------------------------------------------------*/
211 pxTopOfStack--; in pxPortInitialiseStack()
214 pxTopOfStack--; in pxPortInitialiseStack()
216 pxTopOfStack--; in pxPortInitialiseStack()
220 pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ in pxPortInitialiseStack()
225 pxTopOfStack--; in pxPortInitialiseStack()
228 pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ in pxPortInitialiseStack()
232 /*-----------------------------------------------------------*/
252 * about code appearing after this function is called - making ulDummy in prvTaskExitError()
258 /*-----------------------------------------------------------*/
266 …" ldmia r0!, {r4-r11, r14} \n" /* Pop the registers that are not automatically saved on e… in vPortSVCHandler()
277 /*-----------------------------------------------------------*/
282 * in use in case the FPU was used before the scheduler was started - which in prvPortStartFirstTask()
301 /*-----------------------------------------------------------*/
308 /* This port can be used on all revisions of the Cortex-M7 core other than in xPortStartScheduler()
310 * /source/portable/GCC/ARM_CM7/r0p1 directory. */ in xPortStartScheduler()
316 * 1. Direct Routing - Install the functions vPortSVCHandler and in xPortStartScheduler()
318 * 2. Indirect Routing - Install separate handlers for SVCall and PendSV in xPortStartScheduler()
378 * See https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html */ in xPortStartScheduler()
397 * the software to configure PRIGROUP to not have sub-priorities. As in xPortStartScheduler()
398 * a result, the least significant bit is always used for sub-priority in xPortStartScheduler()
399 * and there are 128 preemption priorities and 2 sub-priorities. in xPortStartScheduler()
401 * This may cause some confusion in some cases - for example, if in xPortStartScheduler()
410 * The following assert ensures that the sub-priority bit in the in xPortStartScheduler()
418 ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS - ulImplementedPrioBits; in xPortStartScheduler()
445 /* Ensure the VFP is enabled - it should be anyway. */ in xPortStartScheduler()
466 /*-----------------------------------------------------------*/
474 /*-----------------------------------------------------------*/
491 /*-----------------------------------------------------------*/
496 uxCriticalNesting--; in vPortExitCritical()
503 /*-----------------------------------------------------------*/
519 " vstmdbeq r0!, {s16-s31} \n" in xPortPendSVHandler()
521 " stmdb r0!, {r4-r11, r14} \n" /* Save the core registers. */ in xPortPendSVHandler()
537 " ldmia r0!, {r4-r11, r14} \n" /* Pop the core registers. */ in xPortPendSVHandler()
541 " vldmiaeq r0!, {s16-s31} \n" in xPortPendSVHandler()
560 /*-----------------------------------------------------------*/
587 /*-----------------------------------------------------------*/
612 /* Re-enable interrupts - see comments above the cpsid instruction in vPortSuppressTicksAndSleep()
624 /* Use the SysTick current-value register to determine the number of in vPortSuppressTicksAndSleep()
626 * current-value register is zero, then there are actually in vPortSuppressTicksAndSleep()
637 * tick periods. -1 is used because this code normally executes part in vPortSuppressTicksAndSleep()
642 …lReloadValue = ulSysTickDecrementsLeft + ( ulTimerCountsForOneTick * ( xExpectedIdleTime - 1UL ) ); in vPortSuppressTicksAndSleep()
647 ulReloadValue -= ulTimerCountsForOneTick; in vPortSuppressTicksAndSleep()
652 ulReloadValue -= ulStoppedTimerCompensation; in vPortSuppressTicksAndSleep()
682 /* Re-enable interrupts to allow the interrupt that brought the MCU in vPortSuppressTicksAndSleep()
714 …ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ) - ( ulReloadValue - portNVIC_SYSTICK_CUR… in vPortSuppressTicksAndSleep()
718 * that took too long or because the SysTick current-value register in vPortSuppressTicksAndSleep()
722 ulCalculatedLoadValue = ( ulTimerCountsForOneTick - 1UL ); in vPortSuppressTicksAndSleep()
730 ulCompleteTickPeriods = xExpectedIdleTime - 1UL; in vPortSuppressTicksAndSleep()
736 /* Use the SysTick current-value register to determine the in vPortSuppressTicksAndSleep()
742 /* If the SysTick is not using the core clock, the current- in vPortSuppressTicksAndSleep()
757 …ulCompletedSysTickDecrements = ( xExpectedIdleTime * ulTimerCountsForOneTick ) - ulSysTickDecremen… in vPortSuppressTicksAndSleep()
765 …CK_LOAD_REG = ( ( ulCompleteTickPeriods + 1UL ) * ulTimerCountsForOneTick ) - ulCompletedSysTickDe… in vPortSuppressTicksAndSleep()
779 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; in vPortSuppressTicksAndSleep()
794 portNVIC_SYSTICK_LOAD_REG = ulTimerCountsForOneTick - 1UL; in vPortSuppressTicksAndSleep()
808 /*-----------------------------------------------------------*/
830 portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; in vPortSetupTimerInterrupt()
833 /*-----------------------------------------------------------*/
849 /*-----------------------------------------------------------*/
888 * https://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html in vPortValidateInterruptPriority()
895 * define the interrupt's pre-emption priority bits and bits that define in vPortValidateInterruptPriority()
896 * the interrupt's sub-priority. For simplicity all bits must be defined in vPortValidateInterruptPriority()
897 * to be pre-emption priority bits. The following assertion will fail if in vPortValidateInterruptPriority()
898 * this is not the case (if some bits represent a sub-priority). in vPortValidateInterruptPriority()
901 * configuration then the correct setting can be achieved on all Cortex-M in vPortValidateInterruptPriority()
904 * assume a non-zero priority group setting, in which cases using a value in vPortValidateInterruptPriority()