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Searched refs:portMPU_CTRL_REG (Results 1 – 25 of 25) sorted by relevance

/Kernel-v10.6.2/portable/IAR/ARM_CM4F_MPU/
HDport.c85 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
1029 portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM4_MPU/
HDport.c84 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
1265 portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM3_MPU/
HDport.c74 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
1106 portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM85_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM55_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM85/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM85_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM35P_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM55/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM23/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM35P/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM35P_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM23/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM33/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM33_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM55/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM23_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/ARMv8M/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM55_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM85/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/GCC/ARM_CM35P/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM23_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM33/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/IAR/ARM_CM33_NTZ/non_secure/
HDport.c146 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
903 portMPU_CTRL_REG |= ( portMPU_PRIV_BACKGROUND_ENABLE_BIT | portMPU_ENABLE_BIT ); in prvSetupMPU()
/Kernel-v10.6.2/portable/RVDS/ARM_CM4_MPU/
HDport.c73 #define portMPU_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed94 ) ) macro
1267 portMPU_CTRL_REG |= ( portMPU_ENABLE | portMPU_BACKGROUND_ENABLE ); in prvSetupMPU()