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/Kernel-v11.1.0/.github/workflows/
Dkernel-demos.yml1 name: FreeRTOS-Kernel Demos
6 bashPass: \033[32;1mPASSED -
7 bashInfo: \033[33;1mINFO -
8 bashFail: \033[31;1mFAILED -
12 WIN32-MSVC:
14 runs-on: windows-latest
16 - name: Checkout the FreeRTOS/FreeRTOS Repository
22 fetch-depth: 1
25 - name: Checkout Pull Request
30 - name: Add msbuild to PATH
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Dcoverity_scan.yml10 bashPass: \033[32;1mPASSED -
11 bashInfo: \033[33;1mINFO -
12 bashFail: \033[31;1mFAILED -
16 Coverity-Scan:
17 if: ( github.repository == 'FreeRTOS/FreeRTOS-Kernel' )
19 runs-on: ubuntu-latest
21 - name: Checkout the Repository
24 - env:
25 stepName: Install Build Essentials
29 echo -e "::group::${{ env.bashInfo }} ${{ env.stepName }} ${{ env.bashEnd }}"
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Dunit-tests.yml6 runs-on: ubuntu-20.04
8 - name: Checkout Parent Repository
14 fetch-depth: 1
17 - name: Checkout Pull Request
22 - name: Setup Python
23 uses: actions/setup-python@master
25 python-version: 3.8
27 - name: Install packages
29 sudo apt-get install lcov cflow ruby doxygen build-essential unifdef
30 - name: Run Unit Tests with ENABLE_SANITIZER=1
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/Kernel-v11.1.0/portable/ThirdParty/GCC/ARM_TFM/
DREADME.md4 services in Trusted Firmware M(TF-M) through Platform Security Architecture
5 (PSA) API based on the ARM Cortex-M23, Cortex-M33, Cortex-M55 and Cortex-M85
10 …ify. See [PSA Resource Page](https://www.arm.com/architecture/security-features/platform-security).
12 TF-M is an open source project. It provides a reference implementation of PSA
13 for Arm M-profile architecture. Please get the details from this [link](https://www.trustedfirmware…
19 in trusted-firmware-m (tag: TF-Mv2.0.0). The implementation is based on
24 To build a project based on this port:
25 * Step 1: build the secure image. Please follow the **Build the Secure Side** section for details.
26 * Step 2: build the nonsecure image. Please follow the **Build the Non-Secure Side** for details.
28 ## Build the Secure Side
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/Kernel-v11.1.0/examples/coverity/
DREADME.md1 # MISRA Compliance for FreeRTOS-Kernel
2 FreeRTOS-Kernel is MISRA C:2012 compliant. This directory contains a project to
3 … [Synopsys Coverity](https://www.synopsys.com/software-integrity/security-testing/static-analysis-
20 …run on any platform mentioned [here](https://sig-docs.synopsys.com/polaris/topics/c_coverity-compa…
23 1. CMake version > 3.13.0 (You can check whether you have this by typing `cmake --version`).
25 - See download and installation instructions [here](https://gcc.gnu.org/install/).
27 - `git clone https://github.com/FreeRTOS/FreeRTOS-Kernel.git ./FreeRTOS-Kernel`
30 Go to the root directory of the FreeRTOS-Kernel repo and run the following
34 cov-configure --force --compiler cc --comptype gcc
36 2. Create the build files using CMake in a `build` directory:
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DCMakeLists.txt16 …COMMAND sed -i -b -e 's/pdFALSE/pdFAIL/g' -e 's/pdTRUE/pdPASS/g' ${FREERTOS_KERNEL_SOURCE} ${FREER…
19 # Add the freertos_config for FreeRTOS-Kernel.
27 message(STATUS "Build FreeRTOS SMP example")
28 # Adding the following configurations to build SMP template port
29 add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
32 # Select the heap. Values between 1-5 will pick a heap.
38 # Add the FreeRTOS-Kernel subdirectory.
39 add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
/Kernel-v11.1.0/portable/ThirdParty/XCC/Xtensa/
Dreadme_xtensa.txt8 ------------
18 --------------------------------------------------
26 NOTE: It may be possible to build and run this with the open-source
27 xtensa-linux tools provided you have the correct overlay for your Xtensa
33 thread-safety on a per task basis (for use in tasks only, not interrupt
48 - Timer interrupt option with at least one interruptible timer.
49 - Interrupt option (implied by the timer interrupt option).
50 - Exception Architecture 2 (XEA2). Please note that XEA1 is NOT supported.
60 interrupt-driven drivers - it is not specific to any RTOS. Note that
63 and drivers for any on-board devices you want to use.
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DMakefile1 ### Makefile to build the FreeRTOS library ###
3 # Build target (options: sim, board)
10 CC = xt-xcc
11 AS = xt-xcc
12 AR = xt-ar
13 XT_CORE = $(patsubst %-params,%,$(notdir $(shell xt-xcc --show-config=core)))
14 CONFIGDIR = $(shell xt-xcc --show-config=config)
16 # For platform-specific commands
20 # Source code and build locations
24 BLDROOT = $(TSTROOT)$(S)build
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/Kernel-v11.1.0/examples/template_configuration/
DFreeRTOSConfig.h5 * SPDX-License-Identifier: MIT
36 * before this file will build.
56 /* configSYSTICK_CLOCK_HZ is an optional parameter for ARM Cortex-M ports only.
58 * By default ARM Cortex-M ports generate the RTOS tick interrupt from the
59 * Cortex-M SysTick timer. Most Cortex-M MCUs run the SysTick timer at the same
60 * frequency as the MCU itself - when that is the case configSYSTICK_CLOCK_HZ is
80 /* Set configUSE_PREEMPTION to 1 to use pre-emptive scheduling. Set
81 * configUSE_PREEMPTION to 0 to use co-operative scheduling.
82 * See https://www.freertos.org/single-core-amp-smp-rtos-scheduling.html. */
89 * https://freertos.org/single-core-amp-smp-rtos-scheduling.html. */
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/Kernel-v11.1.0/.github/
DCODEOWNERS5 # @global-owner1 and @global-owner2 will be requested for
7 * @FreeRTOS/pr-bar-raiser
11 # modifies JS files, only @js-owner and not the global
13 # *.c FreeRTOS/pr-bar-raiser
20 # In this example, @doctocat owns any files in the build/logs
23 # /build/logs/ @doctocat
26 # `docs/getting-started.md` but not further nested files like
27 # `docs/build-app/troubleshooting.md`.
/Kernel-v11.1.0/examples/cmake_example/
DCMakeLists.txt6 # Add the freertos_config for FreeRTOS-Kernel
15 message(STATUS "Build FreeRTOS SMP example")
16 # Adding the following configurations to build SMP template port
17 add_compile_options( -DconfigNUMBER_OF_CORES=2 -DconfigUSE_PASSIVE_IDLE_HOOK=0 )
20 # Select the heap port. values between 1-4 will pick a heap.
26 # Adding the FreeRTOS-Kernel subdirectory
27 add_subdirectory(${FREERTOS_KERNEL_PATH} FreeRTOS-Kernel)
32 # Per library opt-out of things that are warnings/errors.
41 # -------------------
51 $<$<COMPILE_LANG_AND_ID:C,GNU>:-fdiagnostics-color=always>
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/Kernel-v11.1.0/
DHistory.txt5 + Add ARMv7-R port with Memory Protection Unit (MPU) support.
6 + Add Memory Protection Unit (MPU) support to the Cortex-M0 port.
8 buffer when a task reads from a non-empty buffer:
9 - The task reading from a non-empty stream buffer returns immediately
11 - The task reading from a non-empty steam batching buffer blocks until the
37 + Add 64-bit support to the FreeRTOS Windows Simulator port. We thank @watsk
39 + Add support for 64-bit Microblaze processor to the MicroblazeV9 port. We
43 compilers. We thank @Forty-Bot for their contribution.
54 POSIX timers to address issues with signal handling in non-FreeRTOS
56 + Update ARM_TFM port to support TF-Mv2.0.0 release of trusted-firmware-m.
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/Kernel-v11.1.0/portable/MikroC/ARM_CM4F/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*-----------------------------------------------------------
45 *-----------------------------------------------------------
49 * are to be included in the build. NOTE: Omitting these lines will result in a
50 * run-time crash, not a linker error! */
74 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
80 /*-----------------------------------------------------------*/
83 #define portSTACK_GROWTH ( -1 )
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/Kernel-v11.1.0/portable/ThirdParty/GCC/ATmega/
Dreadme.md7 …ern ATmega devices using either the Enhanced Watchdog Timer, or Timer0 (an 8-bit Timer generally a…
9 This initial commit contains the information required to build with System Tick being generated by …
10 - Watchdog Timer, or
11 - Timer0 - an 8-bit Timer, or
12 - TimerN - a 16-bit Timer which will be configured by the user.
14 Further commits can add support for 16-bit Timers available on many relevant devices. The availabil…
18 To build generic Microchip (AVR) ATmega support the similarities across the family must be consider…
22 …y through the use of 16-bit Timers (for generating phase correct PWM by up/down counting), and Pin…
24 …Pins (and therefore not impacting the application of the device) are some 16-bit Timers (very devi…
30 Configuration and usage of the WDT is covered in `<avr/wdt.h>` which was revised in avr-libc 2.0.0.
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/Kernel-v11.1.0/portable/CCS/ARM_CM4F/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
75 /*-----------------------------------------------------------*/
78 #define portSTACK_GROWTH ( -1 )
81 /*-----------------------------------------------------------*/
109 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/IAR/RISC-V/
Dportmacro.h5 * SPDX-License-Identifier: MIT
35 /* *INDENT-OFF* */
39 /* *INDENT-ON* */
41 /*-----------------------------------------------------------
48 *-----------------------------------------------------------
79 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
82 /*-----------------------------------------------------------*/
85 #define portSTACK_GROWTH ( -1 )
88 …#define portBYTE_ALIGNMENT 8 /* RV32E uses RISC-V EABI with reduced stack alignment req…
92 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/CCS/ARM_CM3/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
75 /*-----------------------------------------------------------*/
78 #define portSTACK_GROWTH ( -1 )
82 /*-----------------------------------------------------------*/
87 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/GCC/RISC-V/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
77 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
80 /*-----------------------------------------------------------*/
83 #define portSTACK_GROWTH ( -1 )
86 …#define portBYTE_ALIGNMENT 8 /* RV32E uses RISC-V EABI with reduced stack alignment require…
90 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/ThirdParty/xClang/XCOREAI/
Dportmacro.h38 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
42 /*-----------------------------------------------------------*/
47 #define portSTACK_GROWTH ( -1 )
80 /*-----------------------------------------------------------*/
96 /*-----------------------------------------------------------*/
103 /*-----------------------------------------------------------*/
116 /*-----------------------------------------------------------*/
118 …HEST_PRIORITY( uxTopPriority, uxReadyPriorities ) uxTopPriority = ( 31UL - ( uint32_t ) __built…
121 /*-----------------------------------------------------------*/
143 * Will enable interrupts if ulState is non-zero.
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/Kernel-v11.1.0/portable/IAR/ARM_CM4F/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*-----------------------------------------------------------
45 *-----------------------------------------------------------
71 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
77 /*-----------------------------------------------------------*/
80 #define portSTACK_GROWTH ( -1 )
83 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/IAR/ARM_CM7/r0p1/
Dportmacro.h5 * SPDX-License-Identifier: MIT
32 /* *INDENT-OFF* */
36 /* *INDENT-ON* */
38 /*-----------------------------------------------------------
45 *-----------------------------------------------------------
71 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
77 /*-----------------------------------------------------------*/
80 #define portSTACK_GROWTH ( -1 )
83 /*-----------------------------------------------------------*/
88 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/IAR/ARM_CM3/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
72 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
78 /*-----------------------------------------------------------*/
81 #define portSTACK_GROWTH ( -1 )
84 /*-----------------------------------------------------------*/
89 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/GCC/ARM_CM7/r0p1/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
75 /*-----------------------------------------------------------*/
78 #define portSTACK_GROWTH ( -1 )
82 /*-----------------------------------------------------------*/
112 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/GCC/ARM_CM4F/
Dportmacro.h5 * SPDX-License-Identifier: MIT
33 /* *INDENT-OFF* */
37 /* *INDENT-ON* */
39 /*-----------------------------------------------------------
46 *-----------------------------------------------------------
69 /* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
78 /*-----------------------------------------------------------*/
81 #define portSTACK_GROWTH ( -1 )
85 /*-----------------------------------------------------------*/
115 /*-----------------------------------------------------------*/
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/Kernel-v11.1.0/portable/ThirdParty/GCC/RP2040/
DREADME.md3 This directory provides an SMP FreeRTOS-Kernel port that can be used with the Raspberry Pi Pico SDK…
5 …* Simple CMake INTERFACE libraries, to provide the FreeRTOS-Kernel and also the individual allocat…
6 * Running the FreeRTOS-Kernel and tasks on either core 0 or core 1, or both.
10 more efficient to use the non SMP version in the main FreeRTOS-Kernel branch in that case.
21 This will locate the FreeRTOS kernel if it is a direct sub-module of your project, or if you provid…
22 …ERTOS_KERNEL_PATH` variable in your environment or via `-DFREERTOS_KERNEL_PATH=/path/to/FreeRTOS-K…
26 version, you can include the FreeRTOS-Kernel support later in your CMake build (possibly in a subdi…
27 FreeRTOS-Kernel support will only apply to those targets which explicitly include FreeRTOS support.
33 add_subdirectory(path/to/this/directory FreeRTOS-Kernel)
43 - Tickless idle has not currently been tested, and is likely non-functional

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