1 /**
2   ******************************************************************************
3   * @file    stm32u5xx.h
4   * @author  MCD Application Team
5   * @brief   CMSIS STM32U5xx Device Peripheral Access Layer Header File.
6   *
7   *          The file is the unique include file that the application programmer
8   *          is using in the C source code, usually in main.c. This file contains:
9   *           - Configuration section that allows to select:
10   *              - The STM32U5xx device used in the target application
11   *              - To use or not the peripheral�s drivers in application code(i.e.
12   *                code will be based on direct access to peripheral�s registers
13   *                rather than drivers API), this option is controlled by
14   *                "#define USE_HAL_DRIVER"
15   *
16   ******************************************************************************
17   * @attention
18   *
19   * Copyright (c) 2021 STMicroelectronics.
20   * All rights reserved.
21   *
22   * This software component is licensed by ST under Apache License, Version 2.0,
23   * the "License"; You may not use this file except in compliance with the
24   * License. You may obtain a copy of the License at:
25   *                        opensource.org/licenses/Apache-2.0
26   *
27   ******************************************************************************
28   */
29 
30 /** @addtogroup CMSIS
31   * @{
32   */
33 
34 /** @addtogroup stm32u5xx
35   * @{
36   */
37 
38 #ifndef STM32U5xx_H
39 #define STM32U5xx_H
40 
41 #ifdef __cplusplus
42  extern "C" {
43 #endif /* __cplusplus */
44 
45 /** @addtogroup Library_configuration_section
46   * @{
47   */
48 
49 /**
50   * @brief STM32 Family
51   */
52 #if !defined (STM32U5)
53 #define STM32U5
54 #endif /* STM32U5 */
55 
56 /* Uncomment the line below according to the target STM32U5 device used in your
57    application
58   */
59 
60 #if !defined (STM32U575xx)  && !defined (STM32U585xx) \
61     && !defined (STM32U595xx)  && !defined (STM32U599xx) \
62     && !defined (STM32U5A5xx)  && !defined (STM32U5A9xx)
63   /* #define STM32U575xx  */   /*!< STM32U575CIU6 STM32U575CIT6 STM32U575RIT6 STM32U575VIT6 STM32U575ZIT6 STM32U575QII6 STM32U575AII6 STM32U575CIU6Q STM32U575CIT6Q STM32U575OIY6Q STM32U575VIT6Q STM32U575QII6Q STM32U575ZIT6Q STM32U575RIT6Q STM32U575CGU6 STM32U575CGT6 STM32U575RGT6 STM32U575VGT6 STM32U575ZGT6 STM32U575QGI6 STM32U575AGI6 STM32U575CGU6Q STM32U575CGT6Q STM32U575OGY6Q STM32U575VGT6Q STM32U575QGI6Q STM32U575ZGT6Q STM32U575RGT6Q STM32U575AGI6Q Devices  */
64   /* #define STM32U585xx  */   /*!< STM32U585CIU6 STM32U585CIT6 STM32U585RIT6 STM32U585VIT6 STM32U585AII6 STM32U585QII6 STM32U585ZIT6 STM32U585OIY6Q STM32U585VIT6Q STM32U585QEI6Q STM32U585RIT6Q STM32U585AII6Q STM32U585CIU6Q STM32U585CIT6Q STM32U585ZET6Q Devices  */
65   /* #define STM32U595xx */   /*!< STM32U595ZJT6Q Device */
66   /* #define STM32U599xx */   /*!< STM32U599NJH6Q STM32U599BJY6Q STM32U599NIH6Q Devices */
67   /* #define STM32U5A5xx */   /*!< STM32U5A5ZJT6Q Device */
68   /* #define STM32U5A9xx */   /*!< STM32U5A9NJH6Q STM32U5A9BJY6Q Devices */
69 #endif
70 
71 /*  Tip: To avoid modifying this file each time you need to switch between these
72         devices, you can define the device in your toolchain compiler preprocessor.
73   */
74 #if !defined  (USE_HAL_DRIVER)
75 /**
76  * @brief Comment the line below if you will not use the peripherals drivers.
77    In this case, these drivers will not be included and the application code will
78    be based on direct access to peripherals registers
79    */
80   /*#define USE_HAL_DRIVER */
81 #endif /* USE_HAL_DRIVER */
82 
83 /**
84   * @brief CMSIS Device version number 1.0.0
85   */
86 #define __STM32U5_CMSIS_VERSION_MAIN   (0x01) /*!< [31:24] main version */
87 #define __STM32U5_CMSIS_VERSION_SUB1   (0x00) /*!< [23:16] sub1 version */
88 #define __STM32U5_CMSIS_VERSION_SUB2   (0x00) /*!< [15:8]  sub2 version */
89 #define __STM32U5_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */
90 #define __STM32U5_CMSIS_VERSION        ((__STM32U5_CMSIS_VERSION_MAIN << 24U)\
91                                        |(__STM32U5_CMSIS_VERSION_SUB1 << 16U)\
92                                        |(__STM32U5_CMSIS_VERSION_SUB2 << 8U )\
93                                        |(__STM32U5_CMSIS_VERSION_RC))
94 
95 /**
96   * @}
97   */
98 
99 /** @addtogroup Device_Included
100   * @{
101   */
102 
103 #if defined(STM32U575xx)
104   #include "stm32u575xx.h"
105 #elif defined(STM32U585xx)
106   #include "stm32u585xx.h"
107 #elif defined(STM32U595xx)
108   #include "stm32u595xx.h"
109 #elif defined(STM32U599xx)
110   #include "stm32u599xx.h"
111 #elif defined(STM32U5A5xx)
112   #include "stm32u5a5xx.h"
113 #elif defined(STM32U5A9xx)
114   #include "stm32u5a9xx.h"
115 #else
116  #error "Please select first the target STM32U5xx device used in your application (in stm32u5xx.h file)"
117 #endif
118 
119 /**
120   * @}
121   */
122 
123 /** @addtogroup Exported_types
124   * @{
125   */
126 typedef enum
127 {
128   RESET = 0,
129   SET = !RESET
130 } FlagStatus, ITStatus;
131 
132 typedef enum
133 {
134   DISABLE = 0,
135   ENABLE = !DISABLE
136 } FunctionalState;
137 #define IS_FUNCTIONAL_STATE(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE))
138 
139 typedef enum
140 {
141   SUCCESS = 0,
142   ERROR = !SUCCESS
143 } ErrorStatus;
144 
145 /**
146   * @}
147   */
148 
149 
150 /** @addtogroup Exported_macros
151   * @{
152   */
153 #define SET_BIT(REG, BIT)     ((REG) |= (BIT))
154 
155 #define CLEAR_BIT(REG, BIT)   ((REG) &= ~(BIT))
156 
157 #define READ_BIT(REG, BIT)    ((REG) & (BIT))
158 
159 #define CLEAR_REG(REG)        ((REG) = (0x0))
160 
161 #define WRITE_REG(REG, VAL)   ((REG) = (VAL))
162 
163 #define READ_REG(REG)         ((REG))
164 
165 #define MODIFY_REG(REG, CLEARMASK, SETMASK)  WRITE_REG((REG), (((READ_REG(REG)) & (~(CLEARMASK))) | (SETMASK)))
166 
167 /* Use of CMSIS compiler intrinsics for register exclusive access */
168 /* Atomic 32-bit register access macro to set one or several bits */
169 #define ATOMIC_SET_BIT(REG, BIT)                             \
170   do {                                                       \
171     uint32_t val;                                            \
172     do {                                                     \
173       val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT);       \
174     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
175   } while(0)
176 
177 /* Atomic 32-bit register access macro to clear one or several bits */
178 #define ATOMIC_CLEAR_BIT(REG, BIT)                           \
179   do {                                                       \
180     uint32_t val;                                            \
181     do {                                                     \
182       val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT);      \
183     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
184   } while(0)
185 
186 /* Atomic 32-bit register access macro to clear and set one or several bits */
187 #define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK)                          \
188   do {                                                                     \
189     uint32_t val;                                                          \
190     do {                                                                   \
191       val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
192     } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U);               \
193   } while(0)
194 
195 /* Atomic 16-bit register access macro to set one or several bits */
196 #define ATOMIC_SETH_BIT(REG, BIT)                            \
197   do {                                                       \
198     uint16_t val;                                            \
199     do {                                                     \
200       val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT);       \
201     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
202   } while(0)
203 
204 /* Atomic 16-bit register access macro to clear one or several bits */
205 #define ATOMIC_CLEARH_BIT(REG, BIT)                          \
206   do {                                                       \
207     uint16_t val;                                            \
208     do {                                                     \
209       val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT);      \
210     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
211   } while(0)
212 
213 /* Atomic 16-bit register access macro to clear and set one or several bits */
214 #define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK)                         \
215   do {                                                                     \
216     uint16_t val;                                                          \
217     do {                                                                   \
218       val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
219     } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U);               \
220   } while(0)
221 
222 #define POSITION_VAL(VAL)     (__CLZ(__RBIT(VAL)))
223 
224 
225 /**
226   * @}
227   */
228 
229 #if defined (USE_HAL_DRIVER)
230  #include "stm32u5xx_hal.h"
231 #endif /* USE_HAL_DRIVER */
232 
233 #ifdef __cplusplus
234 }
235 #endif /* __cplusplus */
236 
237 #endif /* STM32U5xx_H */
238 /**
239   * @}
240   */
241 
242 /**
243   * @}
244   */
245 
246 
247 
248 
249