1 /* 2 * Copyright (c) 2017-2023 Arm Limited. All rights reserved. 3 * Copyright 2019-2023 NXP. All rights reserved. 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 */ 17 18 #ifndef __REGION_DEFS_H__ 19 #define __REGION_DEFS_H__ 20 21 #include "flash_layout.h" 22 23 #define BL2_HEAP_SIZE (0x0001000) 24 #define BL2_MSP_STACK_SIZE (0x0001800) 25 26 #ifdef ENABLE_HEAP 27 #define S_HEAP_SIZE (0x0000200) 28 #endif 29 30 #define S_MSP_STACK_SIZE (0x0000800) 31 #define S_PSP_STACK_SIZE (0x0000800) 32 33 #define NS_HEAP_SIZE (0x0001000) 34 #define NS_STACK_SIZE (0x00001E0) 35 36 /* eFlash MPC granularity is 4 KB on Musca_B1. Alignment 37 * of partitions is defined in accordance with this constraint. 38 */ 39 #ifdef BL2 40 #ifndef LINK_TO_SECONDARY_PARTITION 41 #define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET) 42 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET) 43 #else 44 #define S_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET) 45 #define S_IMAGE_SECONDARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET) 46 #endif /* !LINK_TO_SECONDARY_PARTITION */ 47 #else 48 #define S_IMAGE_PRIMARY_PARTITION_OFFSET (0x0) 49 #endif /* BL2 */ 50 51 #ifndef LINK_TO_SECONDARY_PARTITION 52 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_0_OFFSET \ 53 + FLASH_S_PARTITION_SIZE) 54 #else 55 #define NS_IMAGE_PRIMARY_PARTITION_OFFSET (FLASH_AREA_2_OFFSET \ 56 + FLASH_S_PARTITION_SIZE) 57 #endif /* !LINK_TO_SECONDARY_PARTITION */ 58 59 /* Boot partition structure if MCUBoot is used: 60 * 0x0_0000 Bootloader header 61 * 0x0_0400 Image area 62 * 0x1_FC00 Trailer 63 */ 64 /* IMAGE_CODE_SIZE is the space available for the software binary image. 65 * It is less than the FLASH_S_PARTITION_SIZE + FLASH_NS_PARTITION_SIZE 66 * because we reserve space for the image header and trailer introduced 67 * by the bootloader. 68 */ 69 70 #if (!defined(MCUBOOT_IMAGE_NUMBER) || (MCUBOOT_IMAGE_NUMBER == 1)) && \ 71 (NS_IMAGE_PRIMARY_PARTITION_OFFSET > S_IMAGE_PRIMARY_PARTITION_OFFSET) 72 /* If secure image and nonsecure image are concatenated, and nonsecure image 73 * locates at the higher memory range, then the secure image does not need 74 * the trailer area. 75 */ 76 #define IMAGE_S_CODE_SIZE \ 77 (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE) 78 #else 79 #define IMAGE_S_CODE_SIZE \ 80 (FLASH_S_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) 81 #endif 82 83 #define IMAGE_NS_CODE_SIZE \ 84 (FLASH_NS_PARTITION_SIZE - BL2_HEADER_SIZE - BL2_TRAILER_SIZE) 85 86 #define CMSE_VENEER_REGION_SIZE (0x340) 87 88 /* Alias definitions for secure and non-secure areas*/ 89 #define S_ROM_ALIAS(x) (S_ROM_ALIAS_BASE + (x)) 90 #define NS_ROM_ALIAS(x) (NS_ROM_ALIAS_BASE + (x)) 91 92 #define S_RAM_ALIAS(x) (S_RAM_ALIAS_BASE + (x)) 93 #define NS_RAM_ALIAS(x) (NS_RAM_ALIAS_BASE + (x)) 94 95 /* Secure regions */ 96 #define S_IMAGE_PRIMARY_AREA_OFFSET \ 97 (S_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE) 98 #define S_CODE_START (S_ROM_ALIAS(S_IMAGE_PRIMARY_AREA_OFFSET)) 99 #define S_CODE_SIZE (IMAGE_S_CODE_SIZE) 100 #define S_CODE_LIMIT (S_CODE_START + S_CODE_SIZE - 1) 101 102 #define S_DATA_START (S_RAM_ALIAS(0x0)) 103 #define S_DATA_SIZE (TOTAL_RAM_SIZE / 2) 104 #define S_DATA_LIMIT (S_DATA_START + S_DATA_SIZE - 1) 105 106 /* Size of vector table: 75 interrupt handlers + 4 bytes MPS initial value */ 107 #define S_CODE_VECTOR_TABLE_SIZE (0x130) 108 109 /* Non-secure regions */ 110 #define NS_IMAGE_PRIMARY_AREA_OFFSET \ 111 (NS_IMAGE_PRIMARY_PARTITION_OFFSET + BL2_HEADER_SIZE) 112 #define NS_CODE_START (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_AREA_OFFSET)) 113 #define NS_CODE_SIZE (IMAGE_NS_CODE_SIZE) 114 #define NS_CODE_LIMIT (NS_CODE_START + NS_CODE_SIZE - 1) 115 116 #define NS_DATA_START (NS_RAM_ALIAS(S_DATA_SIZE)) 117 #define NS_DATA_SIZE (TOTAL_RAM_SIZE - S_DATA_SIZE) 118 #define NS_DATA_LIMIT (NS_DATA_START + NS_DATA_SIZE - 1) 119 120 /* Flash is divided into 32 kB sub-regions. Each sub-region can be assigned individual 121 security tier by programing corresponding registers in secure AHB controller.*/ 122 #define FLASH_SUBREGION_SIZE (0x8000) /* 32 kB */ 123 124 /* RAM is divided into 4 kB sub-regions. Each sub-region can be assigned individual 125 security tier by programing corresponding registers in secure AHB controller. */ 126 #define DATA_SUBREGION_SIZE 0x1000 /* 4 KB*/ 127 128 /* NS partition information is used for MPC and SAU configuration */ 129 #define NS_PARTITION_START \ 130 (NS_ROM_ALIAS(NS_IMAGE_PRIMARY_PARTITION_OFFSET)) 131 #define NS_PARTITION_SIZE (FLASH_NS_PARTITION_SIZE) 132 133 /* Secondary partition for new images in case of firmware upgrade */ 134 #define SECONDARY_PARTITION_START \ 135 (NS_ROM_ALIAS(S_IMAGE_SECONDARY_PARTITION_OFFSET)) 136 #define SECONDARY_PARTITION_SIZE (FLASH_S_PARTITION_SIZE + \ 137 FLASH_NS_PARTITION_SIZE) 138 139 /* Code SRAM area */ 140 #define S_RAM_CODE_SIZE (0x8000) /* SRAM X region */ 141 #define S_RAM_CODE_START (0x14000000) 142 #define NS_RAM_CODE_START (0x04000000) 143 144 #ifdef BL2 145 /* Bootloader regions */ 146 #define BL2_CODE_START (S_ROM_ALIAS(FLASH_AREA_BL2_OFFSET)) 147 #define BL2_CODE_SIZE (FLASH_AREA_BL2_SIZE) 148 #define BL2_CODE_LIMIT (BL2_CODE_START + BL2_CODE_SIZE - 1) 149 150 #define BL2_DATA_START (S_RAM_ALIAS(0x0)) 151 #define BL2_DATA_SIZE (TOTAL_RAM_SIZE) 152 #define BL2_DATA_LIMIT (BL2_DATA_START + BL2_DATA_SIZE - 1) 153 #endif /* BL2 */ 154 155 /* Shared data area between bootloader and runtime firmware. 156 * Shared data area is allocated at the beginning of the RAM, it is overlapping 157 * with TF-M Secure code's MSP stack 158 */ 159 #define BOOT_TFM_SHARED_DATA_BASE S_RAM_ALIAS_BASE 160 #define BOOT_TFM_SHARED_DATA_SIZE (0x400) 161 #define BOOT_TFM_SHARED_DATA_LIMIT (BOOT_TFM_SHARED_DATA_BASE + \ 162 BOOT_TFM_SHARED_DATA_SIZE - 1) 163 164 #endif /* __REGION_DEFS_H__ */ 165
